1/**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19#ifndef _UAPI_MSM_MDP_H_ 20#define _UAPI_MSM_MDP_H_ 21#include <linux/types.h> 22#include <linux/fb.h> 23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24#define MSMFB_IOCTL_MAGIC 'm' 25#define MSMFB_GRP_DISP _IOW(MSMFB_IOCTL_MAGIC, 1, unsigned int) 26#define MSMFB_BLIT _IOW(MSMFB_IOCTL_MAGIC, 2, unsigned int) 27#define MSMFB_SUSPEND_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 128, unsigned int) 28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29#define MSMFB_RESUME_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 129, unsigned int) 30#define MSMFB_CURSOR _IOW(MSMFB_IOCTL_MAGIC, 130, struct fb_cursor) 31#define MSMFB_SET_LUT _IOW(MSMFB_IOCTL_MAGIC, 131, struct fb_cmap) 32#define MSMFB_HISTOGRAM _IOWR(MSMFB_IOCTL_MAGIC, 132, struct mdp_histogram_data) 33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34#define MSMFB_GET_CCS_MATRIX _IOWR(MSMFB_IOCTL_MAGIC, 133, struct mdp_ccs) 35#define MSMFB_SET_CCS_MATRIX _IOW(MSMFB_IOCTL_MAGIC, 134, struct mdp_ccs) 36#define MSMFB_OVERLAY_SET _IOWR(MSMFB_IOCTL_MAGIC, 135, struct mdp_overlay) 37#define MSMFB_OVERLAY_UNSET _IOW(MSMFB_IOCTL_MAGIC, 136, unsigned int) 38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39#define MSMFB_OVERLAY_PLAY _IOW(MSMFB_IOCTL_MAGIC, 137, struct msmfb_overlay_data) 40#define MSMFB_OVERLAY_QUEUE MSMFB_OVERLAY_PLAY 41#define MSMFB_GET_PAGE_PROTECTION _IOR(MSMFB_IOCTL_MAGIC, 138, struct mdp_page_protection) 42#define MSMFB_SET_PAGE_PROTECTION _IOW(MSMFB_IOCTL_MAGIC, 139, struct mdp_page_protection) 43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44#define MSMFB_OVERLAY_GET _IOR(MSMFB_IOCTL_MAGIC, 140, struct mdp_overlay) 45#define MSMFB_OVERLAY_PLAY_ENABLE _IOW(MSMFB_IOCTL_MAGIC, 141, unsigned int) 46#define MSMFB_OVERLAY_BLT _IOWR(MSMFB_IOCTL_MAGIC, 142, struct msmfb_overlay_blt) 47#define MSMFB_OVERLAY_BLT_OFFSET _IOW(MSMFB_IOCTL_MAGIC, 143, unsigned int) 48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49#define MSMFB_HISTOGRAM_START _IOR(MSMFB_IOCTL_MAGIC, 144, struct mdp_histogram_start_req) 50#define MSMFB_HISTOGRAM_STOP _IOR(MSMFB_IOCTL_MAGIC, 145, unsigned int) 51#define MSMFB_NOTIFY_UPDATE _IOWR(MSMFB_IOCTL_MAGIC, 146, unsigned int) 52#define MSMFB_OVERLAY_3D _IOWR(MSMFB_IOCTL_MAGIC, 147, struct msmfb_overlay_3d) 53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54#define MSMFB_MIXER_INFO _IOWR(MSMFB_IOCTL_MAGIC, 148, struct msmfb_mixer_info_req) 55#define MSMFB_OVERLAY_PLAY_WAIT _IOWR(MSMFB_IOCTL_MAGIC, 149, struct msmfb_overlay_data) 56#define MSMFB_WRITEBACK_INIT _IO(MSMFB_IOCTL_MAGIC, 150) 57#define MSMFB_WRITEBACK_START _IO(MSMFB_IOCTL_MAGIC, 151) 58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59#define MSMFB_WRITEBACK_STOP _IO(MSMFB_IOCTL_MAGIC, 152) 60#define MSMFB_WRITEBACK_QUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 153, struct msmfb_data) 61#define MSMFB_WRITEBACK_DEQUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 154, struct msmfb_data) 62#define MSMFB_WRITEBACK_TERMINATE _IO(MSMFB_IOCTL_MAGIC, 155) 63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64#define MSMFB_MDP_PP _IOWR(MSMFB_IOCTL_MAGIC, 156, struct msmfb_mdp_pp) 65#define MSMFB_OVERLAY_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 160, unsigned int) 66#define MSMFB_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 161, unsigned int) 67#define MSMFB_BUFFER_SYNC _IOW(MSMFB_IOCTL_MAGIC, 162, struct mdp_buf_sync) 68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69#define MSMFB_OVERLAY_COMMIT _IO(MSMFB_IOCTL_MAGIC, 163) 70#define MSMFB_DISPLAY_COMMIT _IOW(MSMFB_IOCTL_MAGIC, 164, struct mdp_display_commit) 71#define MSMFB_METADATA_SET _IOW(MSMFB_IOCTL_MAGIC, 165, struct msmfb_metadata) 72#define MSMFB_METADATA_GET _IOW(MSMFB_IOCTL_MAGIC, 166, struct msmfb_metadata) 73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74#define MSMFB_WRITEBACK_SET_MIRRORING_HINT _IOW(MSMFB_IOCTL_MAGIC, 167, unsigned int) 75#define MSMFB_ASYNC_BLIT _IOW(MSMFB_IOCTL_MAGIC, 168, unsigned int) 76#define MSMFB_OVERLAY_PREPARE _IOWR(MSMFB_IOCTL_MAGIC, 169, struct mdp_overlay_list) 77#define MSMFB_LPM_ENABLE _IOWR(MSMFB_IOCTL_MAGIC, 170, unsigned int) 78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79#define MSMFB_MDP_PP_GET_FEATURE_VERSION _IOWR(MSMFB_IOCTL_MAGIC, 171, struct mdp_pp_feature_version) 80#define MSMFB_SET_PERSISTENCE_MODE _IOWR(MSMFB_IOCTL_MAGIC, 172, unsigned int) 81#define FB_TYPE_3D_PANEL 0x10101010 82#define MDP_IMGTYPE2_START 0x10000 83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84#define MSMFB_DRIVER_VERSION 0xF9E8D701 85#define MDP_IMGTYPE_END 0x100 86#define MDSS_GET_MAJOR(rev) ((rev) >> 28) 87#define MDSS_GET_MINOR(rev) (((rev) >> 16) & 0xFFF) 88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89#define MDSS_GET_STEP(rev) ((rev) & 0xFFFF) 90#define MDSS_GET_MAJOR_MINOR(rev) ((rev) >> 16) 91#define IS_MDSS_MAJOR_MINOR_SAME(rev1,rev2) (MDSS_GET_MAJOR_MINOR((rev1)) == MDSS_GET_MAJOR_MINOR((rev2))) 92#define MDSS_MDP_REV(major,minor,step) ((((major) & 0x000F) << 28) | (((minor) & 0x0FFF) << 16) | ((step) & 0xFFFF)) 93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94#define MDSS_MDP_HW_REV_100 MDSS_MDP_REV(1, 0, 0) 95#define MDSS_MDP_HW_REV_101 MDSS_MDP_REV(1, 1, 0) 96#define MDSS_MDP_HW_REV_101_1 MDSS_MDP_REV(1, 1, 1) 97#define MDSS_MDP_HW_REV_101_2 MDSS_MDP_REV(1, 1, 2) 98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99#define MDSS_MDP_HW_REV_102 MDSS_MDP_REV(1, 2, 0) 100#define MDSS_MDP_HW_REV_102_1 MDSS_MDP_REV(1, 2, 1) 101#define MDSS_MDP_HW_REV_103 MDSS_MDP_REV(1, 3, 0) 102#define MDSS_MDP_HW_REV_103_1 MDSS_MDP_REV(1, 3, 1) 103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104#define MDSS_MDP_HW_REV_105 MDSS_MDP_REV(1, 5, 0) 105#define MDSS_MDP_HW_REV_106 MDSS_MDP_REV(1, 6, 0) 106#define MDSS_MDP_HW_REV_107 MDSS_MDP_REV(1, 7, 0) 107#define MDSS_MDP_HW_REV_107_1 MDSS_MDP_REV(1, 7, 1) 108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109#define MDSS_MDP_HW_REV_107_2 MDSS_MDP_REV(1, 7, 2) 110#define MDSS_MDP_HW_REV_108 MDSS_MDP_REV(1, 8, 0) 111#define MDSS_MDP_HW_REV_109 MDSS_MDP_REV(1, 9, 0) 112#define MDSS_MDP_HW_REV_110 MDSS_MDP_REV(1, 10, 0) 113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114#define MDSS_MDP_HW_REV_200 MDSS_MDP_REV(2, 0, 0) 115#define MDSS_MDP_HW_REV_112 MDSS_MDP_REV(1, 12, 0) 116#define MDSS_MDP_HW_REV_114 MDSS_MDP_REV(1, 14, 0) 117#define MDSS_MDP_HW_REV_115 MDSS_MDP_REV(1, 15, 0) 118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119#define MDSS_MDP_HW_REV_116 MDSS_MDP_REV(1, 16, 0) 120#define MDSS_MDP_HW_REV_300 MDSS_MDP_REV(3, 0, 0) 121#define MDSS_MDP_HW_REV_301 MDSS_MDP_REV(3, 0, 1) 122enum { 123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124 NOTIFY_UPDATE_INIT, 125 NOTIFY_UPDATE_DEINIT, 126 NOTIFY_UPDATE_START, 127 NOTIFY_UPDATE_STOP, 128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129 NOTIFY_UPDATE_POWER_OFF, 130}; 131enum { 132 NOTIFY_TYPE_NO_UPDATE, 133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134 NOTIFY_TYPE_SUSPEND, 135 NOTIFY_TYPE_UPDATE, 136 NOTIFY_TYPE_BL_UPDATE, 137 NOTIFY_TYPE_BL_AD_ATTEN_UPDATE, 138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139}; 140enum { 141 MDP_RGB_565, 142 MDP_XRGB_8888, 143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144 MDP_Y_CBCR_H2V2, 145 MDP_Y_CBCR_H2V2_ADRENO, 146 MDP_ARGB_8888, 147 MDP_RGB_888, 148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149 MDP_Y_CRCB_H2V2, 150 MDP_YCRYCB_H2V1, 151 MDP_CBYCRY_H2V1, 152 MDP_Y_CRCB_H2V1, 153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154 MDP_Y_CBCR_H2V1, 155 MDP_Y_CRCB_H1V2, 156 MDP_Y_CBCR_H1V2, 157 MDP_RGBA_8888, 158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159 MDP_BGRA_8888, 160 MDP_RGBX_8888, 161 MDP_Y_CRCB_H2V2_TILE, 162 MDP_Y_CBCR_H2V2_TILE, 163/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164 MDP_Y_CR_CB_H2V2, 165 MDP_Y_CR_CB_GH2V2, 166 MDP_Y_CB_CR_H2V2, 167 MDP_Y_CRCB_H1V1, 168/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169 MDP_Y_CBCR_H1V1, 170 MDP_YCRCB_H1V1, 171 MDP_YCBCR_H1V1, 172 MDP_BGR_565, 173/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174 MDP_BGR_888, 175 MDP_Y_CBCR_H2V2_VENUS, 176 MDP_BGRX_8888, 177 MDP_RGBA_8888_TILE, 178/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179 MDP_ARGB_8888_TILE, 180 MDP_ABGR_8888_TILE, 181 MDP_BGRA_8888_TILE, 182 MDP_RGBX_8888_TILE, 183/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 184 MDP_XRGB_8888_TILE, 185 MDP_XBGR_8888_TILE, 186 MDP_BGRX_8888_TILE, 187 MDP_YCBYCR_H2V1, 188/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 189 MDP_RGB_565_TILE, 190 MDP_BGR_565_TILE, 191 MDP_ARGB_1555, 192 MDP_RGBA_5551, 193/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 194 MDP_ARGB_4444, 195 MDP_RGBA_4444, 196 MDP_RGB_565_UBWC, 197 MDP_RGBA_8888_UBWC, 198/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 199 MDP_Y_CBCR_H2V2_UBWC, 200 MDP_RGBX_8888_UBWC, 201 MDP_Y_CRCB_H2V2_VENUS, 202 MDP_IMGTYPE_LIMIT, 203/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 204 MDP_RGB_BORDERFILL, 205 MDP_XRGB_1555, 206 MDP_RGBX_5551, 207 MDP_XRGB_4444, 208/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 209 MDP_RGBX_4444, 210 MDP_ABGR_1555, 211 MDP_BGRA_5551, 212 MDP_XBGR_1555, 213/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 214 MDP_BGRX_5551, 215 MDP_ABGR_4444, 216 MDP_BGRA_4444, 217 MDP_XBGR_4444, 218/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 219 MDP_BGRX_4444, 220 MDP_ABGR_8888, 221 MDP_XBGR_8888, 222 MDP_RGBA_1010102, 223/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 224 MDP_ARGB_2101010, 225 MDP_RGBX_1010102, 226 MDP_XRGB_2101010, 227 MDP_BGRA_1010102, 228/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 229 MDP_ABGR_2101010, 230 MDP_BGRX_1010102, 231 MDP_XBGR_2101010, 232 MDP_RGBA_1010102_UBWC, 233/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 234 MDP_RGBX_1010102_UBWC, 235 MDP_Y_CBCR_H2V2_P010, 236 MDP_Y_CBCR_H2V2_TP10_UBWC, 237 MDP_CRYCBY_H2V1, 238/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 239 MDP_IMGTYPE_LIMIT1 = MDP_IMGTYPE_END, 240 MDP_FB_FORMAT = MDP_IMGTYPE2_START, 241 MDP_IMGTYPE_LIMIT2 242}; 243/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 244#define MDP_CRYCBY_H2V1 MDP_CRYCBY_H2V1 245enum { 246 PMEM_IMG, 247 FB_IMG, 248/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 249}; 250enum { 251 HSIC_HUE = 0, 252 HSIC_SAT, 253/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 254 HSIC_INT, 255 HSIC_CON, 256 NUM_HSIC_PARAM, 257}; 258/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 259enum mdss_mdp_max_bw_mode { 260 MDSS_MAX_BW_LIMIT_DEFAULT = 0x1, 261 MDSS_MAX_BW_LIMIT_CAMERA = 0x2, 262 MDSS_MAX_BW_LIMIT_HFLIP = 0x4, 263/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 264 MDSS_MAX_BW_LIMIT_VFLIP = 0x8, 265}; 266#define MDSS_MDP_ROT_ONLY 0x80 267#define MDSS_MDP_RIGHT_MIXER 0x100 268/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 269#define MDSS_MDP_DUAL_PIPE 0x200 270#define MDP_ROT_NOP 0 271#define MDP_FLIP_LR 0x1 272#define MDP_FLIP_UD 0x2 273/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 274#define MDP_ROT_90 0x4 275#define MDP_ROT_180 (MDP_FLIP_UD | MDP_FLIP_LR) 276#define MDP_ROT_270 (MDP_ROT_90 | MDP_FLIP_UD | MDP_FLIP_LR) 277#define MDP_DITHER 0x8 278/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 279#define MDP_BLUR 0x10 280#define MDP_BLEND_FG_PREMULT 0x20000 281#define MDP_IS_FG 0x40000 282#define MDP_SOLID_FILL 0x00000020 283/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 284#define MDP_VPU_PIPE 0x00000040 285#define MDP_DEINTERLACE 0x80000000 286#define MDP_SHARPENING 0x40000000 287#define MDP_NO_DMA_BARRIER_START 0x20000000 288/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 289#define MDP_NO_DMA_BARRIER_END 0x10000000 290#define MDP_NO_BLIT 0x08000000 291#define MDP_BLIT_WITH_DMA_BARRIERS 0x000 292#define MDP_BLIT_WITH_NO_DMA_BARRIERS (MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END) 293/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 294#define MDP_BLIT_SRC_GEM 0x04000000 295#define MDP_BLIT_DST_GEM 0x02000000 296#define MDP_BLIT_NON_CACHED 0x01000000 297#define MDP_OV_PIPE_SHARE 0x00800000 298/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 299#define MDP_DEINTERLACE_ODD 0x00400000 300#define MDP_OV_PLAY_NOWAIT 0x00200000 301#define MDP_SOURCE_ROTATED_90 0x00100000 302#define MDP_OVERLAY_PP_CFG_EN 0x00080000 303/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 304#define MDP_BACKEND_COMPOSITION 0x00040000 305#define MDP_BORDERFILL_SUPPORTED 0x00010000 306#define MDP_SECURE_OVERLAY_SESSION 0x00008000 307#define MDP_SECURE_DISPLAY_OVERLAY_SESSION 0x00002000 308/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 309#define MDP_OV_PIPE_FORCE_DMA 0x00004000 310#define MDP_MEMORY_ID_TYPE_FB 0x00001000 311#define MDP_BWC_EN 0x00000400 312#define MDP_DECIMATION_EN 0x00000800 313/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 314#define MDP_SMP_FORCE_ALLOC 0x00200000 315#define MDP_TRANSP_NOP 0xffffffff 316#define MDP_ALPHA_NOP 0xff 317#define MDP_FB_PAGE_PROTECTION_NONCACHED (0) 318/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 319#define MDP_FB_PAGE_PROTECTION_WRITECOMBINE (1) 320#define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2) 321#define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE (3) 322#define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE (4) 323/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 324#define MDP_FB_PAGE_PROTECTION_INVALID (5) 325#define MDP_NUM_FB_PAGE_PROTECTION_VALUES (5) 326struct mdp_rect { 327 uint32_t x; 328/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 329 uint32_t y; 330 uint32_t w; 331 uint32_t h; 332}; 333/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 334struct mdp_img { 335 uint32_t width; 336 uint32_t height; 337 uint32_t format; 338/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 339 uint32_t offset; 340 int memory_id; 341 uint32_t priv; 342}; 343/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 344struct mult_factor { 345 uint32_t numer; 346 uint32_t denom; 347}; 348/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 349#define MDP_CCS_RGB2YUV 0 350#define MDP_CCS_YUV2RGB 1 351#define MDP_CCS_SIZE 9 352#define MDP_BV_SIZE 3 353/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 354struct mdp_ccs { 355 int direction; 356 uint16_t ccs[MDP_CCS_SIZE]; 357 uint16_t bv[MDP_BV_SIZE]; 358/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 359}; 360struct mdp_csc { 361 int id; 362 uint32_t csc_mv[9]; 363/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 364 uint32_t csc_pre_bv[3]; 365 uint32_t csc_post_bv[3]; 366 uint32_t csc_pre_lv[6]; 367 uint32_t csc_post_lv[6]; 368/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 369}; 370#define MDP_BLIT_REQ_VERSION 3 371struct color { 372 uint32_t r; 373/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 374 uint32_t g; 375 uint32_t b; 376 uint32_t alpha; 377}; 378/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 379struct mdp_blit_req { 380 struct mdp_img src; 381 struct mdp_img dst; 382 struct mdp_rect src_rect; 383/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 384 struct mdp_rect dst_rect; 385 struct color const_color; 386 uint32_t alpha; 387 uint32_t transp_mask; 388/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 389 uint32_t flags; 390 int sharpening_strength; 391 uint8_t color_space; 392 uint32_t fps; 393/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 394}; 395struct mdp_blit_req_list { 396 uint32_t count; 397 struct mdp_blit_req req[]; 398/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 399}; 400#define MSMFB_DATA_VERSION 2 401struct msmfb_data { 402 uint32_t offset; 403/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 404 int memory_id; 405 int id; 406 uint32_t flags; 407 uint32_t priv; 408/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 409 uint32_t iova; 410}; 411#define MSMFB_NEW_REQUEST - 1 412struct msmfb_overlay_data { 413/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 414 uint32_t id; 415 struct msmfb_data data; 416 uint32_t version_key; 417 struct msmfb_data plane1_data; 418/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 419 struct msmfb_data plane2_data; 420 struct msmfb_data dst_data; 421}; 422struct msmfb_img { 423/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 424 uint32_t width; 425 uint32_t height; 426 uint32_t format; 427}; 428/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 429#define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1 430struct msmfb_writeback_data { 431 struct msmfb_data buf_info; 432 struct msmfb_img img; 433/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 434}; 435#define MDP_PP_OPS_ENABLE 0x1 436#define MDP_PP_OPS_READ 0x2 437#define MDP_PP_OPS_WRITE 0x4 438/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 439#define MDP_PP_OPS_DISABLE 0x8 440#define MDP_PP_IGC_FLAG_ROM0 0x10 441#define MDP_PP_IGC_FLAG_ROM1 0x20 442#define MDSS_PP_DSPP_CFG 0x000 443/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 444#define MDSS_PP_SSPP_CFG 0x100 445#define MDSS_PP_LM_CFG 0x200 446#define MDSS_PP_WB_CFG 0x300 447#define MDSS_PP_ARG_MASK 0x3C00 448/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 449#define MDSS_PP_ARG_NUM 4 450#define MDSS_PP_ARG_SHIFT 10 451#define MDSS_PP_LOCATION_MASK 0x0300 452#define MDSS_PP_LOGICAL_MASK 0x00FF 453/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 454#define MDSS_PP_ADD_ARG(var,arg) ((var) | (0x1 << (MDSS_PP_ARG_SHIFT + (arg)))) 455#define PP_ARG(x,var) ((var) & (0x1 << (MDSS_PP_ARG_SHIFT + (x)))) 456#define PP_LOCAT(var) ((var) & MDSS_PP_LOCATION_MASK) 457#define PP_BLOCK(var) ((var) & MDSS_PP_LOGICAL_MASK) 458/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 459struct mdp_qseed_cfg { 460 uint32_t table_num; 461 uint32_t ops; 462 uint32_t len; 463/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 464 uint32_t * data; 465}; 466struct mdp_sharp_cfg { 467 uint32_t flags; 468/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 469 uint32_t strength; 470 uint32_t edge_thr; 471 uint32_t smooth_thr; 472 uint32_t noise_thr; 473/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 474}; 475struct mdp_qseed_cfg_data { 476 uint32_t block; 477 struct mdp_qseed_cfg qseed_data; 478/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 479}; 480#define MDP_OVERLAY_PP_CSC_CFG 0x1 481#define MDP_OVERLAY_PP_QSEED_CFG 0x2 482#define MDP_OVERLAY_PP_PA_CFG 0x4 483/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 484#define MDP_OVERLAY_PP_IGC_CFG 0x8 485#define MDP_OVERLAY_PP_SHARP_CFG 0x10 486#define MDP_OVERLAY_PP_HIST_CFG 0x20 487#define MDP_OVERLAY_PP_HIST_LUT_CFG 0x40 488/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 489#define MDP_OVERLAY_PP_PA_V2_CFG 0x80 490#define MDP_OVERLAY_PP_PCC_CFG 0x100 491#define MDP_CSC_FLAG_ENABLE 0x1 492#define MDP_CSC_FLAG_YUV_IN 0x2 493/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 494#define MDP_CSC_FLAG_YUV_OUT 0x4 495#define MDP_CSC_MATRIX_COEFF_SIZE 9 496#define MDP_CSC_CLAMP_SIZE 6 497#define MDP_CSC_BIAS_SIZE 3 498/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 499struct mdp_csc_cfg { 500 uint32_t flags; 501 uint32_t csc_mv[MDP_CSC_MATRIX_COEFF_SIZE]; 502 uint32_t csc_pre_bv[MDP_CSC_BIAS_SIZE]; 503/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 504 uint32_t csc_post_bv[MDP_CSC_BIAS_SIZE]; 505 uint32_t csc_pre_lv[MDP_CSC_CLAMP_SIZE]; 506 uint32_t csc_post_lv[MDP_CSC_CLAMP_SIZE]; 507}; 508/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 509struct mdp_csc_cfg_data { 510 uint32_t block; 511 struct mdp_csc_cfg csc_data; 512}; 513/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 514struct mdp_pa_cfg { 515 uint32_t flags; 516 uint32_t hue_adj; 517 uint32_t sat_adj; 518/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 519 uint32_t val_adj; 520 uint32_t cont_adj; 521}; 522struct mdp_pa_mem_col_cfg { 523/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 524 uint32_t color_adjust_p0; 525 uint32_t color_adjust_p1; 526 uint32_t hue_region; 527 uint32_t sat_region; 528/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 529 uint32_t val_region; 530}; 531#define MDP_SIX_ZONE_LUT_SIZE 384 532#define MDP_PP_PA_HUE_ENABLE 0x10 533/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 534#define MDP_PP_PA_SAT_ENABLE 0x20 535#define MDP_PP_PA_VAL_ENABLE 0x40 536#define MDP_PP_PA_CONT_ENABLE 0x80 537#define MDP_PP_PA_SIX_ZONE_ENABLE 0x100 538/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 539#define MDP_PP_PA_SKIN_ENABLE 0x200 540#define MDP_PP_PA_SKY_ENABLE 0x400 541#define MDP_PP_PA_FOL_ENABLE 0x800 542#define MDP_PP_PA_MEM_PROT_HUE_EN 0x1 543/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 544#define MDP_PP_PA_MEM_PROT_SAT_EN 0x2 545#define MDP_PP_PA_MEM_PROT_VAL_EN 0x4 546#define MDP_PP_PA_MEM_PROT_CONT_EN 0x8 547#define MDP_PP_PA_MEM_PROT_SIX_EN 0x10 548/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 549#define MDP_PP_PA_MEM_PROT_BLEND_EN 0x20 550#define MDP_PP_PA_HUE_MASK 0x1000 551#define MDP_PP_PA_SAT_MASK 0x2000 552#define MDP_PP_PA_VAL_MASK 0x4000 553/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 554#define MDP_PP_PA_CONT_MASK 0x8000 555#define MDP_PP_PA_SIX_ZONE_HUE_MASK 0x10000 556#define MDP_PP_PA_SIX_ZONE_SAT_MASK 0x20000 557#define MDP_PP_PA_SIX_ZONE_VAL_MASK 0x40000 558/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 559#define MDP_PP_PA_MEM_COL_SKIN_MASK 0x80000 560#define MDP_PP_PA_MEM_COL_SKY_MASK 0x100000 561#define MDP_PP_PA_MEM_COL_FOL_MASK 0x200000 562#define MDP_PP_PA_MEM_PROTECT_EN 0x400000 563/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 564#define MDP_PP_PA_SAT_ZERO_EXP_EN 0x800000 565#define MDP_PP_PA_LEFT_HOLD 0x1 566#define MDP_PP_PA_RIGHT_HOLD 0x2 567struct mdp_pa_v2_data { 568/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 569 uint32_t flags; 570 uint32_t global_hue_adj; 571 uint32_t global_sat_adj; 572 uint32_t global_val_adj; 573/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 574 uint32_t global_cont_adj; 575 struct mdp_pa_mem_col_cfg skin_cfg; 576 struct mdp_pa_mem_col_cfg sky_cfg; 577 struct mdp_pa_mem_col_cfg fol_cfg; 578/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 579 uint32_t six_zone_len; 580 uint32_t six_zone_thresh; 581 uint32_t * six_zone_curve_p0; 582 uint32_t * six_zone_curve_p1; 583/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 584}; 585struct mdp_pa_mem_col_data_v1_7 { 586 uint32_t color_adjust_p0; 587 uint32_t color_adjust_p1; 588/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 589 uint32_t color_adjust_p2; 590 uint32_t blend_gain; 591 uint8_t sat_hold; 592 uint8_t val_hold; 593/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 594 uint32_t hue_region; 595 uint32_t sat_region; 596 uint32_t val_region; 597}; 598/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 599struct mdp_pa_data_v1_7 { 600 uint32_t mode; 601 uint32_t global_hue_adj; 602 uint32_t global_sat_adj; 603/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 604 uint32_t global_val_adj; 605 uint32_t global_cont_adj; 606 struct mdp_pa_mem_col_data_v1_7 skin_cfg; 607 struct mdp_pa_mem_col_data_v1_7 sky_cfg; 608/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 609 struct mdp_pa_mem_col_data_v1_7 fol_cfg; 610 uint32_t six_zone_thresh; 611 uint32_t six_zone_adj_p0; 612 uint32_t six_zone_adj_p1; 613/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 614 uint8_t six_zone_sat_hold; 615 uint8_t six_zone_val_hold; 616 uint32_t six_zone_len; 617 uint32_t * six_zone_curve_p0; 618/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 619 uint32_t * six_zone_curve_p1; 620}; 621struct mdp_pa_v2_cfg_data { 622 uint32_t version; 623/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 624 uint32_t block; 625 uint32_t flags; 626 struct mdp_pa_v2_data pa_v2_data; 627 void * cfg_payload; 628/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 629}; 630enum { 631 mdp_igc_rec601 = 1, 632 mdp_igc_rec709, 633/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 634 mdp_igc_srgb, 635 mdp_igc_custom, 636 mdp_igc_rec_max, 637}; 638/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 639struct mdp_igc_lut_data { 640 uint32_t block; 641 uint32_t version; 642 uint32_t len, ops; 643/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 644 uint32_t * c0_c1_data; 645 uint32_t * c2_data; 646 void * cfg_payload; 647}; 648/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 649struct mdp_igc_lut_data_v1_7 { 650 uint32_t table_fmt; 651 uint32_t len; 652 uint32_t * c0_c1_data; 653/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 654 uint32_t * c2_data; 655}; 656struct mdp_histogram_cfg { 657 uint32_t ops; 658/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 659 uint32_t block; 660 uint8_t frame_cnt; 661 uint8_t bit_mask; 662 uint16_t num_bins; 663/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 664}; 665struct mdp_hist_lut_data_v1_7 { 666 uint32_t len; 667 uint32_t * data; 668/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 669}; 670struct mdp_hist_lut_data { 671 uint32_t block; 672 uint32_t version; 673/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 674 uint32_t hist_lut_first; 675 uint32_t ops; 676 uint32_t len; 677 uint32_t * data; 678/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 679 void * cfg_payload; 680}; 681struct mdp_pcc_coeff { 682 uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1; 683/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 684}; 685struct mdp_pcc_coeff_v1_7 { 686 uint32_t c, r, g, b, rg, gb, rb, rgb; 687}; 688/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 689struct mdp_pcc_data_v1_7 { 690 struct mdp_pcc_coeff_v1_7 r, g, b; 691}; 692struct mdp_pcc_cfg_data { 693/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 694 uint32_t version; 695 uint32_t block; 696 uint32_t ops; 697 struct mdp_pcc_coeff r, g, b; 698/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 699 void * cfg_payload; 700}; 701enum { 702 mdp_lut_igc, 703/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 704 mdp_lut_pgc, 705 mdp_lut_hist, 706 mdp_lut_rgb, 707 mdp_lut_max, 708/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 709}; 710struct mdp_overlay_pp_params { 711 uint32_t config_ops; 712 struct mdp_csc_cfg csc_cfg; 713/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 714 struct mdp_qseed_cfg qseed_cfg[2]; 715 struct mdp_pa_cfg pa_cfg; 716 struct mdp_pa_v2_data pa_v2_cfg; 717 struct mdp_igc_lut_data igc_cfg; 718/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 719 struct mdp_sharp_cfg sharp_cfg; 720 struct mdp_histogram_cfg hist_cfg; 721 struct mdp_hist_lut_data hist_lut_cfg; 722 struct mdp_pa_v2_cfg_data pa_v2_cfg_data; 723/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 724 struct mdp_pcc_cfg_data pcc_cfg_data; 725}; 726enum mdss_mdp_blend_op { 727 BLEND_OP_NOT_DEFINED = 0, 728/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 729 BLEND_OP_OPAQUE, 730 BLEND_OP_PREMULTIPLIED, 731 BLEND_OP_COVERAGE, 732 BLEND_OP_MAX, 733/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 734}; 735#define DECIMATED_DIMENSION(dim,deci) (((dim) + ((1 << (deci)) - 1)) >> (deci)) 736#define MAX_PLANES 4 737struct mdp_scale_data { 738/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 739 uint8_t enable_pxl_ext; 740 int init_phase_x[MAX_PLANES]; 741 int phase_step_x[MAX_PLANES]; 742 int init_phase_y[MAX_PLANES]; 743/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 744 int phase_step_y[MAX_PLANES]; 745 int num_ext_pxls_left[MAX_PLANES]; 746 int num_ext_pxls_right[MAX_PLANES]; 747 int num_ext_pxls_top[MAX_PLANES]; 748/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 749 int num_ext_pxls_btm[MAX_PLANES]; 750 int left_ftch[MAX_PLANES]; 751 int left_rpt[MAX_PLANES]; 752 int right_ftch[MAX_PLANES]; 753/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 754 int right_rpt[MAX_PLANES]; 755 int top_rpt[MAX_PLANES]; 756 int btm_rpt[MAX_PLANES]; 757 int top_ftch[MAX_PLANES]; 758/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 759 int btm_ftch[MAX_PLANES]; 760 uint32_t roi_w[MAX_PLANES]; 761}; 762enum mdp_overlay_pipe_type { 763/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 764 PIPE_TYPE_AUTO = 0, 765 PIPE_TYPE_VIG, 766 PIPE_TYPE_RGB, 767 PIPE_TYPE_DMA, 768/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 769 PIPE_TYPE_CURSOR, 770 PIPE_TYPE_MAX, 771}; 772struct mdp_overlay { 773/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 774 struct msmfb_img src; 775 struct mdp_rect src_rect; 776 struct mdp_rect dst_rect; 777 uint32_t z_order; 778/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 779 uint32_t is_fg; 780 uint32_t alpha; 781 uint32_t blend_op; 782 uint32_t transp_mask; 783/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 784 uint32_t flags; 785 uint32_t pipe_type; 786 uint32_t id; 787 uint8_t priority; 788/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 789 uint32_t user_data[6]; 790 uint32_t bg_color; 791 uint8_t horz_deci; 792 uint8_t vert_deci; 793/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 794 struct mdp_overlay_pp_params overlay_pp_cfg; 795 struct mdp_scale_data scale; 796 uint8_t color_space; 797 uint32_t frame_rate; 798/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 799}; 800struct msmfb_overlay_3d { 801 uint32_t is_3d; 802 uint32_t width; 803/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 804 uint32_t height; 805}; 806struct msmfb_overlay_blt { 807 uint32_t enable; 808/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 809 uint32_t offset; 810 uint32_t width; 811 uint32_t height; 812 uint32_t bpp; 813/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 814}; 815struct mdp_histogram { 816 uint32_t frame_cnt; 817 uint32_t bin_cnt; 818/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 819 uint32_t * r; 820 uint32_t * g; 821 uint32_t * b; 822}; 823/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 824#define MISR_CRC_BATCH_SIZE 32 825enum { 826 DISPLAY_MISR_EDP, 827 DISPLAY_MISR_DSI0, 828/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 829 DISPLAY_MISR_DSI1, 830 DISPLAY_MISR_HDMI, 831 DISPLAY_MISR_LCDC, 832 DISPLAY_MISR_MDP, 833/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 834 DISPLAY_MISR_ATV, 835 DISPLAY_MISR_DSI_CMD, 836 DISPLAY_MISR_MAX 837}; 838/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 839enum { 840 MISR_OP_NONE, 841 MISR_OP_SFM, 842 MISR_OP_MFM, 843/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 844 MISR_OP_BM, 845 MISR_OP_MAX 846}; 847struct mdp_misr { 848/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 849 uint32_t block_id; 850 uint32_t frame_count; 851 uint32_t crc_op_mode; 852 uint32_t crc_value[MISR_CRC_BATCH_SIZE]; 853/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 854}; 855enum { 856 MDP_BLOCK_RESERVED = 0, 857 MDP_BLOCK_OVERLAY_0, 858/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 859 MDP_BLOCK_OVERLAY_1, 860 MDP_BLOCK_VG_1, 861 MDP_BLOCK_VG_2, 862 MDP_BLOCK_RGB_1, 863/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 864 MDP_BLOCK_RGB_2, 865 MDP_BLOCK_DMA_P, 866 MDP_BLOCK_DMA_S, 867 MDP_BLOCK_DMA_E, 868/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 869 MDP_BLOCK_OVERLAY_2, 870 MDP_LOGICAL_BLOCK_DISP_0 = 0x10, 871 MDP_LOGICAL_BLOCK_DISP_1, 872 MDP_LOGICAL_BLOCK_DISP_2, 873/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 874 MDP_BLOCK_MAX, 875}; 876struct mdp_histogram_start_req { 877 uint32_t block; 878/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 879 uint8_t frame_cnt; 880 uint8_t bit_mask; 881 uint16_t num_bins; 882}; 883/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 884struct mdp_histogram_data { 885 uint32_t block; 886 uint32_t bin_cnt; 887 uint32_t * c0; 888/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 889 uint32_t * c1; 890 uint32_t * c2; 891 uint32_t * extra_info; 892}; 893/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 894#define GC_LUT_ENTRIES_V1_7 512 895struct mdp_ar_gc_lut_data { 896 uint32_t x_start; 897 uint32_t slope; 898/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 899 uint32_t offset; 900}; 901#define MDP_PP_PGC_ROUNDING_ENABLE 0x10 902struct mdp_pgc_lut_data { 903/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 904 uint32_t version; 905 uint32_t block; 906 uint32_t flags; 907 uint8_t num_r_stages; 908/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 909 uint8_t num_g_stages; 910 uint8_t num_b_stages; 911 struct mdp_ar_gc_lut_data * r_data; 912 struct mdp_ar_gc_lut_data * g_data; 913/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 914 struct mdp_ar_gc_lut_data * b_data; 915 void * cfg_payload; 916}; 917#define PGC_LUT_ENTRIES 1024 918/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 919struct mdp_pgc_lut_data_v1_7 { 920 uint32_t len; 921 uint32_t * c0_data; 922 uint32_t * c1_data; 923/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 924 uint32_t * c2_data; 925}; 926struct mdp_rgb_lut_data { 927 uint32_t flags; 928/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 929 uint32_t lut_type; 930 struct fb_cmap cmap; 931}; 932enum { 933/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 934 mdp_rgb_lut_gc, 935 mdp_rgb_lut_hist, 936}; 937struct mdp_lut_cfg_data { 938/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 939 uint32_t lut_type; 940 union { 941 struct mdp_igc_lut_data igc_lut_data; 942 struct mdp_pgc_lut_data pgc_lut_data; 943/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 944 struct mdp_hist_lut_data hist_lut_data; 945 struct mdp_rgb_lut_data rgb_lut_data; 946 } data; 947}; 948/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 949struct mdp_bl_scale_data { 950 uint32_t min_lvl; 951 uint32_t scale; 952}; 953/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 954struct mdp_pa_cfg_data { 955 uint32_t block; 956 struct mdp_pa_cfg pa_data; 957}; 958/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 959#define MDP_DITHER_DATA_V1_7_SZ 16 960struct mdp_dither_data_v1_7 { 961 uint32_t g_y_depth; 962 uint32_t r_cr_depth; 963/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 964 uint32_t b_cb_depth; 965 uint32_t len; 966 uint32_t data[MDP_DITHER_DATA_V1_7_SZ]; 967 uint32_t temporal_en; 968/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 969}; 970struct mdp_dither_cfg_data { 971 uint32_t version; 972 uint32_t block; 973/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 974 uint32_t flags; 975 uint32_t mode; 976 uint32_t g_y_depth; 977 uint32_t r_cr_depth; 978/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 979 uint32_t b_cb_depth; 980 void * cfg_payload; 981}; 982#define MDP_GAMUT_TABLE_NUM 8 983/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 984#define MDP_GAMUT_TABLE_NUM_V1_7 4 985#define MDP_GAMUT_SCALE_OFF_TABLE_NUM 3 986#define MDP_GAMUT_TABLE_V1_7_SZ 1229 987#define MDP_GAMUT_SCALE_OFF_SZ 16 988/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 989#define MDP_GAMUT_TABLE_V1_7_COARSE_SZ 32 990struct mdp_gamut_cfg_data { 991 uint32_t block; 992 uint32_t flags; 993/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 994 uint32_t version; 995 uint32_t gamut_first; 996 uint32_t tbl_size[MDP_GAMUT_TABLE_NUM]; 997 uint16_t * r_tbl[MDP_GAMUT_TABLE_NUM]; 998/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 999 uint16_t * g_tbl[MDP_GAMUT_TABLE_NUM]; 1000 uint16_t * b_tbl[MDP_GAMUT_TABLE_NUM]; 1001 void * cfg_payload; 1002}; 1003/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1004enum { 1005 mdp_gamut_fine_mode = 0x1, 1006 mdp_gamut_coarse_mode, 1007}; 1008/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1009struct mdp_gamut_data_v1_7 { 1010 uint32_t mode; 1011 uint32_t map_en; 1012 uint32_t tbl_size[MDP_GAMUT_TABLE_NUM_V1_7]; 1013/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1014 uint32_t * c0_data[MDP_GAMUT_TABLE_NUM_V1_7]; 1015 uint32_t * c1_c2_data[MDP_GAMUT_TABLE_NUM_V1_7]; 1016 uint32_t tbl_scale_off_sz[MDP_GAMUT_SCALE_OFF_TABLE_NUM]; 1017 uint32_t * scale_off_data[MDP_GAMUT_SCALE_OFF_TABLE_NUM]; 1018/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1019}; 1020struct mdp_calib_config_data { 1021 uint32_t ops; 1022 uint32_t addr; 1023/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1024 uint32_t data; 1025}; 1026struct mdp_calib_config_buffer { 1027 uint32_t ops; 1028/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1029 uint32_t size; 1030 uint32_t * buffer; 1031}; 1032struct mdp_calib_dcm_state { 1033/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1034 uint32_t ops; 1035 uint32_t dcm_state; 1036}; 1037enum { 1038/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1039 DCM_UNINIT, 1040 DCM_UNBLANK, 1041 DCM_ENTER, 1042 DCM_EXIT, 1043/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1044 DCM_BLANK, 1045 DTM_ENTER, 1046 DTM_EXIT, 1047}; 1048/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1049#define MDSS_PP_SPLIT_LEFT_ONLY 0x10000000 1050#define MDSS_PP_SPLIT_RIGHT_ONLY 0x20000000 1051#define MDSS_PP_SPLIT_MASK 0x30000000 1052#define MDSS_MAX_BL_BRIGHTNESS 255 1053/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1054#define AD_BL_LIN_LEN 256 1055#define AD_BL_ATT_LUT_LEN 33 1056#define MDSS_AD_MODE_AUTO_BL 0x0 1057#define MDSS_AD_MODE_AUTO_STR 0x1 1058/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1059#define MDSS_AD_MODE_TARG_STR 0x3 1060#define MDSS_AD_MODE_MAN_STR 0x7 1061#define MDSS_AD_MODE_CALIB 0xF 1062#define MDP_PP_AD_INIT 0x10 1063/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1064#define MDP_PP_AD_CFG 0x20 1065struct mdss_ad_init { 1066 uint32_t asym_lut[33]; 1067 uint32_t color_corr_lut[33]; 1068/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1069 uint8_t i_control[2]; 1070 uint16_t black_lvl; 1071 uint16_t white_lvl; 1072 uint8_t var; 1073/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1074 uint8_t limit_ampl; 1075 uint8_t i_dither; 1076 uint8_t slope_max; 1077 uint8_t slope_min; 1078/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1079 uint8_t dither_ctl; 1080 uint8_t format; 1081 uint8_t auto_size; 1082 uint16_t frame_w; 1083/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1084 uint16_t frame_h; 1085 uint8_t logo_v; 1086 uint8_t logo_h; 1087 uint32_t alpha; 1088/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1089 uint32_t alpha_base; 1090 uint32_t al_thresh; 1091 uint32_t bl_lin_len; 1092 uint32_t bl_att_len; 1093/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1094 uint32_t * bl_lin; 1095 uint32_t * bl_lin_inv; 1096 uint32_t * bl_att_lut; 1097}; 1098/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1099#define MDSS_AD_BL_CTRL_MODE_EN 1 1100#define MDSS_AD_BL_CTRL_MODE_DIS 0 1101struct mdss_ad_cfg { 1102 uint32_t mode; 1103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1104 uint32_t al_calib_lut[33]; 1105 uint16_t backlight_min; 1106 uint16_t backlight_max; 1107 uint16_t backlight_scale; 1108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1109 uint16_t amb_light_min; 1110 uint16_t filter[2]; 1111 uint16_t calib[4]; 1112 uint8_t strength_limit; 1113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1114 uint8_t t_filter_recursion; 1115 uint16_t stab_itr; 1116 uint32_t bl_ctrl_mode; 1117}; 1118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1119struct mdss_ad_init_cfg { 1120 uint32_t ops; 1121 union { 1122 struct mdss_ad_init init; 1123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1124 struct mdss_ad_cfg cfg; 1125 } params; 1126}; 1127struct mdss_ad_input { 1128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1129 uint32_t mode; 1130 union { 1131 uint32_t amb_light; 1132 uint32_t strength; 1133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1134 uint32_t calib_bl; 1135 } in; 1136 uint32_t output; 1137}; 1138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1139#define MDSS_CALIB_MODE_BL 0x1 1140struct mdss_calib_cfg { 1141 uint32_t ops; 1142 uint32_t calib_mask; 1143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1144}; 1145enum { 1146 mdp_op_pcc_cfg, 1147 mdp_op_csc_cfg, 1148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1149 mdp_op_lut_cfg, 1150 mdp_op_qseed_cfg, 1151 mdp_bl_scale_cfg, 1152 mdp_op_pa_cfg, 1153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1154 mdp_op_pa_v2_cfg, 1155 mdp_op_dither_cfg, 1156 mdp_op_gamut_cfg, 1157 mdp_op_calib_cfg, 1158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1159 mdp_op_ad_cfg, 1160 mdp_op_ad_input, 1161 mdp_op_calib_mode, 1162 mdp_op_calib_buffer, 1163/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1164 mdp_op_calib_dcm_state, 1165 mdp_op_max, 1166}; 1167enum { 1168/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1169 WB_FORMAT_NV12, 1170 WB_FORMAT_RGB_565, 1171 WB_FORMAT_RGB_888, 1172 WB_FORMAT_xRGB_8888, 1173/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1174 WB_FORMAT_ARGB_8888, 1175 WB_FORMAT_BGRA_8888, 1176 WB_FORMAT_BGRX_8888, 1177 WB_FORMAT_ARGB_8888_INPUT_ALPHA 1178/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1179}; 1180struct msmfb_mdp_pp { 1181 uint32_t op; 1182 union { 1183/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1184 struct mdp_pcc_cfg_data pcc_cfg_data; 1185 struct mdp_csc_cfg_data csc_cfg_data; 1186 struct mdp_lut_cfg_data lut_cfg_data; 1187 struct mdp_qseed_cfg_data qseed_cfg_data; 1188/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1189 struct mdp_bl_scale_data bl_scale_data; 1190 struct mdp_pa_cfg_data pa_cfg_data; 1191 struct mdp_pa_v2_cfg_data pa_v2_cfg_data; 1192 struct mdp_dither_cfg_data dither_cfg_data; 1193/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1194 struct mdp_gamut_cfg_data gamut_cfg_data; 1195 struct mdp_calib_config_data calib_cfg; 1196 struct mdss_ad_init_cfg ad_init_cfg; 1197 struct mdss_calib_cfg mdss_calib_cfg; 1198/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1199 struct mdss_ad_input ad_input; 1200 struct mdp_calib_config_buffer calib_buffer; 1201 struct mdp_calib_dcm_state calib_dcm; 1202 } data; 1203/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1204}; 1205#define FB_METADATA_VIDEO_INFO_CODE_SUPPORT 1 1206enum { 1207 metadata_op_none, 1208/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1209 metadata_op_base_blend, 1210 metadata_op_frame_rate, 1211 metadata_op_vic, 1212 metadata_op_wb_format, 1213/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1214 metadata_op_wb_secure, 1215 metadata_op_get_caps, 1216 metadata_op_crc, 1217 metadata_op_get_ion_fd, 1218/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1219 metadata_op_max 1220}; 1221struct mdp_blend_cfg { 1222 uint32_t is_premultiplied; 1223/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1224}; 1225struct mdp_mixer_cfg { 1226 uint32_t writeback_format; 1227 uint32_t alpha; 1228/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1229}; 1230struct mdss_hw_caps { 1231 uint32_t mdp_rev; 1232 uint8_t rgb_pipes; 1233/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1234 uint8_t vig_pipes; 1235 uint8_t dma_pipes; 1236 uint8_t max_smp_cnt; 1237 uint8_t smp_per_pipe; 1238/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1239 uint32_t features; 1240}; 1241struct msmfb_metadata { 1242 uint32_t op; 1243/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1244 uint32_t flags; 1245 union { 1246 struct mdp_misr misr_request; 1247 struct mdp_blend_cfg blend_cfg; 1248/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1249 struct mdp_mixer_cfg mixer_cfg; 1250 uint32_t panel_frame_rate; 1251 uint32_t video_info_code; 1252 struct mdss_hw_caps caps; 1253/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1254 uint8_t secure_en; 1255 int fbmem_ionfd; 1256 } data; 1257}; 1258/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1259#define MDP_MAX_FENCE_FD 32 1260#define MDP_BUF_SYNC_FLAG_WAIT 1 1261#define MDP_BUF_SYNC_FLAG_RETIRE_FENCE 0x10 1262struct mdp_buf_sync { 1263/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1264 uint32_t flags; 1265 uint32_t acq_fen_fd_cnt; 1266 uint32_t session_id; 1267 int * acq_fen_fd; 1268/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1269 int * rel_fen_fd; 1270 int * retire_fen_fd; 1271}; 1272struct mdp_async_blit_req_list { 1273/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1274 struct mdp_buf_sync sync; 1275 uint32_t count; 1276 struct mdp_blit_req req[]; 1277}; 1278/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1279#define MDP_DISPLAY_COMMIT_OVERLAY 1 1280struct mdp_display_commit { 1281 uint32_t flags; 1282 uint32_t wait_for_finish; 1283/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1284 struct fb_var_screeninfo var; 1285 struct mdp_rect l_roi; 1286 struct mdp_rect r_roi; 1287}; 1288/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1289struct mdp_overlay_list { 1290 uint32_t num_overlays; 1291 struct mdp_overlay * * overlay_list; 1292 uint32_t flags; 1293/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1294 uint32_t processed_overlays; 1295}; 1296struct mdp_page_protection { 1297 uint32_t page_protection; 1298/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1299}; 1300struct mdp_mixer_info { 1301 int pndx; 1302 int pnum; 1303/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1304 int ptype; 1305 int mixer_num; 1306 int z_order; 1307}; 1308/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1309#define MAX_PIPE_PER_MIXER 7 1310struct msmfb_mixer_info_req { 1311 int mixer_num; 1312 int cnt; 1313/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1314 struct mdp_mixer_info info[MAX_PIPE_PER_MIXER]; 1315}; 1316enum { 1317 DISPLAY_SUBSYSTEM_ID, 1318/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1319 ROTATOR_SUBSYSTEM_ID, 1320}; 1321enum { 1322 MDP_IOMMU_DOMAIN_CP, 1323/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1324 MDP_IOMMU_DOMAIN_NS, 1325}; 1326enum { 1327 MDP_WRITEBACK_MIRROR_OFF, 1328/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1329 MDP_WRITEBACK_MIRROR_ON, 1330 MDP_WRITEBACK_MIRROR_PAUSE, 1331 MDP_WRITEBACK_MIRROR_RESUME, 1332}; 1333/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1334enum mdp_color_space { 1335 MDP_CSC_ITU_R_601, 1336 MDP_CSC_ITU_R_601_FR, 1337 MDP_CSC_ITU_R_709, 1338/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1339}; 1340enum { 1341 mdp_igc_v1_7 = 1, 1342 mdp_igc_vmax, 1343/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1344 mdp_hist_lut_v1_7, 1345 mdp_hist_lut_vmax, 1346 mdp_pgc_v1_7, 1347 mdp_pgc_vmax, 1348/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1349 mdp_dither_v1_7, 1350 mdp_dither_vmax, 1351 mdp_gamut_v1_7, 1352 mdp_gamut_vmax, 1353/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1354 mdp_pa_v1_7, 1355 mdp_pa_vmax, 1356 mdp_pcc_v1_7, 1357 mdp_pcc_vmax, 1358/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1359 mdp_pp_legacy, 1360}; 1361enum { 1362 IGC = 1, 1363/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1364 PCC, 1365 GC, 1366 PA, 1367 GAMUT, 1368/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1369 DITHER, 1370 QSEED, 1371 HIST_LUT, 1372 HIST, 1373/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1374 PP_FEATURE_MAX, 1375}; 1376struct mdp_pp_feature_version { 1377 uint32_t pp_feature; 1378/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 1379 uint32_t version_info; 1380}; 1381#endif 1382 1383