1/* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved. 2 * 3 * This program is free software; you can redistribute it and/or modify 4 * it under the terms of the GNU General Public License version 2 and 5 * only version 2 as published by the Free Software Foundation. 6 * 7 * This program is distributed in the hope that it will be useful, 8 * but WITHOUT ANY WARRANTY; without even the implied warranty of 9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 * GNU General Public License for more details. 11 */ 12 13/* 14 * This header file defines the types and structures that were defined in 15 * ipa. It contains the constant values defined, enums, structures, 16 * messages, and service message IDs (in that order) Structures that were 17 * defined in the IDL as messages contain mandatory elements, optional 18 * elements, a combination of mandatory and optional elements (mandatory 19 * always come before optionals in the structure), or nothing (null message) 20 21 * An optional element in a message is preceded by a uint8_t value that must be 22 * set to true if the element is going to be included. When decoding a received 23 * message, the uint8_t values will be set to true or false by the decode 24 * routine, and should be checked before accessing the values that they 25 * correspond to. 26 27 * Variable sized arrays are defined as static sized arrays with an unsigned 28 * integer (32 bit) preceding it that must be set to the number of elements 29 * in the array that are valid. For Example: 30 31 * uint32_t test_opaque_len; 32 * uint8_t test_opaque[16]; 33 34 * If only 4 elements are added to test_opaque[] then test_opaque_len must be 35 * set to 4 before sending the message. When decoding, the _len value is set 36 * by the decode routine and should be checked so that the correct number of 37 * elements in the array will be accessed. 38 */ 39#ifndef IPA_QMI_SERVICE_V01_H 40#define IPA_QMI_SERVICE_V01_H 41 42#define QMI_IPA_IPFLTR_NUM_IHL_RANGE_16_EQNS_V01 2 43#define QMI_IPA_IPFLTR_NUM_MEQ_32_EQNS_V01 2 44#define QMI_IPA_IPFLTR_NUM_IHL_MEQ_32_EQNS_V01 2 45#define QMI_IPA_IPFLTR_NUM_MEQ_128_EQNS_V01 2 46#define QMI_IPA_MAX_FILTERS_V01 64 47#define QMI_IPA_MAX_FILTERS_EX_V01 128 48#define QMI_IPA_MAX_PIPES_V01 20 49#define QMI_IPA_MAX_APN_V01 8 50 51#define IPA_INT_MAX ((int)(~0U>>1)) 52#define IPA_INT_MIN (-IPA_INT_MAX - 1) 53 54/* IPA definition as msm_qmi_interface.h */ 55 56enum ipa_qmi_result_type_v01 { 57 /* To force a 32 bit signed enum. Do not change or use*/ 58 IPA_QMI_RESULT_TYPE_MIN_ENUM_VAL_V01 = IPA_INT_MIN, 59 IPA_QMI_RESULT_SUCCESS_V01 = 0, 60 IPA_QMI_RESULT_FAILURE_V01 = 1, 61 IPA_QMI_RESULT_TYPE_MAX_ENUM_VAL_V01 = IPA_INT_MAX, 62}; 63 64enum ipa_qmi_error_type_v01 { 65 /* To force a 32 bit signed enum. Do not change or use*/ 66 IPA_QMI_ERROR_TYPE_MIN_ENUM_VAL_V01 = IPA_INT_MIN, 67 IPA_QMI_ERR_NONE_V01 = 0x0000, 68 IPA_QMI_ERR_MALFORMED_MSG_V01 = 0x0001, 69 IPA_QMI_ERR_NO_MEMORY_V01 = 0x0002, 70 IPA_QMI_ERR_INTERNAL_V01 = 0x0003, 71 IPA_QMI_ERR_CLIENT_IDS_EXHAUSTED_V01 = 0x0005, 72 IPA_QMI_ERR_INVALID_ID_V01 = 0x0029, 73 IPA_QMI_ERR_ENCODING_V01 = 0x003A, 74 IPA_QMI_ERR_INCOMPATIBLE_STATE_V01 = 0x005A, 75 IPA_QMI_ERR_NOT_SUPPORTED_V01 = 0x005E, 76 IPA_QMI_ERROR_TYPE_MAX_ENUM_VAL_V01 = IPA_INT_MAX, 77}; 78 79struct ipa_qmi_response_type_v01 { 80 enum ipa_qmi_result_type_v01 result; 81 enum ipa_qmi_error_type_v01 error; 82}; 83 84enum ipa_platform_type_enum_v01 { 85 IPA_PLATFORM_TYPE_ENUM_MIN_ENUM_VAL_V01 = 86 -2147483647, /* To force a 32 bit signed enum. Do not change or use */ 87 QMI_IPA_PLATFORM_TYPE_INVALID_V01 = 0, 88 /* Invalid platform identifier */ 89 QMI_IPA_PLATFORM_TYPE_TN_V01 = 1, 90 /* Platform identifier - Data card device */ 91 QMI_IPA_PLATFORM_TYPE_LE_V01 = 2, 92 /* Platform identifier - Data router device */ 93 QMI_IPA_PLATFORM_TYPE_MSM_ANDROID_V01 = 3, 94 /* Platform identifier - MSM device with Android HLOS */ 95 QMI_IPA_PLATFORM_TYPE_MSM_WINDOWS_V01 = 4, 96 /* Platform identifier - MSM device with Windows HLOS */ 97 QMI_IPA_PLATFORM_TYPE_MSM_QNX_V01 = 5, 98 /* Platform identifier - MSM device with QNX HLOS */ 99 IPA_PLATFORM_TYPE_ENUM_MAX_ENUM_VAL_V01 = 2147483647 100 /* To force a 32 bit signed enum. Do not change or use */ 101}; 102 103struct ipa_hdr_tbl_info_type_v01 { 104 uint32_t modem_offset_start; 105 /* Offset from the start of IPA Shared memory from which 106 * modem driver may insert header table entries. 107 */ 108 uint32_t modem_offset_end; 109 /* Offset from the start of IPA shared mem beyond which modem 110 * driver shall not insert header table entries. The space 111 * available for the modem driver shall include the 112 * modem_offset_start and modem_offset_end. 113 */ 114}; /* Type */ 115 116struct ipa_route_tbl_info_type_v01 { 117 uint32_t route_tbl_start_addr; 118 /* Identifies the start of the routing table. Denotes the offset 119 * from the start of the IPA Shared Mem 120 */ 121 122 uint32_t num_indices; 123 /* Number of indices (starting from 0) that is being allocated to 124 * the modem. The number indicated here is also included in the 125 * allocation. The value of num_indices shall not exceed 31 126 * (5 bits used to specify the routing table index), unless there 127 * is a change in the hardware. 128 */ 129}; /* Type */ 130 131struct ipa_modem_mem_info_type_v01 { 132 133 uint32_t block_start_addr; 134 /* Identifies the start of the memory block allocated for the 135 * modem. Denotes the offset from the start of the IPA Shared Mem 136 */ 137 138 uint32_t size; 139 /* Size of the block allocated for the modem driver */ 140}; /* Type */ 141 142struct ipa_hdr_proc_ctx_tbl_info_type_v01 { 143 144 uint32_t modem_offset_start; 145 /* Offset from the start of IPA shared memory from which the modem 146 * driver may insert header processing context table entries. 147 */ 148 149 uint32_t modem_offset_end; 150 /* Offset from the start of IPA shared memory beyond which the modem 151 * driver may not insert header proc table entries. The space 152 * available for the modem driver includes modem_offset_start and 153 * modem_offset_end. 154 */ 155}; /* Type */ 156 157struct ipa_zip_tbl_info_type_v01 { 158 159 uint32_t modem_offset_start; 160 /* Offset from the start of IPA shared memory from which the modem 161 * driver may insert compression/decompression command entries. 162 */ 163 164 uint32_t modem_offset_end; 165 /* Offset from the start of IPA shared memory beyond which the modem 166 * driver may not insert compression/decompression command entries. 167 * The space available for the modem driver includes 168 * modem_offset_start and modem_offset_end. 169 */ 170}; /* Type */ 171 172/** 173 * Request Message; Requests the modem IPA driver 174 * to perform initializtion 175 */ 176struct ipa_init_modem_driver_req_msg_v01 { 177 178 /* Optional */ 179 /* Platform info */ 180 uint8_t platform_type_valid; /**< Must be set to true if platform_type 181 is being passed */ 182 enum ipa_platform_type_enum_v01 platform_type; 183 /* Provides information about the platform (ex. TN/MN/LE/MSM,etc) */ 184 185 /* Optional */ 186 /* Header table info */ 187 uint8_t hdr_tbl_info_valid; 188 /* Must be set to true if hdr_tbl_info is being passed */ 189 struct ipa_hdr_tbl_info_type_v01 hdr_tbl_info; 190 /* Provides information about the header table */ 191 192 /* Optional */ 193 /* IPV4 Routing table info */ 194 uint8_t v4_route_tbl_info_valid; 195 /* Must be set to true if v4_route_tbl_info is being passed */ 196 struct ipa_route_tbl_info_type_v01 v4_route_tbl_info; 197 /* Provides information about the IPV4 routing table */ 198 199 /* Optional */ 200 /* IPV6 Routing table info */ 201 uint8_t v6_route_tbl_info_valid; /**< Must be set to true if 202 v6_route_tbl_info is being passed */ 203 struct ipa_route_tbl_info_type_v01 v6_route_tbl_info; 204 /* Provides information about the IPV6 routing table */ 205 206 /* Optional */ 207 /* IPV4 Filter table start address */ 208 uint8_t v4_filter_tbl_start_addr_valid; /**< Must be set to true 209 if v4_filter_tbl_start_addr is being passed */ 210 uint32_t v4_filter_tbl_start_addr; 211 /* Provides information about the starting address of IPV4 filter 212 * table in IPAv2 or non-hashable IPv4 filter table in IPAv3. 213 * Denotes the offset from the start of the IPA Shared Mem 214 */ 215 216 /* Optional */ 217 /* IPV6 Filter table start address */ 218 uint8_t v6_filter_tbl_start_addr_valid; 219 /* Must be set to true if v6_filter_tbl_start_addr is being passed */ 220 uint32_t v6_filter_tbl_start_addr; 221 /* Provides information about the starting address of IPV6 filter 222 * table in IPAv2 or non-hashable IPv6 filter table in IPAv3. 223 * Denotes the offset from the start of the IPA Shared Mem 224 */ 225 226 /* Optional */ 227 /* Modem memory block */ 228 uint8_t modem_mem_info_valid; 229 /* Must be set to true if modem_mem_info is being passed */ 230 struct ipa_modem_mem_info_type_v01 modem_mem_info; 231 /* Provides information about the start address and the size of 232 * the memory block that is being allocated to the modem driver. 233 * Denotes the physical address 234 */ 235 236 /* Optional */ 237 /* Destination end point for control commands from modem */ 238 uint8_t ctrl_comm_dest_end_pt_valid; /**< Must be set to true if 239 ctrl_comm_dest_end_pt is being passed */ 240 uint32_t ctrl_comm_dest_end_pt; 241 /* Provides information about the destination end point on the 242 * application processor to which the modem driver can send 243 * control commands. The value of this parameter cannot exceed 244 * 19 since IPA only supports 20 end points. 245 */ 246 247 /* Optional */ 248 /* Modem Bootup Information */ 249 uint8_t is_ssr_bootup_valid; /**< Must be set to true if 250 is_ssr_bootup is being passed */ 251 uint8_t is_ssr_bootup; 252 /* Specifies whether the modem is booting up after a modem only 253 * sub-system restart or not. This will let the modem driver 254 * know that it doesn't have to reinitialize some of the HW 255 * blocks because IPA has not been reset since the previous 256 * initialization. 257 */ 258 259 /* Optional */ 260 /* Header Processing Context Table Information */ 261 uint8_t hdr_proc_ctx_tbl_info_valid; 262 /* Must be set to true if hdr_proc_ctx_tbl_info is being passed */ 263 struct ipa_hdr_proc_ctx_tbl_info_type_v01 hdr_proc_ctx_tbl_info; 264 /* Provides information about the header processing context table. 265 */ 266 267 /* Optional */ 268 /* Compression Decompression Table Information */ 269 uint8_t zip_tbl_info_valid; 270 /* Must be set to true if zip_tbl_info is being passed */ 271 struct ipa_zip_tbl_info_type_v01 zip_tbl_info; 272 /* Provides information about the zip table. 273 */ 274 275 /* Optional */ 276 /* IPv4 Hashable Routing Table Information */ 277 /** Must be set to true if v4_hash_route_tbl_info is being passed */ 278 uint8_t v4_hash_route_tbl_info_valid; 279 struct ipa_route_tbl_info_type_v01 v4_hash_route_tbl_info; 280 281 /* Optional */ 282 /* IPv6 Hashable Routing Table Information */ 283 /** Must be set to true if v6_hash_route_tbl_info is being passed */ 284 uint8_t v6_hash_route_tbl_info_valid; 285 struct ipa_route_tbl_info_type_v01 v6_hash_route_tbl_info; 286 287 /* Optional */ 288 /* IPv4 Hashable Filter Table Start Address */ 289 /** Must be set to true if v4_hash_filter_tbl_start_addr 290 is being passed */ 291 uint8_t v4_hash_filter_tbl_start_addr_valid; 292 uint32_t v4_hash_filter_tbl_start_addr; 293 /** Identifies the starting address of the IPv4 hashable filter 294 table in IPAv3 onwards. Denotes the offset from the start of 295 the IPA shared memory. 296 */ 297 298 /* Optional */ 299 /* IPv6 Hashable Filter Table Start Address */ 300 /** Must be set to true if v6_hash_filter_tbl_start_addr 301 is being passed */ 302 uint8_t v6_hash_filter_tbl_start_addr_valid; 303 uint32_t v6_hash_filter_tbl_start_addr; 304 /** Identifies the starting address of the IPv6 hashable filter 305 table in IPAv3 onwards. Denotes the offset from the start of 306 the IPA shared memory. 307 */ 308}; /* Message */ 309 310/* Response Message; Requests the modem IPA driver about initialization */ 311struct ipa_init_modem_driver_resp_msg_v01 { 312 /* Mandatory */ 313 /* Result Code */ 314 struct ipa_qmi_response_type_v01 resp; 315 /* Standard response type.*/ 316 317 /* Optional */ 318 /* Destination end point for control commands from master driver */ 319 uint8_t ctrl_comm_dest_end_pt_valid; 320 /* Must be set to true if ctrl_comm_dest_ep is being passed */ 321 uint32_t ctrl_comm_dest_end_pt; 322 /* Provides information about the destination end point on the 323 * modem processor to which the master driver can send control 324 * commands. The value of this parameter cannot exceed 19 since 325 * IPA only supports 20 end points. This field is looked at only 326 * if the result in TLV RESULT_CODE is QMI_RESULT_SUCCESS 327 */ 328 329 /* Optional */ 330 /* Default end point */ 331 uint8_t default_end_pt_valid; 332 /* Must be set to true if default_end_pt is being passed */ 333 uint32_t default_end_pt; 334 /* Provides information about the default end point. The master 335 * driver may or may not set the register in the hardware with 336 * this value. The value of this parameter cannot exceed 19 337 * since IPA only supports 20 end points. This field is looked 338 * at only if the result in TLV RESULT_CODE is QMI_RESULT_SUCCESS 339 */ 340 341 /* Optional */ 342 /* Modem Driver Initialization Pending */ 343 uint8_t modem_driver_init_pending_valid; 344 /* Must be set to true if modem_driver_init_pending is being passed */ 345 uint8_t modem_driver_init_pending; 346 /* 347 * Identifies if second level message handshake is needed 348 * between drivers to indicate when IPA HWP loading is completed. 349 * If this is set by modem driver, AP driver will need to wait 350 * for a INIT_MODEM_DRIVER_CMPLT message before communicating with 351 * IPA HWP. 352 */ 353}; /* Message */ 354 355/* 356 * Request Message; Request from Modem IPA driver to indicate 357 * modem driver init completion 358 */ 359struct ipa_init_modem_driver_cmplt_req_msg_v01 { 360 /* Mandatory */ 361 /* Modem Driver init complete status; */ 362 uint8_t status; 363 /* 364 * Specifies whether the modem driver initialization is complete 365 * including the micro controller image loading. 366 */ 367}; /* Message */ 368 369/* 370 * Response Message; Request from Modem IPA driver to indicate 371 * modem driver init completion 372 */ 373struct ipa_init_modem_driver_cmplt_resp_msg_v01 { 374 /* Mandatory */ 375 /* Result Code */ 376 struct ipa_qmi_response_type_v01 resp; 377 /**< Standard response type.*/ 378}; /* Message */ 379 380/* Request Message; This is the message that is exchanged between the 381 * control point and the service in order to register for indications. 382 */ 383struct ipa_indication_reg_req_msg_v01 { 384 /* Optional */ 385 /* Master driver initialization completion */ 386 uint8_t master_driver_init_complete_valid; 387 /* Must be set to true if master_driver_init_complete is being passed */ 388 uint8_t master_driver_init_complete; 389 /* If set to TRUE, this field indicates that the client is 390 * interested in getting indications about the completion 391 * of the initialization sequence of the master driver. 392 * Setting this field in the request message makes sense 393 * only when the QMI_IPA_INDICATION_REGISTER_REQ is being 394 * originated from the modem driver 395 */ 396 397 /* Optional */ 398 /* Data Usage Quota Reached */ 399 uint8_t data_usage_quota_reached_valid; 400 /* Must be set to true if data_usage_quota_reached is being passed */ 401 uint8_t data_usage_quota_reached; 402 /* If set to TRUE, this field indicates that the client wants to 403 * receive indications about reaching the data usage quota that 404 * previously set via QMI_IPA_SET_DATA_USAGE_QUOTA. Setting this field 405 * in the request message makes sense only when the 406 * QMI_IPA_INDICATION_REGISTER_REQ is being originated from the Master 407 * driver 408 */ 409}; /* Message */ 410 411 412/* Response Message; This is the message that is exchanged between the 413 * control point and the service in order to register for indications. 414 */ 415struct ipa_indication_reg_resp_msg_v01 { 416 /* Mandatory */ 417 /* Result Code */ 418 struct ipa_qmi_response_type_v01 resp; 419 /**< Standard response type.*/ 420}; /* Message */ 421 422 423/* Indication Message; Indication sent to the Modem IPA driver from 424 * master IPA driver about initialization being complete. 425 */ 426struct ipa_master_driver_init_complt_ind_msg_v01 { 427 /* Mandatory */ 428 /* Master driver initialization completion status */ 429 struct ipa_qmi_response_type_v01 master_driver_init_status; 430 /* Indicates the status of initialization. If everything went 431 * as expected, this field is set to SUCCESS. ERROR is set 432 * otherwise. Extended error info may be used to convey 433 * additional information about the error 434 */ 435}; /* Message */ 436 437struct ipa_ipfltr_range_eq_16_type_v01 { 438 uint8_t offset; 439 /* Specifies the offset from the IHL (Internet Header length) */ 440 441 uint16_t range_low; 442 /* Specifies the lower bound of the range */ 443 444 uint16_t range_high; 445 /* Specifies the upper bound of the range */ 446}; /* Type */ 447 448struct ipa_ipfltr_mask_eq_32_type_v01 { 449 uint8_t offset; 450 /* Specifies the offset either from IHL or from the start of 451 * the IP packet. This depends on the equation that this structure 452 * is used in. 453 */ 454 455 uint32_t mask; 456 /* Specifies the mask that has to be used in the comparison. 457 * The field is ANDed with the mask and compared against the value. 458 */ 459 460 uint32_t value; 461 /* Specifies the 32 bit value that used in the comparison. */ 462}; /* Type */ 463 464struct ipa_ipfltr_eq_16_type_v01 { 465 uint8_t offset; 466 /* Specifies the offset into the packet */ 467 468 uint16_t value; 469 /* Specifies the 16 bit value that should be used in the comparison. */ 470}; /* Type */ 471 472struct ipa_ipfltr_eq_32_type_v01 { 473 uint8_t offset; 474 /* Specifies the offset into the packet */ 475 476 uint32_t value; 477 /* Specifies the 32 bit value that should be used in the comparison. */ 478}; /* Type */ 479 480struct ipa_ipfltr_mask_eq_128_type_v01 { 481 uint8_t offset; 482 /* Specifies the offset into the packet */ 483 484 uint8_t mask[16]; 485 /* Specifies the mask that has to be used in the comparison. 486 * The field is ANDed with the mask and compared against the value. 487 */ 488 489 uint8_t value[16]; 490 /* Specifies the 128 bit value that should be used in the comparison. */ 491}; /* Type */ 492 493 494struct ipa_filter_rule_type_v01 { 495 uint16_t rule_eq_bitmap; 496 /* 16-bit Bitmask to indicate how many eqs are valid in this rule */ 497 498 uint8_t tos_eq_present; 499 /* Specifies if a type of service check rule is present */ 500 501 uint8_t tos_eq; 502 /* The value to check against the type of service (ipv4) field */ 503 504 uint8_t protocol_eq_present; 505 /* Specifies if a protocol check rule is present */ 506 507 uint8_t protocol_eq; 508 /* The value to check against the protocol field */ 509 510 uint8_t num_ihl_offset_range_16; 511 /* The number of 16 bit range check rules at the location 512 * determined by IP header length plus a given offset offset 513 * in this rule. See the definition of the ipa_filter_range_eq_16 514 * for better understanding. The value of this field cannot exceed 515 * IPA_IPFLTR_NUM_IHL_RANGE_16_EQNS which is set as 2 516 */ 517 518 struct ipa_ipfltr_range_eq_16_type_v01 519 ihl_offset_range_16[QMI_IPA_IPFLTR_NUM_IHL_RANGE_16_EQNS_V01]; 520 /* Array of the registered IP header length offset 16 bit range 521 * check rules. 522 */ 523 524 uint8_t num_offset_meq_32; 525 /* The number of 32 bit masked comparison rules present 526 * in this rule 527 */ 528 529 struct ipa_ipfltr_mask_eq_32_type_v01 530 offset_meq_32[QMI_IPA_IPFLTR_NUM_MEQ_32_EQNS_V01]; 531 /* An array of all the possible 32bit masked comparison rules 532 * in this rule 533 */ 534 535 uint8_t tc_eq_present; 536 /* Specifies if the traffic class rule is present in this rule */ 537 538 uint8_t tc_eq; 539 /* The value against which the IPV4 traffic class field has to 540 be checked */ 541 542 uint8_t flow_eq_present; 543 /* Specifies if the "flow equals" rule is present in this rule */ 544 545 uint32_t flow_eq; 546 /* The value against which the IPV6 flow field has to be checked */ 547 548 uint8_t ihl_offset_eq_16_present; 549 /* Specifies if there is a 16 bit comparison required at the 550 * location in the packet determined by "Intenet Header length 551 * + specified offset" 552 */ 553 554 struct ipa_ipfltr_eq_16_type_v01 ihl_offset_eq_16; 555 /* The 16 bit comparison equation */ 556 557 uint8_t ihl_offset_eq_32_present; 558 /* Specifies if there is a 32 bit comparison required at the 559 * location in the packet determined by "Intenet Header length 560 * + specified offset" 561 */ 562 563 struct ipa_ipfltr_eq_32_type_v01 ihl_offset_eq_32; 564 /* The 32 bit comparison equation */ 565 566 uint8_t num_ihl_offset_meq_32; 567 /* The number of 32 bit masked comparison equations in this 568 * rule. The location of the packet to be compared is 569 * determined by the IP Header length + the give offset 570 */ 571 572 struct ipa_ipfltr_mask_eq_32_type_v01 573 ihl_offset_meq_32[QMI_IPA_IPFLTR_NUM_IHL_MEQ_32_EQNS_V01]; 574 /* Array of 32 bit masked comparison equations. 575 */ 576 577 uint8_t num_offset_meq_128; 578 /* The number of 128 bit comparison equations in this rule */ 579 580 struct ipa_ipfltr_mask_eq_128_type_v01 581 offset_meq_128[QMI_IPA_IPFLTR_NUM_MEQ_128_EQNS_V01]; 582 /* Array of 128 bit comparison equations. The location in the 583 * packet is determined by the specified offset 584 */ 585 586 uint8_t metadata_meq32_present; 587 /* Boolean indicating if the 32 bit masked comparison equation 588 * is present or not. Comparison is done against the metadata 589 * in IPA. Metadata can either be extracted from the packet 590 * header or from the "metadata" register. 591 */ 592 593 struct ipa_ipfltr_mask_eq_32_type_v01 594 metadata_meq32; 595 /* The metadata 32 bit masked comparison equation */ 596 597 uint8_t ipv4_frag_eq_present; 598 /* Specifies if the IPv4 Fragment equation is present in this rule */ 599}; /* Type */ 600 601 602enum ipa_ip_type_enum_v01 { 603 IPA_IP_TYPE_ENUM_MIN_ENUM_VAL_V01 = -2147483647, 604 /* To force a 32 bit signed enum. Do not change or use*/ 605 QMI_IPA_IP_TYPE_INVALID_V01 = 0, 606 /* Invalid IP type identifier */ 607 QMI_IPA_IP_TYPE_V4_V01 = 1, 608 /* IP V4 type */ 609 QMI_IPA_IP_TYPE_V6_V01 = 2, 610 /* IP V6 type */ 611 QMI_IPA_IP_TYPE_V4V6_V01 = 3, 612 /* Applies to both IP types */ 613 IPA_IP_TYPE_ENUM_MAX_ENUM_VAL_V01 = 2147483647 614 /* To force a 32 bit signed enum. Do not change or use*/ 615}; 616 617 618enum ipa_filter_action_enum_v01 { 619 IPA_FILTER_ACTION_ENUM_MIN_ENUM_VAL_V01 = -2147483647, 620 /* To force a 32 bit signed enum. Do not change or use */ 621 QMI_IPA_FILTER_ACTION_INVALID_V01 = 0, 622 /* Invalid action on filter hit */ 623 QMI_IPA_FILTER_ACTION_SRC_NAT_V01 = 1, 624 /* Pass packet to NAT block for Source NAT */ 625 QMI_IPA_FILTER_ACTION_DST_NAT_V01 = 2, 626 /* Pass packet to NAT block for Destination NAT */ 627 QMI_IPA_FILTER_ACTION_ROUTING_V01 = 3, 628 /* Pass packet to Routing block */ 629 QMI_IPA_FILTER_ACTION_EXCEPTION_V01 = 4, 630 /* Treat packet as exception and send to exception pipe */ 631 IPA_FILTER_ACTION_ENUM_MAX_ENUM_VAL_V01 = 2147483647 632 /* To force a 32 bit signed enum. Do not change or use*/ 633}; 634 635struct ipa_filter_spec_type_v01 { 636 uint32_t filter_spec_identifier; 637 /* This field is used to identify a filter spec in the list 638 * of filter specs being sent from the client. This field 639 * is applicable only in the filter install request and response. 640 */ 641 642 enum ipa_ip_type_enum_v01 ip_type; 643 /* This field identifies the IP type for which this rule is 644 * applicable. The driver needs to identify the filter table 645 * (V6 or V4) and this field is essential for that 646 */ 647 648 struct ipa_filter_rule_type_v01 filter_rule; 649 /* This field specifies the rules in the filter spec. These rules 650 * are the ones that are matched against fields in the packet. 651 */ 652 653 enum ipa_filter_action_enum_v01 filter_action; 654 /* This field specifies the action to be taken when a filter match 655 * occurs. The remote side should install this information into the 656 * hardware along with the filter equations. 657 */ 658 659 uint8_t is_routing_table_index_valid; 660 /* Specifies whether the routing table index is present or not. 661 * If the action is "QMI_IPA_FILTER_ACTION_EXCEPTION", this 662 * parameter need not be provided. 663 */ 664 665 uint32_t route_table_index; 666 /* This is the index in the routing table that should be used 667 * to route the packets if the filter rule is hit 668 */ 669 670 uint8_t is_mux_id_valid; 671 /* Specifies whether the mux_id is valid */ 672 673 uint32_t mux_id; 674 /* This field identifies the QMAP MUX ID. As a part of QMAP 675 * protocol, several data calls may be multiplexed over the 676 * same physical transport channel. This identifier is used to 677 * identify one such data call. The maximum value for this 678 * identifier is 255. 679 */ 680}; /* Type */ 681 682struct ipa_filter_spec_ex_type_v01 { 683 enum ipa_ip_type_enum_v01 ip_type; 684 /* This field identifies the IP type for which this rule is 685 * applicable. The driver needs to identify the filter table 686 * (V6 or V4) and this field is essential for that 687 */ 688 689 struct ipa_filter_rule_type_v01 filter_rule; 690 /* This field specifies the rules in the filter spec. These rules 691 * are the ones that are matched against fields in the packet. 692 */ 693 694 enum ipa_filter_action_enum_v01 filter_action; 695 /* This field specifies the action to be taken when a filter match 696 * occurs. The remote side should install this information into the 697 * hardware along with the filter equations. 698 */ 699 700 uint8_t is_routing_table_index_valid; 701 /* Specifies whether the routing table index is present or not. 702 * If the action is "QMI_IPA_FILTER_ACTION_EXCEPTION", this 703 * parameter need not be provided. 704 */ 705 706 uint32_t route_table_index; 707 /* This is the index in the routing table that should be used 708 * to route the packets if the filter rule is hit 709 */ 710 711 uint8_t is_mux_id_valid; 712 /* Specifies whether the mux_id is valid */ 713 714 uint32_t mux_id; 715 /* This field identifies the QMAP MUX ID. As a part of QMAP 716 * protocol, several data calls may be multiplexed over the 717 * same physical transport channel. This identifier is used to 718 * identify one such data call. The maximum value for this 719 * identifier is 255. 720 */ 721 722 uint32_t rule_id; 723 /** Rule Id of the given filter. The Rule Id is populated in the rule 724 header when installing the rule in IPA. 725 */ 726 727 uint8_t is_rule_hashable; 728 /** Specifies whether the given rule is hashable. 729 */ 730}; /* Type */ 731 732 733/* Request Message; This is the message that is exchanged between the 734 * control point and the service in order to request the installation 735 * of filtering rules in the hardware block by the remote side. 736 */ 737struct ipa_install_fltr_rule_req_msg_v01 { 738 /* Optional */ 739 /* IP type that this rule applies to 740 Filter specification to be installed in the hardware */ 741 uint8_t filter_spec_list_valid; 742 /* Must be set to true if filter_spec_list is being passed */ 743 uint32_t filter_spec_list_len; 744 /* Must be set to # of elements in filter_spec_list */ 745 struct ipa_filter_spec_type_v01 746 filter_spec_list[QMI_IPA_MAX_FILTERS_V01]; 747 /* This structure defines the list of filters that have 748 * to be installed in the hardware. The driver installing 749 * these rules shall do so in the same order as specified 750 * in this list. 751 */ 752 753 /* Optional */ 754 /* Pipe index to intall rule */ 755 uint8_t source_pipe_index_valid; 756 /* Must be set to true if source_pipe_index is being passed */ 757 uint32_t source_pipe_index; 758 /* This is the source pipe on which the filter rule is to be 759 * installed. The requestor may always not know the pipe 760 * indices. If not specified, the receiver shall install 761 * this rule on all the pipes that it controls through 762 * which data may be fed into IPA. 763 */ 764 765 /* Optional */ 766 /* Total number of IPv4 filters in the filter spec list */ 767 uint8_t num_ipv4_filters_valid; 768 /* Must be set to true if num_ipv4_filters is being passed */ 769 uint32_t num_ipv4_filters; 770 /* Number of IPv4 rules included in filter spec list */ 771 772 /* Optional */ 773 /* Total number of IPv6 filters in the filter spec list */ 774 uint8_t num_ipv6_filters_valid; 775 /* Must be set to true if num_ipv6_filters is being passed */ 776 uint32_t num_ipv6_filters; 777 /* Number of IPv6 rules included in filter spec list */ 778 779 /* Optional */ 780 /* List of XLAT filter indices in the filter spec list */ 781 uint8_t xlat_filter_indices_list_valid; 782 /* Must be set to true if xlat_filter_indices_list 783 * is being passed 784 */ 785 uint32_t xlat_filter_indices_list_len; 786 /* Must be set to # of elements in xlat_filter_indices_list */ 787 uint32_t xlat_filter_indices_list[QMI_IPA_MAX_FILTERS_V01]; 788 /* List of XLAT filter indices. Filter rules at specified indices 789 * will need to be modified by the receiver if the PDN is XLAT 790 * before installing them on the associated IPA consumer pipe. 791 */ 792 793 /* Optional */ 794 /* Extended Filter Specification */ 795 uint8_t filter_spec_ex_list_valid; 796 /* Must be set to true if filter_spec_ex_list is being passed */ 797 uint32_t filter_spec_ex_list_len; 798 /* Must be set to # of elements in filter_spec_ex_list */ 799 struct ipa_filter_spec_ex_type_v01 800 filter_spec_ex_list[QMI_IPA_MAX_FILTERS_V01]; 801 /* 802 * List of filter specifications of filters that must be installed in 803 * the IPAv3.x hardware. 804 * The driver installing these rules must do so in the same 805 * order as specified in this list. 806 */ 807}; /* Message */ 808 809struct ipa_filter_rule_identifier_to_handle_map_v01 { 810 uint32_t filter_spec_identifier; 811 /* This field is used to identify a filter spec in the list of 812 * filter specs being sent from the client. This field is 813 * applicable only in the filter install request and response. 814 */ 815 uint32_t filter_handle; 816 /* This field is used to identify a rule in any subsequent message. 817 * This is a value that is provided by the server to the control 818 * point 819 */ 820}; /* Type */ 821 822/* Response Message; This is the message that is exchanged between the 823 * control point and the service in order to request the 824 * installation of filtering rules in the hardware block by 825 * the remote side. 826 */ 827struct ipa_install_fltr_rule_resp_msg_v01 { 828 /* Mandatory */ 829 /* Result Code */ 830 struct ipa_qmi_response_type_v01 resp; 831 /* Standard response type. 832 * Standard response type. Contains the following data members: 833 * - qmi_result_type -- QMI_RESULT_SUCCESS or QMI_RESULT_FAILURE 834 * - qmi_error_type -- Error code. Possible error code values are 835 * described in the error codes section of each message definition. 836 */ 837 838 /* Optional */ 839 /* Filter Handle List */ 840 uint8_t filter_handle_list_valid; 841 /* Must be set to true if filter_handle_list is being passed */ 842 uint32_t filter_handle_list_len; 843 /* Must be set to # of elements in filter_handle_list */ 844 struct ipa_filter_rule_identifier_to_handle_map_v01 845 filter_handle_list[QMI_IPA_MAX_FILTERS_V01]; 846 /* 847 * List of handles returned to the control point. Each handle is 848 * mapped to the rule identifier that was specified in the 849 * request message. Any further reference to the rule is done 850 * using the filter handle. 851 */ 852 853 /* Optional */ 854 /* Rule id List */ 855 uint8_t rule_id_valid; 856 /* Must be set to true if rule_id is being passed */ 857 uint32_t rule_id_len; 858 /* Must be set to # of elements in rule_id */ 859 uint32_t rule_id[QMI_IPA_MAX_FILTERS_V01]; 860 /* 861 * List of rule ids returned to the control point. 862 * Any further reference to the rule is done using the 863 * filter rule id specified in this list. 864 */ 865}; /* Message */ 866 867struct ipa_filter_handle_to_index_map_v01 { 868 uint32_t filter_handle; 869 /* This is a handle that was given to the remote client that 870 * requested the rule addition. 871 */ 872 uint32_t filter_index; 873 /* This index denotes the location in a filter table, where the 874 * filter rule has been installed. The maximum value of this 875 * field is 64. 876 */ 877}; /* Type */ 878 879/* Request Message; This is the message that is exchanged between the 880 * control point and the service in order to notify the remote driver 881 * of the installation of the filter rule supplied earlier by the 882 * remote driver. 883 */ 884struct ipa_fltr_installed_notif_req_msg_v01 { 885 /* Mandatory */ 886 /* Pipe index */ 887 uint32_t source_pipe_index; 888 /* This is the source pipe on which the filter rule has been 889 * installed or was attempted to be installed 890 */ 891 892 /* Mandatory */ 893 /* Installation Status */ 894 enum ipa_qmi_result_type_v01 install_status; 895 /* This is the status of installation. If this indicates 896 * SUCCESS, other optional fields carry additional 897 * information 898 */ 899 900 /* Mandatory */ 901 /* List of Filter Indices */ 902 uint32_t filter_index_list_len; 903 /* Must be set to # of elements in filter_index_list */ 904 struct ipa_filter_handle_to_index_map_v01 905 filter_index_list[QMI_IPA_MAX_FILTERS_V01]; 906 /* 907 * Provides the list of filter indices and the corresponding 908 * filter handle. If the installation_status indicates a 909 * failure, the filter indices must be set to a reserve 910 * index (255). 911 */ 912 913 /* Optional */ 914 /* Embedded pipe index */ 915 uint8_t embedded_pipe_index_valid; 916 /* Must be set to true if embedded_pipe_index is being passed */ 917 uint32_t embedded_pipe_index; 918 /* This index denotes the embedded pipe number on which a call to 919 * the same PDN has been made. If this field is set, it denotes 920 * that this is a use case where PDN sharing is happening. The 921 * embedded pipe is used to send data from the embedded client 922 * in the device 923 */ 924 925 /* Optional */ 926 /* Retain Header Configuration */ 927 uint8_t retain_header_valid; 928 /* Must be set to true if retain_header is being passed */ 929 uint8_t retain_header; 930 /* This field indicates if the driver installing the rule has 931 * turned on the "retain header" bit. If this is true, the 932 * header that is removed by IPA is reinserted after the 933 * packet processing is completed. 934 */ 935 936 /* Optional */ 937 /* Embedded call Mux Id */ 938 uint8_t embedded_call_mux_id_valid; 939 /**< Must be set to true if embedded_call_mux_id is being passed */ 940 uint32_t embedded_call_mux_id; 941 /* This identifies one of the many calls that have been originated 942 * on the embedded pipe. This is how we identify the PDN gateway 943 * to which traffic from the source pipe has to flow. 944 */ 945 946 /* Optional */ 947 /* Total number of IPv4 filters in the filter index list */ 948 uint8_t num_ipv4_filters_valid; 949 /* Must be set to true if num_ipv4_filters is being passed */ 950 uint32_t num_ipv4_filters; 951 /* Number of IPv4 rules included in filter index list */ 952 953 /* Optional */ 954 /* Total number of IPv6 filters in the filter index list */ 955 uint8_t num_ipv6_filters_valid; 956 /* Must be set to true if num_ipv6_filters is being passed */ 957 uint32_t num_ipv6_filters; 958 /* Number of IPv6 rules included in filter index list */ 959 960 /* Optional */ 961 /* Start index on IPv4 filters installed on source pipe */ 962 uint8_t start_ipv4_filter_idx_valid; 963 /* Must be set to true if start_ipv4_filter_idx is being passed */ 964 uint32_t start_ipv4_filter_idx; 965 /* Start index of IPv4 rules in filter index list */ 966 967 /* Optional */ 968 /* Start index on IPv6 filters installed on source pipe */ 969 uint8_t start_ipv6_filter_idx_valid; 970 /* Must be set to true if start_ipv6_filter_idx is being passed */ 971 uint32_t start_ipv6_filter_idx; 972 /* Start index of IPv6 rules in filter index list */ 973 974 /* Optional */ 975 /* List of Rule Ids */ 976 uint8_t rule_id_valid; 977 /* Must be set to true if rule_id is being passed */ 978 uint32_t rule_id_len; 979 /* Must be set to # of elements in rule_id */ 980 uint32_t rule_id[QMI_IPA_MAX_FILTERS_V01]; 981 /* 982 * Provides the list of Rule Ids of rules added in IPA on the given 983 * source pipe index. If the install_status TLV indicates a 984 * failure, the Rule Ids in this list must be set to a reserved 985 * index (255). 986 */ 987}; /* Message */ 988 989/* Response Message; This is the message that is exchanged between the 990 * control point and the service in order to notify the remote driver 991 * of the installation of the filter rule supplied earlier by the 992 * remote driver. 993 */ 994struct ipa_fltr_installed_notif_resp_msg_v01 { 995 /* Mandatory */ 996 /* Result Code */ 997 struct ipa_qmi_response_type_v01 resp; 998 /* Standard response type */ 999}; /* Message */ 1000 1001/* Request Message; Notifies the remote driver of the need to clear the data 1002 * path to prevent the IPA from being blocked at the head of the processing 1003 * pipeline 1004 */ 1005struct ipa_enable_force_clear_datapath_req_msg_v01 { 1006 /* Mandatory */ 1007 /* Pipe Mask */ 1008 uint32_t source_pipe_bitmask; 1009 /* Set of consumer (source) pipes that must be clear of 1010 * active data transfers. 1011 */ 1012 1013 /* Mandatory */ 1014 /* Request ID */ 1015 uint32_t request_id; 1016 /* Identifies the ID of the request that is sent to the server 1017 * The same request ID is used in the message to remove the force_clear 1018 * request. The server is expected to keep track of the request ID and 1019 * the source_pipe_bitmask so that it can revert as needed 1020 */ 1021 1022 /* Optional */ 1023 /* Source Throttle State */ 1024 uint8_t throttle_source_valid; 1025 /* Must be set to true if throttle_source is being passed */ 1026 uint8_t throttle_source; 1027 /* Specifies whether the server is to throttle the data from 1028 * these consumer (source) pipes after clearing the exisiting 1029 * data present in the IPA that were pulled from these pipes 1030 * The server is expected to put all the source pipes in the 1031 * source_pipe_bitmask in the same state 1032 */ 1033}; /* Message */ 1034 1035/* Response Message; Notifies the remote driver of the need to clear the 1036 * data path to prevent the IPA from being blocked at the head of the 1037 * processing pipeline 1038 */ 1039struct ipa_enable_force_clear_datapath_resp_msg_v01 { 1040 /* Mandatory */ 1041 /* Result Code */ 1042 struct ipa_qmi_response_type_v01 resp; 1043 /* Standard response type */ 1044}; /* Message */ 1045 1046/* Request Message; Notifies the remote driver that the forceful clearing 1047 * of the data path can be lifted 1048 */ 1049struct ipa_disable_force_clear_datapath_req_msg_v01 { 1050 /* Mandatory */ 1051 /* Request ID */ 1052 uint32_t request_id; 1053 /* Identifies the request that was sent to the server to 1054 * forcibly clear the data path. This request simply undoes 1055 * the operation done in that request 1056 */ 1057}; /* Message */ 1058 1059/* Response Message; Notifies the remote driver that the forceful clearing 1060 * of the data path can be lifted 1061 */ 1062struct ipa_disable_force_clear_datapath_resp_msg_v01 { 1063 /* Mandatory */ 1064 /* Result Code */ 1065 struct ipa_qmi_response_type_v01 resp; 1066 /* Standard response type */ 1067}; /* Message */ 1068 1069enum ipa_peripheral_speed_enum_v01 { 1070 IPA_PERIPHERAL_SPEED_ENUM_MIN_ENUM_VAL_V01 = -2147483647, 1071 /* To force a 32 bit signed enum. Do not change or use */ 1072 QMI_IPA_PER_USB_FS_V01 = 1, 1073 /* Full-speed USB connection */ 1074 QMI_IPA_PER_USB_HS_V01 = 2, 1075 /* High-speed USB connection */ 1076 QMI_IPA_PER_USB_SS_V01 = 3, 1077 /* Super-speed USB connection */ 1078 QMI_IPA_PER_WLAN_V01 = 4, 1079 /* WLAN connection */ 1080 IPA_PERIPHERAL_SPEED_ENUM_MAX_ENUM_VAL_V01 = 2147483647 1081 /* To force a 32 bit signed enum. Do not change or use*/ 1082}; 1083 1084enum ipa_pipe_mode_enum_v01 { 1085 IPA_PIPE_MODE_ENUM_MIN_ENUM_VAL_V01 = -2147483647, 1086 /* To force a 32 bit signed enum. Do not change or use */ 1087 QMI_IPA_PIPE_MODE_HW_V01 = 1, 1088 /* Pipe is connected with a hardware block */ 1089 QMI_IPA_PIPE_MODE_SW_V01 = 2, 1090 /* Pipe is controlled by the software */ 1091 IPA_PIPE_MODE_ENUM_MAX_ENUM_VAL_V01 = 2147483647 1092 /* To force a 32 bit signed enum. Do not change or use */ 1093}; 1094 1095enum ipa_peripheral_type_enum_v01 { 1096 IPA_PERIPHERAL_TYPE_ENUM_MIN_ENUM_VAL_V01 = -2147483647, 1097 /* To force a 32 bit signed enum. Do not change or use */ 1098 QMI_IPA_PERIPHERAL_USB_V01 = 1, 1099 /* Specifies a USB peripheral */ 1100 QMI_IPA_PERIPHERAL_HSIC_V01 = 2, 1101 /* Specifies an HSIC peripheral */ 1102 QMI_IPA_PERIPHERAL_PCIE_V01 = 3, 1103 /* Specifies a PCIe peripheral */ 1104 IPA_PERIPHERAL_TYPE_ENUM_MAX_ENUM_VAL_V01 = 2147483647 1105 /* To force a 32 bit signed enum. Do not change or use */ 1106}; 1107 1108struct ipa_config_req_msg_v01 { 1109 /* Optional */ 1110 /* Peripheral Type */ 1111 uint8_t peripheral_type_valid; 1112 /* Must be set to true if peripheral_type is being passed */ 1113 enum ipa_peripheral_type_enum_v01 peripheral_type; 1114 /* Informs the remote driver about the perhipheral for 1115 * which this configuration information is relevant. Values: 1116 * - QMI_IPA_PERIPHERAL_USB (1) -- Specifies a USB peripheral 1117 * - QMI_IPA_PERIPHERAL_HSIC(2) -- Specifies an HSIC peripheral 1118 * - QMI_IPA_PERIPHERAL_PCIE(3) -- Specifies a PCIe peripheral 1119 */ 1120 1121 /* Optional */ 1122 /* HW Deaggregation Support */ 1123 uint8_t hw_deaggr_supported_valid; 1124 /* Must be set to true if hw_deaggr_supported is being passed */ 1125 uint8_t hw_deaggr_supported; 1126 /* Informs the remote driver whether the local IPA driver 1127 * allows de-aggregation to be performed in the hardware 1128 */ 1129 1130 /* Optional */ 1131 /* Maximum Aggregation Frame Size */ 1132 uint8_t max_aggr_frame_size_valid; 1133 /* Must be set to true if max_aggr_frame_size is being passed */ 1134 uint32_t max_aggr_frame_size; 1135 /* Specifies the maximum size of the aggregated frame that 1136 * the remote driver can expect from this execution environment 1137 * - Valid range: 128 bytes to 32768 bytes 1138 */ 1139 1140 /* Optional */ 1141 /* IPA Ingress Pipe Mode */ 1142 uint8_t ipa_ingress_pipe_mode_valid; 1143 /* Must be set to true if ipa_ingress_pipe_mode is being passed */ 1144 1145 enum ipa_pipe_mode_enum_v01 ipa_ingress_pipe_mode; 1146 /* Indicates to the remote driver if the ingress pipe into the 1147 * IPA is in direct connection with another hardware block or 1148 * if the producer of data to this ingress pipe is a software 1149 * module. Values: 1150 * -QMI_IPA_PIPE_MODE_HW(1) --Pipe is connected with hardware block 1151 * -QMI_IPA_PIPE_MODE_SW(2) --Pipe is controlled by the software 1152 */ 1153 1154 /* Optional */ 1155 /* Peripheral Speed Info */ 1156 uint8_t peripheral_speed_info_valid; 1157 /* Must be set to true if peripheral_speed_info is being passed */ 1158 1159 enum ipa_peripheral_speed_enum_v01 peripheral_speed_info; 1160 /* Indicates the speed that the peripheral connected to the IPA supports 1161 * Values: 1162 * - QMI_IPA_PER_USB_FS (1) -- Full-speed USB connection 1163 * - QMI_IPA_PER_USB_HS (2) -- High-speed USB connection 1164 * - QMI_IPA_PER_USB_SS (3) -- Super-speed USB connection 1165 * - QMI_IPA_PER_WLAN (4) -- WLAN connection 1166 */ 1167 1168 /* Optional */ 1169 /* Downlink Accumulation Time limit */ 1170 uint8_t dl_accumulation_time_limit_valid; 1171 /* Must be set to true if dl_accumulation_time_limit is being passed */ 1172 uint32_t dl_accumulation_time_limit; 1173 /* Informs the remote driver about the time for which data 1174 * is accumulated in the downlink direction before it is pushed into the 1175 * IPA (downlink is with respect to the WWAN air interface) 1176 * - Units: milliseconds 1177 * - Maximum value: 255 1178 */ 1179 1180 /* Optional */ 1181 /* Downlink Accumulation Packet limit */ 1182 uint8_t dl_accumulation_pkt_limit_valid; 1183 /* Must be set to true if dl_accumulation_pkt_limit is being passed */ 1184 uint32_t dl_accumulation_pkt_limit; 1185 /* Informs the remote driver about the number of packets 1186 * that are to be accumulated in the downlink direction before it is 1187 * pushed into the IPA - Maximum value: 1023 1188 */ 1189 1190 /* Optional */ 1191 /* Downlink Accumulation Byte Limit */ 1192 uint8_t dl_accumulation_byte_limit_valid; 1193 /* Must be set to true if dl_accumulation_byte_limit is being passed */ 1194 uint32_t dl_accumulation_byte_limit; 1195 /* Inform the remote driver about the number of bytes 1196 * that are to be accumulated in the downlink direction before it 1197 * is pushed into the IPA - Maximum value: TBD 1198 */ 1199 1200 /* Optional */ 1201 /* Uplink Accumulation Time Limit */ 1202 uint8_t ul_accumulation_time_limit_valid; 1203 /* Must be set to true if ul_accumulation_time_limit is being passed */ 1204 uint32_t ul_accumulation_time_limit; 1205 /* Inform thes remote driver about the time for which data 1206 * is to be accumulated in the uplink direction before it is pushed into 1207 * the IPA (downlink is with respect to the WWAN air interface). 1208 * - Units: milliseconds 1209 * - Maximum value: 255 1210 */ 1211 1212 /* Optional */ 1213 /* HW Control Flags */ 1214 uint8_t hw_control_flags_valid; 1215 /* Must be set to true if hw_control_flags is being passed */ 1216 uint32_t hw_control_flags; 1217 /* Informs the remote driver about the hardware control flags: 1218 * - Bit 0: IPA_HW_FLAG_HALT_SYSTEM_ON_NON_TERMINAL_FAILURE -- 1219 * Indicates to the hardware that it must not continue with 1220 * any subsequent operation even if the failure is not terminal 1221 * - Bit 1: IPA_HW_FLAG_NO_REPORT_MHI_CHANNEL_ERORR -- 1222 * Indicates to the hardware that it is not required to report 1223 * channel errors to the host. 1224 * - Bit 2: IPA_HW_FLAG_NO_REPORT_MHI_CHANNEL_WAKE_UP -- 1225 * Indicates to the hardware that it is not required to generate 1226 * wake-up events to the host. 1227 * - Bit 4: IPA_HW_FLAG_WORK_OVER_DDR -- 1228 * Indicates to the hardware that it is accessing addresses in 1229 * the DDR and not over PCIe 1230 * - Bit 5: IPA_HW_FLAG_INTERRUPT_MODE_CTRL_FLAG -- 1231 * Indicates whether the device must 1232 * raise an event to let the host know that it is going into an 1233 * interrupt mode (no longer polling for data/buffer availability) 1234 */ 1235 1236 /* Optional */ 1237 /* Uplink MSI Event Threshold */ 1238 uint8_t ul_msi_event_threshold_valid; 1239 /* Must be set to true if ul_msi_event_threshold is being passed */ 1240 uint32_t ul_msi_event_threshold; 1241 /* Informs the remote driver about the threshold that will 1242 * cause an interrupt (MSI) to be fired to the host. This ensures 1243 * that the remote driver does not accumulate an excesive number of 1244 * events before firing an interrupt. 1245 * This threshold is applicable for data moved in the UL direction. 1246 * - Maximum value: 65535 1247 */ 1248 1249 /* Optional */ 1250 /* Downlink MSI Event Threshold */ 1251 uint8_t dl_msi_event_threshold_valid; 1252 /* Must be set to true if dl_msi_event_threshold is being passed */ 1253 uint32_t dl_msi_event_threshold; 1254 /* Informs the remote driver about the threshold that will 1255 * cause an interrupt (MSI) to be fired to the host. This ensures 1256 * that the remote driver does not accumulate an excesive number of 1257 * events before firing an interrupt 1258 * This threshold is applicable for data that is moved in the 1259 * DL direction - Maximum value: 65535 1260 */ 1261 1262 /* Optional */ 1263 /* Uplink Fifo Size */ 1264 uint8_t ul_fifo_size_valid; 1265 /* Must be set to true if ul_fifo_size is being passed */ 1266 uint32_t ul_fifo_size; 1267 /* 1268 * Informs the remote driver about the total Uplink xDCI 1269 * buffer size that holds the complete aggregated frame 1270 * or BAM data fifo size of the peripheral channel/pipe(in Bytes). 1271 * This deprecates the max_aggr_frame_size field. This TLV 1272 * deprecates max_aggr_frame_size TLV from version 1.9 onwards 1273 * and the max_aggr_frame_size TLV will be ignored in the presence 1274 * of this TLV. 1275 */ 1276 1277 /* Optional */ 1278 /* Downlink Fifo Size */ 1279 uint8_t dl_fifo_size_valid; 1280 /* Must be set to true if dl_fifo_size is being passed */ 1281 uint32_t dl_fifo_size; 1282 /* 1283 * Informs the remote driver about the total Downlink xDCI buffering 1284 * capacity or BAM data fifo size of the peripheral channel/pipe. 1285 * (In Bytes). dl_fifo_size = n * dl_buf_size. This deprecates the 1286 * max_aggr_frame_size field. If this value is set 1287 * max_aggr_frame_size is ignored. 1288 */ 1289 1290 /* Optional */ 1291 /* Downlink Buffer Size */ 1292 uint8_t dl_buf_size_valid; 1293 /* Must be set to true if dl_buf_size is being passed */ 1294 uint32_t dl_buf_size; 1295 /* Informs the remote driver about the single xDCI buffer size. 1296 This is applicable only in GSI mode(in Bytes).\n */ 1297}; /* Message */ 1298 1299/* Response Message; Notifies the remote driver of the configuration 1300 * information 1301 */ 1302struct ipa_config_resp_msg_v01 { 1303 /* Mandatory */ 1304 /* Result Code */ 1305 struct ipa_qmi_response_type_v01 resp; 1306 /**< Standard response type.*/ 1307}; /* Message */ 1308 1309enum ipa_stats_type_enum_v01 { 1310 IPA_STATS_TYPE_ENUM_MIN_ENUM_VAL_V01 = -2147483647, 1311 /* To force a 32 bit signed enum. Do not change or use */ 1312 QMI_IPA_STATS_TYPE_INVALID_V01 = 0, 1313 /* Invalid stats type identifier */ 1314 QMI_IPA_STATS_TYPE_PIPE_V01 = 1, 1315 /* Pipe stats type */ 1316 QMI_IPA_STATS_TYPE_FILTER_RULES_V01 = 2, 1317 /* Filter rule stats type */ 1318 IPA_STATS_TYPE_ENUM_MAX_ENUM_VAL_V01 = 2147483647 1319 /* To force a 32 bit signed enum. Do not change or use */ 1320}; 1321 1322struct ipa_pipe_stats_info_type_v01 { 1323 uint32_t pipe_index; 1324 /* Pipe index for statistics to be retrieved. */ 1325 1326 uint64_t num_ipv4_packets; 1327 /* Accumulated number of IPv4 packets over this pipe. */ 1328 1329 uint64_t num_ipv4_bytes; 1330 /* Accumulated number of IPv4 bytes over this pipe. */ 1331 1332 uint64_t num_ipv6_packets; 1333 /* Accumulated number of IPv6 packets over this pipe. */ 1334 1335 uint64_t num_ipv6_bytes; 1336 /* Accumulated number of IPv6 bytes over this pipe. */ 1337}; 1338 1339struct ipa_stats_type_filter_rule_v01 { 1340 uint32_t filter_rule_index; 1341 /* Filter rule index for statistics to be retrieved. */ 1342 1343 uint64_t num_packets; 1344 /* Accumulated number of packets over this filter rule. */ 1345}; 1346 1347/* Request Message; Retrieve the data statistics collected on modem 1348 * IPA driver. 1349 */ 1350struct ipa_get_data_stats_req_msg_v01 { 1351 /* Mandatory */ 1352 /* Stats Type */ 1353 enum ipa_stats_type_enum_v01 ipa_stats_type; 1354 /* Indicates the type of statistics to be retrieved. */ 1355 1356 /* Optional */ 1357 /* Reset Statistics */ 1358 uint8_t reset_stats_valid; 1359 /* Must be set to true if reset_stats is being passed */ 1360 uint8_t reset_stats; 1361 /* Option to reset the specific type of data statistics 1362 * currently collected. 1363 */ 1364}; /* Message */ 1365 1366/* Response Message; Retrieve the data statistics collected 1367 * on modem IPA driver. 1368 */ 1369struct ipa_get_data_stats_resp_msg_v01 { 1370 /* Mandatory */ 1371 /* Result Code */ 1372 struct ipa_qmi_response_type_v01 resp; 1373 /* Standard response type. */ 1374 1375 /* Optional */ 1376 /* Stats Type */ 1377 uint8_t ipa_stats_type_valid; 1378 /* Must be set to true if ipa_stats_type is passed */ 1379 enum ipa_stats_type_enum_v01 ipa_stats_type; 1380 /* Indicates the type of statistics that are retrieved. */ 1381 1382 /* Optional */ 1383 /* Uplink Source Pipe Statistics List */ 1384 uint8_t ul_src_pipe_stats_list_valid; 1385 /* Must be set to true if ul_src_pipe_stats_list is being passed */ 1386 uint32_t ul_src_pipe_stats_list_len; 1387 /* Must be set to # of elements in ul_src_pipe_stats_list */ 1388 struct ipa_pipe_stats_info_type_v01 1389 ul_src_pipe_stats_list[QMI_IPA_MAX_PIPES_V01]; 1390 /* List of all Uplink pipe statistics that are retrieved. */ 1391 1392 /* Optional */ 1393 /* Downlink Destination Pipe Statistics List */ 1394 uint8_t dl_dst_pipe_stats_list_valid; 1395 /* Must be set to true if dl_dst_pipe_stats_list is being passed */ 1396 uint32_t dl_dst_pipe_stats_list_len; 1397 /* Must be set to # of elements in dl_dst_pipe_stats_list */ 1398 struct ipa_pipe_stats_info_type_v01 1399 dl_dst_pipe_stats_list[QMI_IPA_MAX_PIPES_V01]; 1400 /* List of all Downlink pipe statistics that are retrieved. */ 1401 1402 /* Optional */ 1403 /* Downlink Filter Rule Stats List */ 1404 uint8_t dl_filter_rule_stats_list_valid; 1405 /* Must be set to true if dl_filter_rule_stats_list is being passed */ 1406 uint32_t dl_filter_rule_stats_list_len; 1407 /* Must be set to # of elements in dl_filter_rule_stats_list */ 1408 struct ipa_stats_type_filter_rule_v01 1409 dl_filter_rule_stats_list[QMI_IPA_MAX_FILTERS_V01]; 1410 /* List of all Downlink filter rule statistics retrieved. */ 1411}; /* Message */ 1412 1413struct ipa_apn_data_stats_info_type_v01 { 1414 uint32_t mux_id; 1415 /* Indicates the MUX ID associated with the APN for which the data 1416 * usage statistics is queried 1417 */ 1418 1419 uint64_t num_ul_packets; 1420 /* Accumulated number of uplink packets corresponding to 1421 * this Mux ID 1422 */ 1423 1424 uint64_t num_ul_bytes; 1425 /* Accumulated number of uplink bytes corresponding to 1426 * this Mux ID 1427 */ 1428 1429 uint64_t num_dl_packets; 1430 /* Accumulated number of downlink packets corresponding 1431 * to this Mux ID 1432 */ 1433 1434 uint64_t num_dl_bytes; 1435 /* Accumulated number of downlink bytes corresponding to 1436 * this Mux ID 1437 */ 1438}; /* Type */ 1439 1440/* Request Message; Retrieve the APN data statistics collected from modem */ 1441struct ipa_get_apn_data_stats_req_msg_v01 { 1442 /* Optional */ 1443 /* Mux ID List */ 1444 uint8_t mux_id_list_valid; 1445 /* Must be set to true if mux_id_list is being passed */ 1446 uint32_t mux_id_list_len; 1447 /* Must be set to # of elements in mux_id_list */ 1448 uint32_t mux_id_list[QMI_IPA_MAX_APN_V01]; 1449 /* The list of MUX IDs associated with APNs for which the data usage 1450 * statistics is being retrieved 1451 */ 1452}; /* Message */ 1453 1454/* Response Message; Retrieve the APN data statistics collected from modem */ 1455struct ipa_get_apn_data_stats_resp_msg_v01 { 1456 /* Mandatory */ 1457 /* Result Code */ 1458 struct ipa_qmi_response_type_v01 resp; 1459 /* Standard response type.*/ 1460 1461 /* Optional */ 1462 /* APN Data Statistics List */ 1463 uint8_t apn_data_stats_list_valid; 1464 /* Must be set to true if apn_data_stats_list is being passed */ 1465 uint32_t apn_data_stats_list_len; 1466 /* Must be set to # of elements in apn_data_stats_list */ 1467 struct ipa_apn_data_stats_info_type_v01 1468 apn_data_stats_list[QMI_IPA_MAX_APN_V01]; 1469 /* List of APN data retrieved as per request on mux_id. 1470 * For now, only one APN monitoring is supported on modem driver. 1471 * Making this as list for expandability to support more APNs in future. 1472 */ 1473}; /* Message */ 1474 1475struct ipa_data_usage_quota_info_type_v01 { 1476 uint32_t mux_id; 1477 /* Indicates the MUX ID associated with the APN for which the data usage 1478 * quota needs to be set 1479 */ 1480 1481 uint64_t num_Mbytes; 1482 /* Number of Mega-bytes of quota value to be set on this APN associated 1483 * with this Mux ID. 1484 */ 1485}; /* Type */ 1486 1487/* Request Message; Master driver sets a data usage quota value on 1488 * modem driver 1489 */ 1490struct ipa_set_data_usage_quota_req_msg_v01 { 1491 /* Optional */ 1492 /* APN Quota List */ 1493 uint8_t apn_quota_list_valid; 1494 /* Must be set to true if apn_quota_list is being passed */ 1495 uint32_t apn_quota_list_len; 1496 /* Must be set to # of elements in apn_quota_list */ 1497 struct ipa_data_usage_quota_info_type_v01 1498 apn_quota_list[QMI_IPA_MAX_APN_V01]; 1499 /* The list of APNs on which a data usage quota to be set on modem 1500 * driver. For now, only one APN monitoring is supported on modem 1501 * driver. Making this as list for expandability to support more 1502 * APNs in future. 1503 */ 1504}; /* Message */ 1505 1506/* Response Message; Master driver sets a data usage on modem driver. */ 1507struct ipa_set_data_usage_quota_resp_msg_v01 { 1508 /* Mandatory */ 1509 /* Result Code */ 1510 struct ipa_qmi_response_type_v01 resp; 1511 /* Standard response type.*/ 1512}; /* Message */ 1513 1514/* Indication Message; Modem driver sends this indication to master 1515 * driver when the data usage quota is reached 1516 */ 1517struct ipa_data_usage_quota_reached_ind_msg_v01 { 1518 /* Mandatory */ 1519 /* APN Quota List */ 1520 struct ipa_data_usage_quota_info_type_v01 apn; 1521 /* This message indicates which APN has the previously set quota 1522 * reached. For now, only one APN monitoring is supported on modem 1523 * driver. 1524 */ 1525}; /* Message */ 1526 1527/* Request Message; Master driver request modem driver to terminate 1528 * the current data usage quota monitoring session. 1529 */ 1530struct ipa_stop_data_usage_quota_req_msg_v01 { 1531 /* This element is a placeholder to prevent the declaration of 1532 * an empty struct. DO NOT USE THIS FIELD UNDER ANY CIRCUMSTANCE 1533 */ 1534 char __placeholder; 1535}; /* Message */ 1536 1537/* Response Message; Master driver request modem driver to terminate 1538 * the current quota monitoring session. 1539 */ 1540struct ipa_stop_data_usage_quota_resp_msg_v01 { 1541 /* Mandatory */ 1542 /* Result Code */ 1543 struct ipa_qmi_response_type_v01 resp; 1544 /**< Standard response type.*/ 1545}; /* Message */ 1546 1547/* Request Message; Request from Modem IPA driver to set DPL peripheral pipe */ 1548struct ipa_install_fltr_rule_req_ex_msg_v01 { 1549 1550 /* Optional */ 1551 /* Extended Filter Specification */ 1552 uint8_t filter_spec_ex_list_valid; 1553 uint32_t filter_spec_ex_list_len; 1554 struct ipa_filter_spec_ex_type_v01 1555 filter_spec_ex_list[QMI_IPA_MAX_FILTERS_EX_V01]; 1556 /* List of filter specifications of filters that must be installed in 1557 the IPAv3.x hardware. 1558 The driver installing these rules must do so in the same order as 1559 specified in this list. 1560 */ 1561 1562 /* Optional */ 1563 /* Pipe Index to Install Rule */ 1564 uint8_t source_pipe_index_valid; 1565 uint32_t source_pipe_index; 1566 /* Pipe index to install the filter rule. 1567 The requester may not always know the pipe indices. If not specified, 1568 the receiver must install this rule on all pipes that it controls, 1569 through which data may be fed into the IPA. 1570 */ 1571 1572 /* Optional */ 1573 /* Total Number of IPv4 Filters in the Filter Spec List */ 1574 uint8_t num_ipv4_filters_valid; 1575 uint32_t num_ipv4_filters; 1576 /* Number of IPv4 rules included in the filter specification list. 1577 */ 1578 1579 /* Optional */ 1580 /* Total Number of IPv6 Filters in the Filter Spec List */ 1581 uint8_t num_ipv6_filters_valid; 1582 uint32_t num_ipv6_filters; 1583 /* Number of IPv6 rules included in the filter specification list. 1584 */ 1585 1586 /* Optional */ 1587 /* List of XLAT Filter Indices in the Filter Spec List */ 1588 uint8_t xlat_filter_indices_list_valid; 1589 uint32_t xlat_filter_indices_list_len; 1590 uint32_t xlat_filter_indices_list[QMI_IPA_MAX_FILTERS_EX_V01]; 1591 /* List of XLAT filter indices. 1592 Filter rules at specified indices must be modified by the 1593 receiver if the PDN is XLAT before installing them on the associated 1594 IPA consumer pipe. 1595 */ 1596}; /* Message */ 1597 1598/* Response Message; Requests installation of filtering rules in the hardware 1599 * block on the remote side. 1600 */ 1601struct ipa_install_fltr_rule_resp_ex_msg_v01 { 1602 /* Mandatory */ 1603 /* Result Code */ 1604 struct ipa_qmi_response_type_v01 resp; 1605 /* Standard response type. 1606 Standard response type. Contains the following data members: 1607 - qmi_result_type -- QMI_RESULT_SUCCESS or QMI_RESULT_FAILURE 1608 - qmi_error_type -- Error code. Possible error code values are 1609 described in the error codes 1610 section of each message 1611 definition. 1612 */ 1613 1614 /* Optional */ 1615 /* Rule ID List */ 1616 uint8_t rule_id_valid; 1617 uint32_t rule_id_len; 1618 uint32_t rule_id[QMI_IPA_MAX_FILTERS_EX_V01]; 1619 /* List of rule IDs returned to the control point. 1620 Any further reference to the rule is done using the filter rule ID 1621 specified in this list. 1622 */ 1623}; /* Message */ 1624 1625/*Service Message Definition*/ 1626#define QMI_IPA_INDICATION_REGISTER_REQ_V01 0x0020 1627#define QMI_IPA_INDICATION_REGISTER_RESP_V01 0x0020 1628#define QMI_IPA_INIT_MODEM_DRIVER_REQ_V01 0x0021 1629#define QMI_IPA_INIT_MODEM_DRIVER_RESP_V01 0x0021 1630#define QMI_IPA_MASTER_DRIVER_INIT_COMPLETE_IND_V01 0x0022 1631#define QMI_IPA_INSTALL_FILTER_RULE_REQ_V01 0x0023 1632#define QMI_IPA_INSTALL_FILTER_RULE_RESP_V01 0x0023 1633#define QMI_IPA_FILTER_INSTALLED_NOTIF_REQ_V01 0x0024 1634#define QMI_IPA_FILTER_INSTALLED_NOTIF_RESP_V01 0x0024 1635#define QMI_IPA_ENABLE_FORCE_CLEAR_DATAPATH_REQ_V01 0x0025 1636#define QMI_IPA_ENABLE_FORCE_CLEAR_DATAPATH_RESP_V01 0x0025 1637#define QMI_IPA_DISABLE_FORCE_CLEAR_DATAPATH_REQ_V01 0x0026 1638#define QMI_IPA_DISABLE_FORCE_CLEAR_DATAPATH_RESP_V01 0x0026 1639#define QMI_IPA_CONFIG_REQ_V01 0x0027 1640#define QMI_IPA_CONFIG_RESP_V01 0x0027 1641#define QMI_IPA_DISABLE_LINK_LOW_PWR_STATE_REQ_V01 0x0028 1642#define QMI_IPA_DISABLE_LINK_LOW_PWR_STATE_RESP_V01 0x0028 1643#define QMI_IPA_ENABLE_LINK_LOW_PWR_STATE_REQ_V01 0x0029 1644#define QMI_IPA_ENABLE_LINK_LOW_PWR_STATE_RESP_V01 0x0029 1645#define QMI_IPA_GET_DATA_STATS_REQ_V01 0x0030 1646#define QMI_IPA_GET_DATA_STATS_RESP_V01 0x0030 1647#define QMI_IPA_GET_APN_DATA_STATS_REQ_V01 0x0031 1648#define QMI_IPA_GET_APN_DATA_STATS_RESP_V01 0x0031 1649#define QMI_IPA_SET_DATA_USAGE_QUOTA_REQ_V01 0x0032 1650#define QMI_IPA_SET_DATA_USAGE_QUOTA_RESP_V01 0x0032 1651#define QMI_IPA_DATA_USAGE_QUOTA_REACHED_IND_V01 0x0033 1652#define QMI_IPA_STOP_DATA_USAGE_QUOTA_REQ_V01 0x0034 1653#define QMI_IPA_STOP_DATA_USAGE_QUOTA_RESP_V01 0x0034 1654#define QMI_IPA_INIT_MODEM_DRIVER_CMPLT_REQ_V01 0x0035 1655#define QMI_IPA_INIT_MODEM_DRIVER_CMPLT_RESP_V01 0x0035 1656#define QMI_IPA_INSTALL_FILTER_RULE_EX_REQ_V01 0x0037 1657#define QMI_IPA_INSTALL_FILTER_RULE_EX_RESP_V01 0x0037 1658 1659/* add for max length*/ 1660#define QMI_IPA_INIT_MODEM_DRIVER_REQ_MAX_MSG_LEN_V01 134 1661#define QMI_IPA_INIT_MODEM_DRIVER_RESP_MAX_MSG_LEN_V01 25 1662#define QMI_IPA_INDICATION_REGISTER_REQ_MAX_MSG_LEN_V01 8 1663#define QMI_IPA_INDICATION_REGISTER_RESP_MAX_MSG_LEN_V01 7 1664#define QMI_IPA_INSTALL_FILTER_RULE_REQ_MAX_MSG_LEN_V01 22369 1665#define QMI_IPA_INSTALL_FILTER_RULE_RESP_MAX_MSG_LEN_V01 783 1666#define QMI_IPA_FILTER_INSTALLED_NOTIF_REQ_MAX_MSG_LEN_V01 834 1667#define QMI_IPA_FILTER_INSTALLED_NOTIF_RESP_MAX_MSG_LEN_V01 7 1668#define QMI_IPA_MASTER_DRIVER_INIT_COMPLETE_IND_MAX_MSG_LEN_V01 7 1669#define QMI_IPA_DATA_USAGE_QUOTA_REACHED_IND_MAX_MSG_LEN_V01 15 1670 1671 1672#define QMI_IPA_ENABLE_FORCE_CLEAR_DATAPATH_REQ_MAX_MSG_LEN_V01 18 1673#define QMI_IPA_DISABLE_FORCE_CLEAR_DATAPATH_REQ_MAX_MSG_LEN_V01 7 1674#define QMI_IPA_ENABLE_FORCE_CLEAR_DATAPATH_RESP_MAX_MSG_LEN_V01 7 1675#define QMI_IPA_DISABLE_FORCE_CLEAR_DATAPATH_RESP_MAX_MSG_LEN_V01 7 1676 1677 1678#define QMI_IPA_CONFIG_REQ_MAX_MSG_LEN_V01 102 1679#define QMI_IPA_CONFIG_RESP_MAX_MSG_LEN_V01 7 1680#define QMI_IPA_DISABLE_LINK_LOW_PWR_STATE_REQ_MAX_MSG_LEN_V01 18 1681#define QMI_IPA_DISABLE_LINK_LOW_PWR_STATE_RESP_MAX_MSG_LEN_V01 7 1682#define QMI_IPA_ENABLE_LINK_LOW_PWR_STATE_REQ_MAX_MSG_LEN_V01 7 1683#define QMI_IPA_ENABLE_LINK_LOW_PWR_STATE_RESP_MAX_MSG_LEN_V01 7 1684#define QMI_IPA_GET_DATA_STATS_REQ_MAX_MSG_LEN_V01 11 1685#define QMI_IPA_GET_DATA_STATS_RESP_MAX_MSG_LEN_V01 2234 1686#define QMI_IPA_GET_APN_DATA_STATS_REQ_MAX_MSG_LEN_V01 36 1687#define QMI_IPA_GET_APN_DATA_STATS_RESP_MAX_MSG_LEN_V01 299 1688#define QMI_IPA_SET_DATA_USAGE_QUOTA_REQ_MAX_MSG_LEN_V01 100 1689#define QMI_IPA_SET_DATA_USAGE_QUOTA_RESP_MAX_MSG_LEN_V01 7 1690#define QMI_IPA_STOP_DATA_USAGE_QUOTA_REQ_MAX_MSG_LEN_V01 0 1691#define QMI_IPA_STOP_DATA_USAGE_QUOTA_RESP_MAX_MSG_LEN_V01 7 1692 1693#define QMI_IPA_INIT_MODEM_DRIVER_CMPLT_REQ_MAX_MSG_LEN_V01 4 1694#define QMI_IPA_INIT_MODEM_DRIVER_CMPLT_RESP_MAX_MSG_LEN_V01 7 1695 1696#define QMI_IPA_INSTALL_FILTER_RULE_EX_REQ_MAX_MSG_LEN_V01 22685 1697#define QMI_IPA_INSTALL_FILTER_RULE_EX_RESP_MAX_MSG_LEN_V01 523 1698 1699/* Service Object Accessor */ 1700 1701#endif/* IPA_QMI_SERVICE_V01_H */ 1702