1#ifndef __UAPI_MFD_MSM_ADIE_CODEC_H 2#define __UAPI_MFD_MSM_ADIE_CODEC_H 3 4#include <linux/types.h> 5 6/* Value Represents a entry */ 7#define ADIE_CODEC_ACTION_ENTRY 0x1 8/* Value representing a delay wait */ 9#define ADIE_CODEC_ACTION_DELAY_WAIT 0x2 10/* Value representing a stage reached */ 11#define ADIE_CODEC_ACTION_STAGE_REACHED 0x3 12 13/* This value is the state after the client sets the path */ 14#define ADIE_CODEC_PATH_OFF 0x0050 15 16/* State to which client asks the drv to proceed to where it can 17 * set up the clocks and 0-fill PCM buffers 18 */ 19#define ADIE_CODEC_DIGITAL_READY 0x0100 20 21/* State to which client asks the drv to proceed to where it can 22 * start sending data after internal steady state delay 23 */ 24#define ADIE_CODEC_DIGITAL_ANALOG_READY 0x1000 25 26 27/* Client Asks adie to switch off the Analog portion of the 28 * the internal codec. After the use of this path 29 */ 30#define ADIE_CODEC_ANALOG_OFF 0x0750 31 32 33/* Client Asks adie to switch off the digital portion of the 34 * the internal codec. After switching off the analog portion. 35 * 36 * 0-fill PCM may or maynot be sent at this point 37 * 38 */ 39#define ADIE_CODEC_DIGITAL_OFF 0x0600 40 41/* State to which client asks the drv to write the default values 42 * to the registers */ 43#define ADIE_CODEC_FLASH_IMAGE 0x0001 44 45/* Path type */ 46#define ADIE_CODEC_RX 0 47#define ADIE_CODEC_TX 1 48#define ADIE_CODEC_LB 3 49#define ADIE_CODEC_MAX 4 50 51#define ADIE_CODEC_PACK_ENTRY(reg, mask, val) ((val)|(mask << 8)|(reg << 16)) 52 53#define ADIE_CODEC_UNPACK_ENTRY(packed, reg, mask, val) \ 54 do { \ 55 ((reg) = ((packed >> 16) & (0xff))); \ 56 ((mask) = ((packed >> 8) & (0xff))); \ 57 ((val) = ((packed) & (0xff))); \ 58 } while (0); 59 60struct adie_codec_action_unit { 61 u32 type; 62 u32 action; 63}; 64 65struct adie_codec_hwsetting_entry{ 66 struct adie_codec_action_unit *actions; 67 u32 action_sz; 68 u32 freq_plan; 69 u32 osr; 70 /* u32 VolMask; 71 * u32 SidetoneMask; 72 */ 73}; 74 75struct adie_codec_dev_profile { 76 u32 path_type; /* RX or TX */ 77 u32 setting_sz; 78 struct adie_codec_hwsetting_entry *settings; 79}; 80 81struct adie_codec_register { 82 u8 reg; 83 u8 mask; 84 u8 val; 85}; 86 87struct adie_codec_register_image { 88 struct adie_codec_register *regs; 89 u32 img_sz; 90}; 91 92struct adie_codec_path; 93 94struct adie_codec_anc_data { 95 u32 size; 96 u32 writes[]; 97}; 98 99struct adie_codec_operations { 100 int codec_id; 101 int (*codec_open) (struct adie_codec_dev_profile *profile, 102 struct adie_codec_path **path_pptr); 103 int (*codec_close) (struct adie_codec_path *path_ptr); 104 int (*codec_setpath) (struct adie_codec_path *path_ptr, 105 u32 freq_plan, u32 osr); 106 int (*codec_proceed_stage) (struct adie_codec_path *path_ptr, 107 u32 state); 108 u32 (*codec_freq_supported) (struct adie_codec_dev_profile *profile, 109 u32 requested_freq); 110 int (*codec_enable_sidetone) (struct adie_codec_path *rx_path_ptr, 111 u32 enable); 112 int (*codec_enable_anc) (struct adie_codec_path *rx_path_ptr, 113 u32 enable, struct adie_codec_anc_data *calibration_writes); 114 int (*codec_set_device_digital_volume) ( 115 struct adie_codec_path *path_ptr, 116 u32 num_channels, 117 u32 vol_percentage); 118 119 int (*codec_set_device_analog_volume) (struct adie_codec_path *path_ptr, 120 u32 num_channels, 121 u32 volume); 122 int (*codec_set_master_mode) (struct adie_codec_path *path_ptr, 123 u8 master); 124}; 125 126int adie_codec_register_codec_operations( 127 const struct adie_codec_operations *codec_ops); 128int adie_codec_open(struct adie_codec_dev_profile *profile, 129 struct adie_codec_path **path_pptr); 130int adie_codec_setpath(struct adie_codec_path *path_ptr, 131 u32 freq_plan, u32 osr); 132int adie_codec_proceed_stage(struct adie_codec_path *path_ptr, u32 state); 133int adie_codec_close(struct adie_codec_path *path_ptr); 134u32 adie_codec_freq_supported(struct adie_codec_dev_profile *profile, 135 u32 requested_freq); 136int adie_codec_enable_sidetone(struct adie_codec_path *rx_path_ptr, u32 enable); 137int adie_codec_enable_anc(struct adie_codec_path *rx_path_ptr, u32 enable, 138 struct adie_codec_anc_data *calibration_writes); 139int adie_codec_set_device_digital_volume(struct adie_codec_path *path_ptr, 140 u32 num_channels, u32 vol_percentage /* in percentage */); 141 142int adie_codec_set_device_analog_volume(struct adie_codec_path *path_ptr, 143 u32 num_channels, u32 volume /* in percentage */); 144 145int adie_codec_set_master_mode(struct adie_codec_path *path_ptr, u8 master); 146#endif 147