1//=- llvm/CodeGen/ScheduleHazardRecognizer.h - Scheduling Support -*- C++ -*-=//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the ScheduleHazardRecognizer class, which implements
11// hazard-avoidance heuristics for scheduling.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef LLVM_CODEGEN_SCHEDULEHAZARDRECOGNIZER_H
16#define LLVM_CODEGEN_SCHEDULEHAZARDRECOGNIZER_H
17
18namespace llvm {
19
20class MachineInstr;
21class SUnit;
22
23/// HazardRecognizer - This determines whether or not an instruction can be
24/// issued this cycle, and whether or not a noop needs to be inserted to handle
25/// the hazard.
26class ScheduleHazardRecognizer {
27protected:
28  /// MaxLookAhead - Indicate the number of cycles in the scoreboard
29  /// state. Important to restore the state after backtracking. Additionally,
30  /// MaxLookAhead=0 identifies a fake recognizer, allowing the client to
31  /// bypass virtual calls. Currently the PostRA scheduler ignores it.
32  unsigned MaxLookAhead = 0;
33
34public:
35  ScheduleHazardRecognizer() = default;
36  virtual ~ScheduleHazardRecognizer();
37
38  enum HazardType {
39    NoHazard,      // This instruction can be emitted at this cycle.
40    Hazard,        // This instruction can't be emitted at this cycle.
41    NoopHazard     // This instruction can't be emitted, and needs noops.
42  };
43
44  unsigned getMaxLookAhead() const { return MaxLookAhead; }
45
46  bool isEnabled() const { return MaxLookAhead != 0; }
47
48  /// atIssueLimit - Return true if no more instructions may be issued in this
49  /// cycle.
50  ///
51  /// FIXME: remove this once MachineScheduler is the only client.
52  virtual bool atIssueLimit() const { return false; }
53
54  /// getHazardType - Return the hazard type of emitting this node.  There are
55  /// three possible results.  Either:
56  ///  * NoHazard: it is legal to issue this instruction on this cycle.
57  ///  * Hazard: issuing this instruction would stall the machine.  If some
58  ///     other instruction is available, issue it first.
59  ///  * NoopHazard: issuing this instruction would break the program.  If
60  ///     some other instruction can be issued, do so, otherwise issue a noop.
61  virtual HazardType getHazardType(SUnit *m, int Stalls = 0) {
62    return NoHazard;
63  }
64
65  /// Reset - This callback is invoked when a new block of
66  /// instructions is about to be schedule. The hazard state should be
67  /// set to an initialized state.
68  virtual void Reset() {}
69
70  /// EmitInstruction - This callback is invoked when an instruction is
71  /// emitted, to advance the hazard state.
72  virtual void EmitInstruction(SUnit *) {}
73
74  /// This overload will be used when the hazard recognizer is being used
75  /// by a non-scheduling pass, which does not use SUnits.
76  virtual void EmitInstruction(MachineInstr *) {}
77
78  /// PreEmitNoops - This callback is invoked prior to emitting an instruction.
79  /// It should return the number of noops to emit prior to the provided
80  /// instruction.
81  /// Note: This is only used during PostRA scheduling. EmitNoop is not called
82  /// for these noops.
83  virtual unsigned PreEmitNoops(SUnit *) {
84    return 0;
85  }
86
87  /// This overload will be used when the hazard recognizer is being used
88  /// by a non-scheduling pass, which does not use SUnits.
89  virtual unsigned PreEmitNoops(MachineInstr *) {
90    return 0;
91  }
92
93  /// ShouldPreferAnother - This callback may be invoked if getHazardType
94  /// returns NoHazard. If, even though there is no hazard, it would be better to
95  /// schedule another available instruction, this callback should return true.
96  virtual bool ShouldPreferAnother(SUnit *) {
97    return false;
98  }
99
100  /// AdvanceCycle - This callback is invoked whenever the next top-down
101  /// instruction to be scheduled cannot issue in the current cycle, either
102  /// because of latency or resource conflicts.  This should increment the
103  /// internal state of the hazard recognizer so that previously "Hazard"
104  /// instructions will now not be hazards.
105  virtual void AdvanceCycle() {}
106
107  /// RecedeCycle - This callback is invoked whenever the next bottom-up
108  /// instruction to be scheduled cannot issue in the current cycle, either
109  /// because of latency or resource conflicts.
110  virtual void RecedeCycle() {}
111
112  /// EmitNoop - This callback is invoked when a noop was added to the
113  /// instruction stream.
114  virtual void EmitNoop() {
115    // Default implementation: count it as a cycle.
116    AdvanceCycle();
117  }
118};
119
120} // end namespace llvm
121
122#endif // LLVM_CODEGEN_SCHEDULEHAZARDRECOGNIZER_H
123