1//===-- llvm/CodeGen/GlobalISel/MachineIRBuilder.h - MIBuilder --*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9/// \file
10/// This file declares the MachineIRBuilder class.
11/// This is a helper class to build MachineInstr.
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_CODEGEN_GLOBALISEL_MACHINEIRBUILDER_H
15#define LLVM_CODEGEN_GLOBALISEL_MACHINEIRBUILDER_H
16
17#include "llvm/CodeGen/GlobalISel/Types.h"
18
19#include "llvm/CodeGen/LowLevelType.h"
20#include "llvm/CodeGen/MachineBasicBlock.h"
21#include "llvm/CodeGen/MachineInstrBuilder.h"
22#include "llvm/IR/Constants.h"
23#include "llvm/IR/DebugLoc.h"
24
25#include <queue>
26
27namespace llvm {
28
29// Forward declarations.
30class MachineFunction;
31class MachineInstr;
32class TargetInstrInfo;
33
34/// Helper class to build MachineInstr.
35/// It keeps internally the insertion point and debug location for all
36/// the new instructions we want to create.
37/// This information can be modify via the related setters.
38class MachineIRBuilder {
39  /// MachineFunction under construction.
40  MachineFunction *MF;
41  /// Information used to access the description of the opcodes.
42  const TargetInstrInfo *TII;
43  /// Information used to verify types are consistent and to create virtual registers.
44  MachineRegisterInfo *MRI;
45  /// Debug location to be set to any instruction we create.
46  DebugLoc DL;
47
48  /// \name Fields describing the insertion point.
49  /// @{
50  MachineBasicBlock *MBB;
51  MachineBasicBlock::iterator II;
52  /// @}
53
54  std::function<void(MachineInstr *)> InsertedInstr;
55
56  const TargetInstrInfo &getTII() {
57    assert(TII && "TargetInstrInfo is not set");
58    return *TII;
59  }
60
61  void validateTruncExt(unsigned Dst, unsigned Src, bool IsExtend);
62
63public:
64  /// Getter for the function we currently build.
65  MachineFunction &getMF() {
66    assert(MF && "MachineFunction is not set");
67    return *MF;
68  }
69
70  /// Getter for the basic block we currently build.
71  MachineBasicBlock &getMBB() {
72    assert(MBB && "MachineBasicBlock is not set");
73    return *MBB;
74  }
75
76  /// Current insertion point for new instructions.
77  MachineBasicBlock::iterator getInsertPt() {
78    return II;
79  }
80
81  /// Set the insertion point before the specified position.
82  /// \pre MBB must be in getMF().
83  /// \pre II must be a valid iterator in MBB.
84  void setInsertPt(MachineBasicBlock &MBB, MachineBasicBlock::iterator II);
85  /// @}
86
87  /// \name Setters for the insertion point.
88  /// @{
89  /// Set the MachineFunction where to build instructions.
90  void setMF(MachineFunction &);
91
92  /// Set the insertion point to the  end of \p MBB.
93  /// \pre \p MBB must be contained by getMF().
94  void setMBB(MachineBasicBlock &MBB);
95
96  /// Set the insertion point to before MI.
97  /// \pre MI must be in getMF().
98  void setInstr(MachineInstr &MI);
99  /// @}
100
101  /// \name Control where instructions we create are recorded (typically for
102  /// visiting again later during legalization).
103  /// @{
104  void recordInsertions(std::function<void(MachineInstr *)> InsertedInstr);
105  void stopRecordingInsertions();
106  /// @}
107
108  /// Set the debug location to \p DL for all the next build instructions.
109  void setDebugLoc(const DebugLoc &DL) { this->DL = DL; }
110
111  /// Get the current instruction's debug location.
112  DebugLoc getDebugLoc() { return DL; }
113
114  /// Build and insert <empty> = \p Opcode <empty>.
115  /// The insertion point is the one set by the last call of either
116  /// setBasicBlock or setMI.
117  ///
118  /// \pre setBasicBlock or setMI must have been called.
119  ///
120  /// \return a MachineInstrBuilder for the newly created instruction.
121  MachineInstrBuilder buildInstr(unsigned Opcode);
122
123  /// Build but don't insert <empty> = \p Opcode <empty>.
124  ///
125  /// \pre setMF, setBasicBlock or setMI  must have been called.
126  ///
127  /// \return a MachineInstrBuilder for the newly created instruction.
128  MachineInstrBuilder buildInstrNoInsert(unsigned Opcode);
129
130  /// Insert an existing instruction at the insertion point.
131  MachineInstrBuilder insertInstr(MachineInstrBuilder MIB);
132
133  /// Build and insert a DBG_VALUE instruction expressing the fact that the
134  /// associated \p Variable lives in \p Reg (suitably modified by \p Expr).
135  MachineInstrBuilder buildDirectDbgValue(unsigned Reg, const MDNode *Variable,
136                                          const MDNode *Expr);
137
138  /// Build and insert a DBG_VALUE instruction expressing the fact that the
139  /// associated \p Variable lives in memory at \p Reg + \p Offset (suitably
140  /// modified by \p Expr).
141  MachineInstrBuilder buildIndirectDbgValue(unsigned Reg, unsigned Offset,
142                                            const MDNode *Variable,
143                                            const MDNode *Expr);
144  /// Build and insert a DBG_VALUE instruction expressing the fact that the
145  /// associated \p Variable lives in the stack slot specified by \p FI
146  /// (suitably modified by \p Expr).
147  MachineInstrBuilder buildFIDbgValue(int FI, const MDNode *Variable,
148                                      const MDNode *Expr);
149
150  /// Build and insert a DBG_VALUE instructions specifying that \p Variable is
151  /// given by \p C (suitably modified by \p Expr).
152  MachineInstrBuilder buildConstDbgValue(const Constant &C, unsigned Offset,
153                                         const MDNode *Variable,
154                                         const MDNode *Expr);
155
156  /// Build and insert \p Res<def> = G_FRAME_INDEX \p Idx
157  ///
158  /// G_FRAME_INDEX materializes the address of an alloca value or other
159  /// stack-based object.
160  ///
161  /// \pre setBasicBlock or setMI must have been called.
162  /// \pre \p Res must be a generic virtual register with pointer type.
163  ///
164  /// \return a MachineInstrBuilder for the newly created instruction.
165  MachineInstrBuilder buildFrameIndex(unsigned Res, int Idx);
166
167  /// Build and insert \p Res<def> = G_GLOBAL_VALUE \p GV
168  ///
169  /// G_GLOBAL_VALUE materializes the address of the specified global
170  /// into \p Res.
171  ///
172  /// \pre setBasicBlock or setMI must have been called.
173  /// \pre \p Res must be a generic virtual register with pointer type
174  ///      in the same address space as \p GV.
175  ///
176  /// \return a MachineInstrBuilder for the newly created instruction.
177  MachineInstrBuilder buildGlobalValue(unsigned Res, const GlobalValue *GV);
178
179  /// Build and insert \p Res<def> = G_ADD \p Op0, \p Op1
180  ///
181  /// G_ADD sets \p Res to the sum of integer parameters \p Op0 and \p Op1,
182  /// truncated to their width.
183  ///
184  /// \pre setBasicBlock or setMI must have been called.
185  /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
186  ///      with the same (scalar or vector) type).
187  ///
188  /// \return a MachineInstrBuilder for the newly created instruction.
189  MachineInstrBuilder buildAdd(unsigned Res, unsigned Op0,
190                               unsigned Op1);
191
192  /// Build and insert \p Res<def> = G_SUB \p Op0, \p Op1
193  ///
194  /// G_SUB sets \p Res to the sum of integer parameters \p Op0 and \p Op1,
195  /// truncated to their width.
196  ///
197  /// \pre setBasicBlock or setMI must have been called.
198  /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
199  ///      with the same (scalar or vector) type).
200  ///
201  /// \return a MachineInstrBuilder for the newly created instruction.
202  MachineInstrBuilder buildSub(unsigned Res, unsigned Op0,
203                               unsigned Op1);
204
205  /// Build and insert \p Res<def> = G_MUL \p Op0, \p Op1
206  ///
207  /// G_MUL sets \p Res to the sum of integer parameters \p Op0 and \p Op1,
208  /// truncated to their width.
209  ///
210  /// \pre setBasicBlock or setMI must have been called.
211  /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
212  ///      with the same (scalar or vector) type).
213  ///
214  /// \return a MachineInstrBuilder for the newly created instruction.
215  MachineInstrBuilder buildMul(unsigned Res, unsigned Op0,
216                               unsigned Op1);
217
218  /// Build and insert \p Res<def> = G_GEP \p Op0, \p Op1
219  ///
220  /// G_GEP adds \p Op1 bytes to the pointer specified by \p Op0,
221  /// storing the resulting pointer in \p Res.
222  ///
223  /// \pre setBasicBlock or setMI must have been called.
224  /// \pre \p Res and \p Op0 must be generic virtual registers with pointer
225  ///      type.
226  /// \pre \p Op1 must be a generic virtual register with scalar type.
227  ///
228  /// \return a MachineInstrBuilder for the newly created instruction.
229  MachineInstrBuilder buildGEP(unsigned Res, unsigned Op0,
230                               unsigned Op1);
231
232  /// Materialize and insert \p Res<def> = G_GEP \p Op0, (G_CONSTANT \p Value)
233  ///
234  /// G_GEP adds \p Value bytes to the pointer specified by \p Op0,
235  /// storing the resulting pointer in \p Res. If \p Value is zero then no
236  /// G_GEP or G_CONSTANT will be created and \pre Op0 will be assigned to
237  /// \p Res.
238  ///
239  /// \pre setBasicBlock or setMI must have been called.
240  /// \pre \p Op0 must be a generic virtual register with pointer type.
241  /// \pre \p ValueTy must be a scalar type.
242  /// \pre \p Res must be 0. This is to detect confusion between
243  ///      materializeGEP() and buildGEP().
244  /// \post \p Res will either be a new generic virtual register of the same
245  ///       type as \p Op0 or \p Op0 itself.
246  ///
247  /// \return a MachineInstrBuilder for the newly created instruction.
248  Optional<MachineInstrBuilder> materializeGEP(unsigned &Res, unsigned Op0,
249                                               const LLT &ValueTy,
250                                               uint64_t Value);
251
252  /// Build and insert \p Res<def> = G_PTR_MASK \p Op0, \p NumBits
253  ///
254  /// G_PTR_MASK clears the low bits of a pointer operand without destroying its
255  /// pointer properties. This has the effect of rounding the address *down* to
256  /// a specified alignment in bits.
257  ///
258  /// \pre setBasicBlock or setMI must have been called.
259  /// \pre \p Res and \p Op0 must be generic virtual registers with pointer
260  ///      type.
261  /// \pre \p NumBits must be an integer representing the number of low bits to
262  ///      be cleared in \p Op0.
263  ///
264  /// \return a MachineInstrBuilder for the newly created instruction.
265  MachineInstrBuilder buildPtrMask(unsigned Res, unsigned Op0,
266                                   uint32_t NumBits);
267
268  /// Build and insert \p Res<def>, \p CarryOut<def> = G_UADDE \p Op0,
269  /// \p Op1, \p CarryIn
270  ///
271  /// G_UADDE sets \p Res to \p Op0 + \p Op1 + \p CarryIn (truncated to the bit
272  /// width) and sets \p CarryOut to 1 if the result overflowed in unsigned
273  /// arithmetic.
274  ///
275  /// \pre setBasicBlock or setMI must have been called.
276  /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
277  ///      with the same scalar type.
278  /// \pre \p CarryOut and \p CarryIn must be generic virtual
279  ///      registers with the same scalar type (typically s1)
280  ///
281  /// \return The newly created instruction.
282  MachineInstrBuilder buildUAdde(unsigned Res, unsigned CarryOut, unsigned Op0,
283                                 unsigned Op1, unsigned CarryIn);
284
285  /// Build and insert \p Res<def> = G_AND \p Op0, \p Op1
286  ///
287  /// G_AND sets \p Res to the bitwise and of integer parameters \p Op0 and \p
288  /// Op1.
289  ///
290  /// \pre setBasicBlock or setMI must have been called.
291  /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
292  ///      with the same (scalar or vector) type).
293  ///
294  /// \return a MachineInstrBuilder for the newly created instruction.
295  MachineInstrBuilder buildAnd(unsigned Res, unsigned Op0,
296                               unsigned Op1);
297
298  /// Build and insert \p Res<def> = G_ANYEXT \p Op0
299  ///
300  /// G_ANYEXT produces a register of the specified width, with bits 0 to
301  /// sizeof(\p Ty) * 8 set to \p Op. The remaining bits are unspecified
302  /// (i.e. this is neither zero nor sign-extension). For a vector register,
303  /// each element is extended individually.
304  ///
305  /// \pre setBasicBlock or setMI must have been called.
306  /// \pre \p Res must be a generic virtual register with scalar or vector type.
307  /// \pre \p Op must be a generic virtual register with scalar or vector type.
308  /// \pre \p Op must be smaller than \p Res
309  ///
310  /// \return The newly created instruction.
311  MachineInstrBuilder buildAnyExt(unsigned Res, unsigned Op);
312
313  /// Build and insert \p Res<def> = G_SEXT \p Op
314  ///
315  /// G_SEXT produces a register of the specified width, with bits 0 to
316  /// sizeof(\p Ty) * 8 set to \p Op. The remaining bits are duplicated from the
317  /// high bit of \p Op (i.e. 2s-complement sign extended).
318  ///
319  /// \pre setBasicBlock or setMI must have been called.
320  /// \pre \p Res must be a generic virtual register with scalar or vector type.
321  /// \pre \p Op must be a generic virtual register with scalar or vector type.
322  /// \pre \p Op must be smaller than \p Res
323  ///
324  /// \return The newly created instruction.
325  MachineInstrBuilder buildSExt(unsigned Res, unsigned Op);
326
327  /// Build and insert \p Res<def> = G_ZEXT \p Op
328  ///
329  /// G_ZEXT produces a register of the specified width, with bits 0 to
330  /// sizeof(\p Ty) * 8 set to \p Op. The remaining bits are 0. For a vector
331  /// register, each element is extended individually.
332  ///
333  /// \pre setBasicBlock or setMI must have been called.
334  /// \pre \p Res must be a generic virtual register with scalar or vector type.
335  /// \pre \p Op must be a generic virtual register with scalar or vector type.
336  /// \pre \p Op must be smaller than \p Res
337  ///
338  /// \return The newly created instruction.
339  MachineInstrBuilder buildZExt(unsigned Res, unsigned Op);
340
341  /// Build and insert \p Res<def> = G_SEXT \p Op, \p Res = G_TRUNC \p Op, or
342  /// \p Res = COPY \p Op depending on the differing sizes of \p Res and \p Op.
343  ///  ///
344  /// \pre setBasicBlock or setMI must have been called.
345  /// \pre \p Res must be a generic virtual register with scalar or vector type.
346  /// \pre \p Op must be a generic virtual register with scalar or vector type.
347  ///
348  /// \return The newly created instruction.
349  MachineInstrBuilder buildSExtOrTrunc(unsigned Res, unsigned Op);
350
351  /// Build and insert \p Res<def> = G_ZEXT \p Op, \p Res = G_TRUNC \p Op, or
352  /// \p Res = COPY \p Op depending on the differing sizes of \p Res and \p Op.
353  ///  ///
354  /// \pre setBasicBlock or setMI must have been called.
355  /// \pre \p Res must be a generic virtual register with scalar or vector type.
356  /// \pre \p Op must be a generic virtual register with scalar or vector type.
357  ///
358  /// \return The newly created instruction.
359  MachineInstrBuilder buildZExtOrTrunc(unsigned Res, unsigned Op);
360
361  /// Build and insert an appropriate cast between two registers of equal size.
362  MachineInstrBuilder buildCast(unsigned Dst, unsigned Src);
363
364  /// Build and insert G_BR \p Dest
365  ///
366  /// G_BR is an unconditional branch to \p Dest.
367  ///
368  /// \pre setBasicBlock or setMI must have been called.
369  ///
370  /// \return a MachineInstrBuilder for the newly created instruction.
371  MachineInstrBuilder buildBr(MachineBasicBlock &BB);
372
373  /// Build and insert G_BRCOND \p Tst, \p Dest
374  ///
375  /// G_BRCOND is a conditional branch to \p Dest.
376  ///
377  /// \pre setBasicBlock or setMI must have been called.
378  /// \pre \p Tst must be a generic virtual register with scalar
379  ///      type. At the beginning of legalization, this will be a single
380  ///      bit (s1). Targets with interesting flags registers may change
381  ///      this. For a wider type, whether the branch is taken must only
382  ///      depend on bit 0 (for now).
383  ///
384  /// \return The newly created instruction.
385  MachineInstrBuilder buildBrCond(unsigned Tst, MachineBasicBlock &BB);
386
387  /// Build and insert G_BRINDIRECT \p Tgt
388  ///
389  /// G_BRINDIRECT is an indirect branch to \p Tgt.
390  ///
391  /// \pre setBasicBlock or setMI must have been called.
392  /// \pre \p Tgt must be a generic virtual register with pointer type.
393  ///
394  /// \return a MachineInstrBuilder for the newly created instruction.
395  MachineInstrBuilder buildBrIndirect(unsigned Tgt);
396
397  /// Build and insert \p Res = G_CONSTANT \p Val
398  ///
399  /// G_CONSTANT is an integer constant with the specified size and value. \p
400  /// Val will be extended or truncated to the size of \p Reg.
401  ///
402  /// \pre setBasicBlock or setMI must have been called.
403  /// \pre \p Res must be a generic virtual register with scalar or pointer
404  ///      type.
405  ///
406  /// \return The newly created instruction.
407  MachineInstrBuilder buildConstant(unsigned Res, const ConstantInt &Val);
408
409  /// Build and insert \p Res = G_CONSTANT \p Val
410  ///
411  /// G_CONSTANT is an integer constant with the specified size and value.
412  ///
413  /// \pre setBasicBlock or setMI must have been called.
414  /// \pre \p Res must be a generic virtual register with scalar type.
415  ///
416  /// \return The newly created instruction.
417  MachineInstrBuilder buildConstant(unsigned Res, int64_t Val);
418
419  /// Build and insert \p Res = G_FCONSTANT \p Val
420  ///
421  /// G_FCONSTANT is a floating-point constant with the specified size and
422  /// value.
423  ///
424  /// \pre setBasicBlock or setMI must have been called.
425  /// \pre \p Res must be a generic virtual register with scalar type.
426  ///
427  /// \return The newly created instruction.
428  MachineInstrBuilder buildFConstant(unsigned Res, const ConstantFP &Val);
429
430  /// Build and insert \p Res<def> = COPY Op
431  ///
432  /// Register-to-register COPY sets \p Res to \p Op.
433  ///
434  /// \pre setBasicBlock or setMI must have been called.
435  ///
436  /// \return a MachineInstrBuilder for the newly created instruction.
437  MachineInstrBuilder buildCopy(unsigned Res, unsigned Op);
438
439  /// Build and insert `Res<def> = G_LOAD Addr, MMO`.
440  ///
441  /// Loads the value stored at \p Addr. Puts the result in \p Res.
442  ///
443  /// \pre setBasicBlock or setMI must have been called.
444  /// \pre \p Res must be a generic virtual register.
445  /// \pre \p Addr must be a generic virtual register with pointer type.
446  ///
447  /// \return a MachineInstrBuilder for the newly created instruction.
448  MachineInstrBuilder buildLoad(unsigned Res, unsigned Addr,
449                                MachineMemOperand &MMO);
450
451  /// Build and insert `G_STORE Val, Addr, MMO`.
452  ///
453  /// Stores the value \p Val to \p Addr.
454  ///
455  /// \pre setBasicBlock or setMI must have been called.
456  /// \pre \p Val must be a generic virtual register.
457  /// \pre \p Addr must be a generic virtual register with pointer type.
458  ///
459  /// \return a MachineInstrBuilder for the newly created instruction.
460  MachineInstrBuilder buildStore(unsigned Val, unsigned Addr,
461                                 MachineMemOperand &MMO);
462
463  /// Build and insert `Res0<def>, ... = G_EXTRACT Src, Idx0`.
464  ///
465  /// \pre setBasicBlock or setMI must have been called.
466  /// \pre \p Res and \p Src must be generic virtual registers.
467  ///
468  /// \return a MachineInstrBuilder for the newly created instruction.
469  MachineInstrBuilder buildExtract(unsigned Res, unsigned Src, uint64_t Index);
470
471  /// Build and insert \p Res = IMPLICIT_DEF.
472  MachineInstrBuilder buildUndef(unsigned Dst);
473
474  /// Build and insert \p Res<def> = G_SEQUENCE \p Op0, \p Idx0...
475  ///
476  /// G_SEQUENCE inserts each element of Ops into an IMPLICIT_DEF register,
477  /// where each entry starts at the bit-index specified by \p Indices.
478  ///
479  /// \pre setBasicBlock or setMI must have been called.
480  /// \pre The final element of the sequence must not extend past the end of the
481  ///      destination register.
482  /// \pre The bits defined by each Op (derived from index and scalar size) must
483  ///      not overlap.
484  /// \pre \p Indices must be in ascending order of bit position.
485  ///
486  /// \return a MachineInstrBuilder for the newly created instruction.
487  MachineInstrBuilder buildSequence(unsigned Res,
488                                    ArrayRef<unsigned> Ops,
489                                    ArrayRef<uint64_t> Indices);
490
491  /// Build and insert \p Res<def> = G_MERGE_VALUES \p Op0, ...
492  ///
493  /// G_MERGE_VALUES combines the input elements contiguously into a larger
494  /// register.
495  ///
496  /// \pre setBasicBlock or setMI must have been called.
497  /// \pre The entire register \p Res (and no more) must be covered by the input
498  ///      registers.
499  /// \pre The type of all \p Ops registers must be identical.
500  ///
501  /// \return a MachineInstrBuilder for the newly created instruction.
502  MachineInstrBuilder buildMerge(unsigned Res, ArrayRef<unsigned> Ops);
503
504  /// Build and insert \p Res0<def>, ... = G_UNMERGE_VALUES \p Op
505  ///
506  /// G_UNMERGE_VALUES splits contiguous bits of the input into multiple
507  ///
508  /// \pre setBasicBlock or setMI must have been called.
509  /// \pre The entire register \p Res (and no more) must be covered by the input
510  ///      registers.
511  /// \pre The type of all \p Res registers must be identical.
512  ///
513  /// \return a MachineInstrBuilder for the newly created instruction.
514  MachineInstrBuilder buildUnmerge(ArrayRef<unsigned> Res, unsigned Op);
515
516  void addUsesWithIndices(MachineInstrBuilder MIB) {}
517
518  template <typename... ArgTys>
519  void addUsesWithIndices(MachineInstrBuilder MIB, unsigned Reg,
520                          unsigned BitIndex, ArgTys... Args) {
521    MIB.addUse(Reg).addImm(BitIndex);
522    addUsesWithIndices(MIB, Args...);
523  }
524
525  template <typename... ArgTys>
526  MachineInstrBuilder buildSequence(unsigned Res, unsigned Op,
527                                    unsigned Index, ArgTys... Args) {
528    MachineInstrBuilder MIB =
529        buildInstr(TargetOpcode::G_SEQUENCE).addDef(Res);
530    addUsesWithIndices(MIB, Op, Index, Args...);
531    return MIB;
532  }
533
534  MachineInstrBuilder buildInsert(unsigned Res, unsigned Src,
535                                  unsigned Op, unsigned Index);
536
537  /// Build and insert either a G_INTRINSIC (if \p HasSideEffects is false) or
538  /// G_INTRINSIC_W_SIDE_EFFECTS instruction. Its first operand will be the
539  /// result register definition unless \p Reg is NoReg (== 0). The second
540  /// operand will be the intrinsic's ID.
541  ///
542  /// Callers are expected to add the required definitions and uses afterwards.
543  ///
544  /// \pre setBasicBlock or setMI must have been called.
545  ///
546  /// \return a MachineInstrBuilder for the newly created instruction.
547  MachineInstrBuilder buildIntrinsic(Intrinsic::ID ID, unsigned Res,
548                                     bool HasSideEffects);
549
550  /// Build and insert \p Res<def> = G_FPTRUNC \p Op
551  ///
552  /// G_FPTRUNC converts a floating-point value into one with a smaller type.
553  ///
554  /// \pre setBasicBlock or setMI must have been called.
555  /// \pre \p Res must be a generic virtual register with scalar or vector type.
556  /// \pre \p Op must be a generic virtual register with scalar or vector type.
557  /// \pre \p Res must be smaller than \p Op
558  ///
559  /// \return The newly created instruction.
560  MachineInstrBuilder buildFPTrunc(unsigned Res, unsigned Op);
561
562  /// Build and insert \p Res<def> = G_TRUNC \p Op
563  ///
564  /// G_TRUNC extracts the low bits of a type. For a vector type each element is
565  /// truncated independently before being packed into the destination.
566  ///
567  /// \pre setBasicBlock or setMI must have been called.
568  /// \pre \p Res must be a generic virtual register with scalar or vector type.
569  /// \pre \p Op must be a generic virtual register with scalar or vector type.
570  /// \pre \p Res must be smaller than \p Op
571  ///
572  /// \return The newly created instruction.
573  MachineInstrBuilder buildTrunc(unsigned Res, unsigned Op);
574
575  /// Build and insert a \p Res = G_ICMP \p Pred, \p Op0, \p Op1
576  ///
577  /// \pre setBasicBlock or setMI must have been called.
578
579  /// \pre \p Res must be a generic virtual register with scalar or
580  ///      vector type. Typically this starts as s1 or <N x s1>.
581  /// \pre \p Op0 and Op1 must be generic virtual registers with the
582  ///      same number of elements as \p Res. If \p Res is a scalar,
583  ///      \p Op0 must be either a scalar or pointer.
584  /// \pre \p Pred must be an integer predicate.
585  ///
586  /// \return a MachineInstrBuilder for the newly created instruction.
587  MachineInstrBuilder buildICmp(CmpInst::Predicate Pred,
588                                unsigned Res, unsigned Op0, unsigned Op1);
589
590  /// Build and insert a \p Res = G_FCMP \p Pred\p Op0, \p Op1
591  ///
592  /// \pre setBasicBlock or setMI must have been called.
593
594  /// \pre \p Res must be a generic virtual register with scalar or
595  ///      vector type. Typically this starts as s1 or <N x s1>.
596  /// \pre \p Op0 and Op1 must be generic virtual registers with the
597  ///      same number of elements as \p Res (or scalar, if \p Res is
598  ///      scalar).
599  /// \pre \p Pred must be a floating-point predicate.
600  ///
601  /// \return a MachineInstrBuilder for the newly created instruction.
602  MachineInstrBuilder buildFCmp(CmpInst::Predicate Pred,
603                                unsigned Res, unsigned Op0, unsigned Op1);
604
605  /// Build and insert a \p Res = G_SELECT \p Tst, \p Op0, \p Op1
606  ///
607  /// \pre setBasicBlock or setMI must have been called.
608  /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
609  ///      with the same type.
610  /// \pre \p Tst must be a generic virtual register with scalar, pointer or
611  ///      vector type. If vector then it must have the same number of
612  ///      elements as the other parameters.
613  ///
614  /// \return a MachineInstrBuilder for the newly created instruction.
615  MachineInstrBuilder buildSelect(unsigned Res, unsigned Tst,
616                                  unsigned Op0, unsigned Op1);
617
618  /// Build and insert \p Res<def> = G_INSERT_VECTOR_ELT \p Val,
619  /// \p Elt, \p Idx
620  ///
621  /// \pre setBasicBlock or setMI must have been called.
622  /// \pre \p Res and \p Val must be a generic virtual register
623  //       with the same vector type.
624  /// \pre \p Elt and \p Idx must be a generic virtual register
625  ///      with scalar type.
626  ///
627  /// \return The newly created instruction.
628  MachineInstrBuilder buildInsertVectorElement(unsigned Res, unsigned Val,
629                                               unsigned Elt, unsigned Idx);
630
631  /// Build and insert \p Res<def> = G_EXTRACT_VECTOR_ELT \p Val, \p Idx
632  ///
633  /// \pre setBasicBlock or setMI must have been called.
634  /// \pre \p Res must be a generic virtual register with scalar type.
635  /// \pre \p Val must be a generic virtual register with vector type.
636  /// \pre \p Idx must be a generic virtual register with scalar type.
637  ///
638  /// \return The newly created instruction.
639  MachineInstrBuilder buildExtractVectorElement(unsigned Res, unsigned Val,
640                                                unsigned Idx);
641};
642
643} // End namespace llvm.
644#endif // LLVM_CODEGEN_GLOBALISEL_MACHINEIRBUILDER_H
645