1//===- llvm/CallingConvLower.h - Calling Conventions ------------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file declares the CCState and CCValAssign classes, used for lowering
11// and implementing calling conventions.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef LLVM_CODEGEN_CALLINGCONVLOWER_H
16#define LLVM_CODEGEN_CALLINGCONVLOWER_H
17
18#include "llvm/ADT/SmallVector.h"
19#include "llvm/CodeGen/MachineFrameInfo.h"
20#include "llvm/CodeGen/MachineFunction.h"
21#include "llvm/IR/CallingConv.h"
22#include "llvm/MC/MCRegisterInfo.h"
23#include "llvm/Target/TargetCallingConv.h"
24
25namespace llvm {
26
27class CCState;
28class MVT;
29class TargetMachine;
30class TargetRegisterInfo;
31
32/// CCValAssign - Represent assignment of one arg/retval to a location.
33class CCValAssign {
34public:
35  enum LocInfo {
36    Full,      // The value fills the full location.
37    SExt,      // The value is sign extended in the location.
38    ZExt,      // The value is zero extended in the location.
39    AExt,      // The value is extended with undefined upper bits.
40    SExtUpper, // The value is in the upper bits of the location and should be
41               // sign extended when retrieved.
42    ZExtUpper, // The value is in the upper bits of the location and should be
43               // zero extended when retrieved.
44    AExtUpper, // The value is in the upper bits of the location and should be
45               // extended with undefined upper bits when retrieved.
46    BCvt,      // The value is bit-converted in the location.
47    VExt,      // The value is vector-widened in the location.
48               // FIXME: Not implemented yet. Code that uses AExt to mean
49               // vector-widen should be fixed to use VExt instead.
50    FPExt,     // The floating-point value is fp-extended in the location.
51    Indirect   // The location contains pointer to the value.
52    // TODO: a subset of the value is in the location.
53  };
54
55private:
56  /// ValNo - This is the value number begin assigned (e.g. an argument number).
57  unsigned ValNo;
58
59  /// Loc is either a stack offset or a register number.
60  unsigned Loc;
61
62  /// isMem - True if this is a memory loc, false if it is a register loc.
63  unsigned isMem : 1;
64
65  /// isCustom - True if this arg/retval requires special handling.
66  unsigned isCustom : 1;
67
68  /// Information about how the value is assigned.
69  LocInfo HTP : 6;
70
71  /// ValVT - The type of the value being assigned.
72  MVT ValVT;
73
74  /// LocVT - The type of the location being assigned to.
75  MVT LocVT;
76public:
77
78  static CCValAssign getReg(unsigned ValNo, MVT ValVT,
79                            unsigned RegNo, MVT LocVT,
80                            LocInfo HTP) {
81    CCValAssign Ret;
82    Ret.ValNo = ValNo;
83    Ret.Loc = RegNo;
84    Ret.isMem = false;
85    Ret.isCustom = false;
86    Ret.HTP = HTP;
87    Ret.ValVT = ValVT;
88    Ret.LocVT = LocVT;
89    return Ret;
90  }
91
92  static CCValAssign getCustomReg(unsigned ValNo, MVT ValVT,
93                                  unsigned RegNo, MVT LocVT,
94                                  LocInfo HTP) {
95    CCValAssign Ret;
96    Ret = getReg(ValNo, ValVT, RegNo, LocVT, HTP);
97    Ret.isCustom = true;
98    return Ret;
99  }
100
101  static CCValAssign getMem(unsigned ValNo, MVT ValVT,
102                            unsigned Offset, MVT LocVT,
103                            LocInfo HTP) {
104    CCValAssign Ret;
105    Ret.ValNo = ValNo;
106    Ret.Loc = Offset;
107    Ret.isMem = true;
108    Ret.isCustom = false;
109    Ret.HTP = HTP;
110    Ret.ValVT = ValVT;
111    Ret.LocVT = LocVT;
112    return Ret;
113  }
114
115  static CCValAssign getCustomMem(unsigned ValNo, MVT ValVT,
116                                  unsigned Offset, MVT LocVT,
117                                  LocInfo HTP) {
118    CCValAssign Ret;
119    Ret = getMem(ValNo, ValVT, Offset, LocVT, HTP);
120    Ret.isCustom = true;
121    return Ret;
122  }
123
124  // There is no need to differentiate between a pending CCValAssign and other
125  // kinds, as they are stored in a different list.
126  static CCValAssign getPending(unsigned ValNo, MVT ValVT, MVT LocVT,
127                                LocInfo HTP, unsigned ExtraInfo = 0) {
128    return getReg(ValNo, ValVT, ExtraInfo, LocVT, HTP);
129  }
130
131  void convertToReg(unsigned RegNo) {
132    Loc = RegNo;
133    isMem = false;
134  }
135
136  void convertToMem(unsigned Offset) {
137    Loc = Offset;
138    isMem = true;
139  }
140
141  unsigned getValNo() const { return ValNo; }
142  MVT getValVT() const { return ValVT; }
143
144  bool isRegLoc() const { return !isMem; }
145  bool isMemLoc() const { return isMem; }
146
147  bool needsCustom() const { return isCustom; }
148
149  unsigned getLocReg() const { assert(isRegLoc()); return Loc; }
150  unsigned getLocMemOffset() const { assert(isMemLoc()); return Loc; }
151  unsigned getExtraInfo() const { return Loc; }
152  MVT getLocVT() const { return LocVT; }
153
154  LocInfo getLocInfo() const { return HTP; }
155  bool isExtInLoc() const {
156    return (HTP == AExt || HTP == SExt || HTP == ZExt);
157  }
158
159  bool isUpperBitsInLoc() const {
160    return HTP == AExtUpper || HTP == SExtUpper || HTP == ZExtUpper;
161  }
162};
163
164/// Describes a register that needs to be forwarded from the prologue to a
165/// musttail call.
166struct ForwardedRegister {
167  ForwardedRegister(unsigned VReg, MCPhysReg PReg, MVT VT)
168      : VReg(VReg), PReg(PReg), VT(VT) {}
169  unsigned VReg;
170  MCPhysReg PReg;
171  MVT VT;
172};
173
174/// CCAssignFn - This function assigns a location for Val, updating State to
175/// reflect the change.  It returns 'true' if it failed to handle Val.
176typedef bool CCAssignFn(unsigned ValNo, MVT ValVT,
177                        MVT LocVT, CCValAssign::LocInfo LocInfo,
178                        ISD::ArgFlagsTy ArgFlags, CCState &State);
179
180/// CCCustomFn - This function assigns a location for Val, possibly updating
181/// all args to reflect changes and indicates if it handled it. It must set
182/// isCustom if it handles the arg and returns true.
183typedef bool CCCustomFn(unsigned &ValNo, MVT &ValVT,
184                        MVT &LocVT, CCValAssign::LocInfo &LocInfo,
185                        ISD::ArgFlagsTy &ArgFlags, CCState &State);
186
187/// CCState - This class holds information needed while lowering arguments and
188/// return values.  It captures which registers are already assigned and which
189/// stack slots are used.  It provides accessors to allocate these values.
190class CCState {
191private:
192  CallingConv::ID CallingConv;
193  bool IsVarArg;
194  bool AnalyzingMustTailForwardedRegs = false;
195  MachineFunction &MF;
196  const TargetRegisterInfo &TRI;
197  SmallVectorImpl<CCValAssign> &Locs;
198  LLVMContext &Context;
199
200  unsigned StackOffset;
201  unsigned MaxStackArgAlign;
202  SmallVector<uint32_t, 16> UsedRegs;
203  SmallVector<CCValAssign, 4> PendingLocs;
204
205  // ByValInfo and SmallVector<ByValInfo, 4> ByValRegs:
206  //
207  // Vector of ByValInfo instances (ByValRegs) is introduced for byval registers
208  // tracking.
209  // Or, in another words it tracks byval parameters that are stored in
210  // general purpose registers.
211  //
212  // For 4 byte stack alignment,
213  // instance index means byval parameter number in formal
214  // arguments set. Assume, we have some "struct_type" with size = 4 bytes,
215  // then, for function "foo":
216  //
217  // i32 foo(i32 %p, %struct_type* %r, i32 %s, %struct_type* %t)
218  //
219  // ByValRegs[0] describes how "%r" is stored (Begin == r1, End == r2)
220  // ByValRegs[1] describes how "%t" is stored (Begin == r3, End == r4).
221  //
222  // In case of 8 bytes stack alignment,
223  // ByValRegs may also contain information about wasted registers.
224  // In function shown above, r3 would be wasted according to AAPCS rules.
225  // And in that case ByValRegs[1].Waste would be "true".
226  // ByValRegs vector size still would be 2,
227  // while "%t" goes to the stack: it wouldn't be described in ByValRegs.
228  //
229  // Supposed use-case for this collection:
230  // 1. Initially ByValRegs is empty, InRegsParamsProcessed is 0.
231  // 2. HandleByVal fillups ByValRegs.
232  // 3. Argument analysis (LowerFormatArguments, for example). After
233  // some byval argument was analyzed, InRegsParamsProcessed is increased.
234  struct ByValInfo {
235    ByValInfo(unsigned B, unsigned E, bool IsWaste = false) :
236      Begin(B), End(E), Waste(IsWaste) {}
237    // First register allocated for current parameter.
238    unsigned Begin;
239
240    // First after last register allocated for current parameter.
241    unsigned End;
242
243    // Means that current range of registers doesn't belong to any
244    // parameters. It was wasted due to stack alignment rules.
245    // For more information see:
246    // AAPCS, 5.5 Parameter Passing, Stage C, C.3.
247    bool Waste;
248  };
249  SmallVector<ByValInfo, 4 > ByValRegs;
250
251  // InRegsParamsProcessed - shows how many instances of ByValRegs was proceed
252  // during argument analysis.
253  unsigned InRegsParamsProcessed;
254
255public:
256  CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF,
257          SmallVectorImpl<CCValAssign> &locs, LLVMContext &C);
258
259  void addLoc(const CCValAssign &V) {
260    Locs.push_back(V);
261  }
262
263  LLVMContext &getContext() const { return Context; }
264  MachineFunction &getMachineFunction() const { return MF; }
265  CallingConv::ID getCallingConv() const { return CallingConv; }
266  bool isVarArg() const { return IsVarArg; }
267
268  /// getNextStackOffset - Return the next stack offset such that all stack
269  /// slots satisfy their alignment requirements.
270  unsigned getNextStackOffset() const {
271    return StackOffset;
272  }
273
274  /// getAlignedCallFrameSize - Return the size of the call frame needed to
275  /// be able to store all arguments and such that the alignment requirement
276  /// of each of the arguments is satisfied.
277  unsigned getAlignedCallFrameSize() const {
278    return alignTo(StackOffset, MaxStackArgAlign);
279  }
280
281  /// isAllocated - Return true if the specified register (or an alias) is
282  /// allocated.
283  bool isAllocated(unsigned Reg) const {
284    return UsedRegs[Reg/32] & (1 << (Reg&31));
285  }
286
287  /// AnalyzeFormalArguments - Analyze an array of argument values,
288  /// incorporating info about the formals into this state.
289  void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
290                              CCAssignFn Fn);
291
292  /// The function will invoke AnalyzeFormalArguments.
293  void AnalyzeArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
294                        CCAssignFn Fn) {
295    AnalyzeFormalArguments(Ins, Fn);
296  }
297
298  /// AnalyzeReturn - Analyze the returned values of a return,
299  /// incorporating info about the result values into this state.
300  void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
301                     CCAssignFn Fn);
302
303  /// CheckReturn - Analyze the return values of a function, returning
304  /// true if the return can be performed without sret-demotion, and
305  /// false otherwise.
306  bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
307                   CCAssignFn Fn);
308
309  /// AnalyzeCallOperands - Analyze the outgoing arguments to a call,
310  /// incorporating info about the passed values into this state.
311  void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
312                           CCAssignFn Fn);
313
314  /// AnalyzeCallOperands - Same as above except it takes vectors of types
315  /// and argument flags.
316  void AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
317                           SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
318                           CCAssignFn Fn);
319
320  /// The function will invoke AnalyzeCallOperands.
321  void AnalyzeArguments(const SmallVectorImpl<ISD::OutputArg> &Outs,
322                        CCAssignFn Fn) {
323    AnalyzeCallOperands(Outs, Fn);
324  }
325
326  /// AnalyzeCallResult - Analyze the return values of a call,
327  /// incorporating info about the passed values into this state.
328  void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
329                         CCAssignFn Fn);
330
331  /// A shadow allocated register is a register that was allocated
332  /// but wasn't added to the location list (Locs).
333  /// \returns true if the register was allocated as shadow or false otherwise.
334  bool IsShadowAllocatedReg(unsigned Reg) const;
335
336  /// AnalyzeCallResult - Same as above except it's specialized for calls which
337  /// produce a single value.
338  void AnalyzeCallResult(MVT VT, CCAssignFn Fn);
339
340  /// getFirstUnallocated - Return the index of the first unallocated register
341  /// in the set, or Regs.size() if they are all allocated.
342  unsigned getFirstUnallocated(ArrayRef<MCPhysReg> Regs) const {
343    for (unsigned i = 0; i < Regs.size(); ++i)
344      if (!isAllocated(Regs[i]))
345        return i;
346    return Regs.size();
347  }
348
349  /// AllocateReg - Attempt to allocate one register.  If it is not available,
350  /// return zero.  Otherwise, return the register, marking it and any aliases
351  /// as allocated.
352  unsigned AllocateReg(unsigned Reg) {
353    if (isAllocated(Reg)) return 0;
354    MarkAllocated(Reg);
355    return Reg;
356  }
357
358  /// Version of AllocateReg with extra register to be shadowed.
359  unsigned AllocateReg(unsigned Reg, unsigned ShadowReg) {
360    if (isAllocated(Reg)) return 0;
361    MarkAllocated(Reg);
362    MarkAllocated(ShadowReg);
363    return Reg;
364  }
365
366  /// AllocateReg - Attempt to allocate one of the specified registers.  If none
367  /// are available, return zero.  Otherwise, return the first one available,
368  /// marking it and any aliases as allocated.
369  unsigned AllocateReg(ArrayRef<MCPhysReg> Regs) {
370    unsigned FirstUnalloc = getFirstUnallocated(Regs);
371    if (FirstUnalloc == Regs.size())
372      return 0;    // Didn't find the reg.
373
374    // Mark the register and any aliases as allocated.
375    unsigned Reg = Regs[FirstUnalloc];
376    MarkAllocated(Reg);
377    return Reg;
378  }
379
380  /// AllocateRegBlock - Attempt to allocate a block of RegsRequired consecutive
381  /// registers. If this is not possible, return zero. Otherwise, return the first
382  /// register of the block that were allocated, marking the entire block as allocated.
383  unsigned AllocateRegBlock(ArrayRef<MCPhysReg> Regs, unsigned RegsRequired) {
384    if (RegsRequired > Regs.size())
385      return 0;
386
387    for (unsigned StartIdx = 0; StartIdx <= Regs.size() - RegsRequired;
388         ++StartIdx) {
389      bool BlockAvailable = true;
390      // Check for already-allocated regs in this block
391      for (unsigned BlockIdx = 0; BlockIdx < RegsRequired; ++BlockIdx) {
392        if (isAllocated(Regs[StartIdx + BlockIdx])) {
393          BlockAvailable = false;
394          break;
395        }
396      }
397      if (BlockAvailable) {
398        // Mark the entire block as allocated
399        for (unsigned BlockIdx = 0; BlockIdx < RegsRequired; ++BlockIdx) {
400          MarkAllocated(Regs[StartIdx + BlockIdx]);
401        }
402        return Regs[StartIdx];
403      }
404    }
405    // No block was available
406    return 0;
407  }
408
409  /// Version of AllocateReg with list of registers to be shadowed.
410  unsigned AllocateReg(ArrayRef<MCPhysReg> Regs, const MCPhysReg *ShadowRegs) {
411    unsigned FirstUnalloc = getFirstUnallocated(Regs);
412    if (FirstUnalloc == Regs.size())
413      return 0;    // Didn't find the reg.
414
415    // Mark the register and any aliases as allocated.
416    unsigned Reg = Regs[FirstUnalloc], ShadowReg = ShadowRegs[FirstUnalloc];
417    MarkAllocated(Reg);
418    MarkAllocated(ShadowReg);
419    return Reg;
420  }
421
422  /// AllocateStack - Allocate a chunk of stack space with the specified size
423  /// and alignment.
424  unsigned AllocateStack(unsigned Size, unsigned Align) {
425    assert(Align && ((Align - 1) & Align) == 0); // Align is power of 2.
426    StackOffset = alignTo(StackOffset, Align);
427    unsigned Result = StackOffset;
428    StackOffset += Size;
429    MaxStackArgAlign = std::max(Align, MaxStackArgAlign);
430    ensureMaxAlignment(Align);
431    return Result;
432  }
433
434  void ensureMaxAlignment(unsigned Align) {
435    if (!AnalyzingMustTailForwardedRegs)
436      MF.getFrameInfo().ensureMaxAlignment(Align);
437  }
438
439  /// Version of AllocateStack with extra register to be shadowed.
440  unsigned AllocateStack(unsigned Size, unsigned Align, unsigned ShadowReg) {
441    MarkAllocated(ShadowReg);
442    return AllocateStack(Size, Align);
443  }
444
445  /// Version of AllocateStack with list of extra registers to be shadowed.
446  /// Note that, unlike AllocateReg, this shadows ALL of the shadow registers.
447  unsigned AllocateStack(unsigned Size, unsigned Align,
448                         ArrayRef<MCPhysReg> ShadowRegs) {
449    for (unsigned i = 0; i < ShadowRegs.size(); ++i)
450      MarkAllocated(ShadowRegs[i]);
451    return AllocateStack(Size, Align);
452  }
453
454  // HandleByVal - Allocate a stack slot large enough to pass an argument by
455  // value. The size and alignment information of the argument is encoded in its
456  // parameter attribute.
457  void HandleByVal(unsigned ValNo, MVT ValVT,
458                   MVT LocVT, CCValAssign::LocInfo LocInfo,
459                   int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
460
461  // Returns count of byval arguments that are to be stored (even partly)
462  // in registers.
463  unsigned getInRegsParamsCount() const { return ByValRegs.size(); }
464
465  // Returns count of byval in-regs arguments proceed.
466  unsigned getInRegsParamsProcessed() const { return InRegsParamsProcessed; }
467
468  // Get information about N-th byval parameter that is stored in registers.
469  // Here "ByValParamIndex" is N.
470  void getInRegsParamInfo(unsigned InRegsParamRecordIndex,
471                          unsigned& BeginReg, unsigned& EndReg) const {
472    assert(InRegsParamRecordIndex < ByValRegs.size() &&
473           "Wrong ByVal parameter index");
474
475    const ByValInfo& info = ByValRegs[InRegsParamRecordIndex];
476    BeginReg = info.Begin;
477    EndReg = info.End;
478  }
479
480  // Add information about parameter that is kept in registers.
481  void addInRegsParamInfo(unsigned RegBegin, unsigned RegEnd) {
482    ByValRegs.push_back(ByValInfo(RegBegin, RegEnd));
483  }
484
485  // Goes either to next byval parameter (excluding "waste" record), or
486  // to the end of collection.
487  // Returns false, if end is reached.
488  bool nextInRegsParam() {
489    unsigned e = ByValRegs.size();
490    if (InRegsParamsProcessed < e)
491      ++InRegsParamsProcessed;
492    return InRegsParamsProcessed < e;
493  }
494
495  // Clear byval registers tracking info.
496  void clearByValRegsInfo() {
497    InRegsParamsProcessed = 0;
498    ByValRegs.clear();
499  }
500
501  // Rewind byval registers tracking info.
502  void rewindByValRegsInfo() {
503    InRegsParamsProcessed = 0;
504  }
505
506  // Get list of pending assignments
507  SmallVectorImpl<CCValAssign> &getPendingLocs() {
508    return PendingLocs;
509  }
510
511  /// Compute the remaining unused register parameters that would be used for
512  /// the given value type. This is useful when varargs are passed in the
513  /// registers that normal prototyped parameters would be passed in, or for
514  /// implementing perfect forwarding.
515  void getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs, MVT VT,
516                                   CCAssignFn Fn);
517
518  /// Compute the set of registers that need to be preserved and forwarded to
519  /// any musttail calls.
520  void analyzeMustTailForwardedRegisters(
521      SmallVectorImpl<ForwardedRegister> &Forwards, ArrayRef<MVT> RegParmTypes,
522      CCAssignFn Fn);
523
524  /// Returns true if the results of the two calling conventions are compatible.
525  /// This is usually part of the check for tailcall eligibility.
526  static bool resultsCompatible(CallingConv::ID CalleeCC,
527                                CallingConv::ID CallerCC, MachineFunction &MF,
528                                LLVMContext &C,
529                                const SmallVectorImpl<ISD::InputArg> &Ins,
530                                CCAssignFn CalleeFn, CCAssignFn CallerFn);
531
532  /// The function runs an additional analysis pass over function arguments.
533  /// It will mark each argument with the attribute flag SecArgPass.
534  /// After running, it will sort the locs list.
535  template <class T>
536  void AnalyzeArgumentsSecondPass(const SmallVectorImpl<T> &Args,
537                                  CCAssignFn Fn) {
538    unsigned NumFirstPassLocs = Locs.size();
539
540    /// Creates similar argument list to \p Args in which each argument is
541    /// marked using SecArgPass flag.
542    SmallVector<T, 16> SecPassArg;
543    // SmallVector<ISD::InputArg, 16> SecPassArg;
544    for (auto Arg : Args) {
545      Arg.Flags.setSecArgPass();
546      SecPassArg.push_back(Arg);
547    }
548
549    // Run the second argument pass
550    AnalyzeArguments(SecPassArg, Fn);
551
552    // Sort the locations of the arguments according to their original position.
553    SmallVector<CCValAssign, 16> TmpArgLocs;
554    std::swap(TmpArgLocs, Locs);
555    auto B = TmpArgLocs.begin(), E = TmpArgLocs.end();
556    std::merge(B, B + NumFirstPassLocs, B + NumFirstPassLocs, E,
557               std::back_inserter(Locs),
558               [](const CCValAssign &A, const CCValAssign &B) -> bool {
559                 return A.getValNo() < B.getValNo();
560               });
561  }
562
563private:
564  /// MarkAllocated - Mark a register and all of its aliases as allocated.
565  void MarkAllocated(unsigned Reg);
566};
567
568} // end namespace llvm
569
570#endif // LLVM_CODEGEN_CALLINGCONVLOWER_H
571