1//===-- llvm/CodeGen/GlobalISel/MachineIRBuilder.h - MIBuilder --*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9/// \file 10/// This file declares the MachineIRBuilder class. 11/// This is a helper class to build MachineInstr. 12//===----------------------------------------------------------------------===// 13 14#ifndef LLVM_CODEGEN_GLOBALISEL_MACHINEIRBUILDER_H 15#define LLVM_CODEGEN_GLOBALISEL_MACHINEIRBUILDER_H 16 17#include "llvm/CodeGen/GlobalISel/Types.h" 18 19#include "llvm/CodeGen/LowLevelType.h" 20#include "llvm/CodeGen/MachineBasicBlock.h" 21#include "llvm/CodeGen/MachineInstrBuilder.h" 22#include "llvm/CodeGen/MachineRegisterInfo.h" 23#include "llvm/IR/Constants.h" 24#include "llvm/IR/DebugLoc.h" 25 26#include <queue> 27 28namespace llvm { 29 30// Forward declarations. 31class MachineFunction; 32class MachineInstr; 33class TargetInstrInfo; 34 35/// Helper class to build MachineInstr. 36/// It keeps internally the insertion point and debug location for all 37/// the new instructions we want to create. 38/// This information can be modify via the related setters. 39class MachineIRBuilder { 40 /// MachineFunction under construction. 41 MachineFunction *MF; 42 /// Information used to access the description of the opcodes. 43 const TargetInstrInfo *TII; 44 /// Information used to verify types are consistent and to create virtual registers. 45 MachineRegisterInfo *MRI; 46 /// Debug location to be set to any instruction we create. 47 DebugLoc DL; 48 49 /// \name Fields describing the insertion point. 50 /// @{ 51 MachineBasicBlock *MBB; 52 MachineBasicBlock::iterator II; 53 /// @} 54 55 std::function<void(MachineInstr *)> InsertedInstr; 56 57 const TargetInstrInfo &getTII() { 58 assert(TII && "TargetInstrInfo is not set"); 59 return *TII; 60 } 61 62 void validateTruncExt(unsigned Dst, unsigned Src, bool IsExtend); 63 MachineInstrBuilder buildBinaryOp(unsigned Opcode, unsigned Res, unsigned Op0, unsigned Op1); 64 65 unsigned getDestFromArg(unsigned Reg) { return Reg; } 66 unsigned getDestFromArg(LLT Ty) { 67 return getMF().getRegInfo().createGenericVirtualRegister(Ty); 68 } 69 unsigned getDestFromArg(const TargetRegisterClass *RC) { 70 return getMF().getRegInfo().createVirtualRegister(RC); 71 } 72 73 void addUseFromArg(MachineInstrBuilder &MIB, unsigned Reg) { 74 MIB.addUse(Reg); 75 } 76 77 void addUseFromArg(MachineInstrBuilder &MIB, const MachineInstrBuilder &UseMIB) { 78 MIB.addUse(UseMIB->getOperand(0).getReg()); 79 } 80 81 void addUsesFromArgs(MachineInstrBuilder &MIB) { } 82 template<typename UseArgTy, typename ... UseArgsTy> 83 void addUsesFromArgs(MachineInstrBuilder &MIB, UseArgTy &&Arg1, UseArgsTy &&... Args) { 84 addUseFromArg(MIB, Arg1); 85 addUsesFromArgs(MIB, std::forward<UseArgsTy>(Args)...); 86 } 87 unsigned getRegFromArg(unsigned Reg) { return Reg; } 88 unsigned getRegFromArg(const MachineInstrBuilder &MIB) { 89 return MIB->getOperand(0).getReg(); 90 } 91 92public: 93 /// Some constructors for easy use. 94 MachineIRBuilder() = default; 95 MachineIRBuilder(MachineFunction &MF) { setMF(MF); } 96 MachineIRBuilder(MachineInstr &MI) : MachineIRBuilder(*MI.getMF()) { 97 setInstr(MI); 98 } 99 100 /// Getter for the function we currently build. 101 MachineFunction &getMF() { 102 assert(MF && "MachineFunction is not set"); 103 return *MF; 104 } 105 106 /// Getter for the basic block we currently build. 107 MachineBasicBlock &getMBB() { 108 assert(MBB && "MachineBasicBlock is not set"); 109 return *MBB; 110 } 111 112 /// Current insertion point for new instructions. 113 MachineBasicBlock::iterator getInsertPt() { 114 return II; 115 } 116 117 /// Set the insertion point before the specified position. 118 /// \pre MBB must be in getMF(). 119 /// \pre II must be a valid iterator in MBB. 120 void setInsertPt(MachineBasicBlock &MBB, MachineBasicBlock::iterator II); 121 /// @} 122 123 /// \name Setters for the insertion point. 124 /// @{ 125 /// Set the MachineFunction where to build instructions. 126 void setMF(MachineFunction &); 127 128 /// Set the insertion point to the end of \p MBB. 129 /// \pre \p MBB must be contained by getMF(). 130 void setMBB(MachineBasicBlock &MBB); 131 132 /// Set the insertion point to before MI. 133 /// \pre MI must be in getMF(). 134 void setInstr(MachineInstr &MI); 135 /// @} 136 137 /// \name Control where instructions we create are recorded (typically for 138 /// visiting again later during legalization). 139 /// @{ 140 void recordInsertions(std::function<void(MachineInstr *)> InsertedInstr); 141 void stopRecordingInsertions(); 142 /// @} 143 144 /// Set the debug location to \p DL for all the next build instructions. 145 void setDebugLoc(const DebugLoc &DL) { this->DL = DL; } 146 147 /// Get the current instruction's debug location. 148 DebugLoc getDebugLoc() { return DL; } 149 150 /// Build and insert <empty> = \p Opcode <empty>. 151 /// The insertion point is the one set by the last call of either 152 /// setBasicBlock or setMI. 153 /// 154 /// \pre setBasicBlock or setMI must have been called. 155 /// 156 /// \return a MachineInstrBuilder for the newly created instruction. 157 MachineInstrBuilder buildInstr(unsigned Opcode); 158 159 /// DAG like Generic method for building arbitrary instructions as above. 160 /// \Opc opcode for the instruction. 161 /// \Ty Either LLT/TargetRegisterClass/unsigned types for Dst 162 /// \Args Variadic list of uses of types(unsigned/MachineInstrBuilder) 163 /// Uses of type MachineInstrBuilder will perform 164 /// getOperand(0).getReg() to convert to register. 165 template <typename DstTy, typename... UseArgsTy> 166 MachineInstrBuilder buildInstr(unsigned Opc, DstTy &&Ty, 167 UseArgsTy &&... Args) { 168 auto MIB = buildInstr(Opc).addDef(getDestFromArg(Ty)); 169 addUsesFromArgs(MIB, std::forward<UseArgsTy>(Args)...); 170 return MIB; 171 } 172 173 /// Build but don't insert <empty> = \p Opcode <empty>. 174 /// 175 /// \pre setMF, setBasicBlock or setMI must have been called. 176 /// 177 /// \return a MachineInstrBuilder for the newly created instruction. 178 MachineInstrBuilder buildInstrNoInsert(unsigned Opcode); 179 180 /// Insert an existing instruction at the insertion point. 181 MachineInstrBuilder insertInstr(MachineInstrBuilder MIB); 182 183 /// Build and insert a DBG_VALUE instruction expressing the fact that the 184 /// associated \p Variable lives in \p Reg (suitably modified by \p Expr). 185 MachineInstrBuilder buildDirectDbgValue(unsigned Reg, const MDNode *Variable, 186 const MDNode *Expr); 187 188 /// Build and insert a DBG_VALUE instruction expressing the fact that the 189 /// associated \p Variable lives in memory at \p Reg (suitably modified by \p 190 /// Expr). 191 MachineInstrBuilder buildIndirectDbgValue(unsigned Reg, 192 const MDNode *Variable, 193 const MDNode *Expr); 194 195 /// Build and insert a DBG_VALUE instruction expressing the fact that the 196 /// associated \p Variable lives in the stack slot specified by \p FI 197 /// (suitably modified by \p Expr). 198 MachineInstrBuilder buildFIDbgValue(int FI, const MDNode *Variable, 199 const MDNode *Expr); 200 201 /// Build and insert a DBG_VALUE instructions specifying that \p Variable is 202 /// given by \p C (suitably modified by \p Expr). 203 MachineInstrBuilder buildConstDbgValue(const Constant &C, 204 const MDNode *Variable, 205 const MDNode *Expr); 206 207 /// Build and insert \p Res<def> = G_FRAME_INDEX \p Idx 208 /// 209 /// G_FRAME_INDEX materializes the address of an alloca value or other 210 /// stack-based object. 211 /// 212 /// \pre setBasicBlock or setMI must have been called. 213 /// \pre \p Res must be a generic virtual register with pointer type. 214 /// 215 /// \return a MachineInstrBuilder for the newly created instruction. 216 MachineInstrBuilder buildFrameIndex(unsigned Res, int Idx); 217 218 /// Build and insert \p Res<def> = G_GLOBAL_VALUE \p GV 219 /// 220 /// G_GLOBAL_VALUE materializes the address of the specified global 221 /// into \p Res. 222 /// 223 /// \pre setBasicBlock or setMI must have been called. 224 /// \pre \p Res must be a generic virtual register with pointer type 225 /// in the same address space as \p GV. 226 /// 227 /// \return a MachineInstrBuilder for the newly created instruction. 228 MachineInstrBuilder buildGlobalValue(unsigned Res, const GlobalValue *GV); 229 230 /// Build and insert \p Res<def> = G_ADD \p Op0, \p Op1 231 /// 232 /// G_ADD sets \p Res to the sum of integer parameters \p Op0 and \p Op1, 233 /// truncated to their width. 234 /// 235 /// \pre setBasicBlock or setMI must have been called. 236 /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers 237 /// with the same (scalar or vector) type). 238 /// 239 /// \return a MachineInstrBuilder for the newly created instruction. 240 MachineInstrBuilder buildAdd(unsigned Res, unsigned Op0, 241 unsigned Op1); 242 template <typename DstTy, typename... UseArgsTy> 243 MachineInstrBuilder buildAdd(DstTy &&Ty, UseArgsTy &&... UseArgs) { 244 unsigned Res = getDestFromArg(Ty); 245 return buildAdd(Res, (getRegFromArg(UseArgs))...); 246 } 247 248 /// Build and insert \p Res<def> = G_SUB \p Op0, \p Op1 249 /// 250 /// G_SUB sets \p Res to the sum of integer parameters \p Op0 and \p Op1, 251 /// truncated to their width. 252 /// 253 /// \pre setBasicBlock or setMI must have been called. 254 /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers 255 /// with the same (scalar or vector) type). 256 /// 257 /// \return a MachineInstrBuilder for the newly created instruction. 258 MachineInstrBuilder buildSub(unsigned Res, unsigned Op0, 259 unsigned Op1); 260 261 /// Build and insert \p Res<def> = G_MUL \p Op0, \p Op1 262 /// 263 /// G_MUL sets \p Res to the sum of integer parameters \p Op0 and \p Op1, 264 /// truncated to their width. 265 /// 266 /// \pre setBasicBlock or setMI must have been called. 267 /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers 268 /// with the same (scalar or vector) type). 269 /// 270 /// \return a MachineInstrBuilder for the newly created instruction. 271 MachineInstrBuilder buildMul(unsigned Res, unsigned Op0, 272 unsigned Op1); 273 274 /// Build and insert \p Res<def> = G_GEP \p Op0, \p Op1 275 /// 276 /// G_GEP adds \p Op1 bytes to the pointer specified by \p Op0, 277 /// storing the resulting pointer in \p Res. 278 /// 279 /// \pre setBasicBlock or setMI must have been called. 280 /// \pre \p Res and \p Op0 must be generic virtual registers with pointer 281 /// type. 282 /// \pre \p Op1 must be a generic virtual register with scalar type. 283 /// 284 /// \return a MachineInstrBuilder for the newly created instruction. 285 MachineInstrBuilder buildGEP(unsigned Res, unsigned Op0, 286 unsigned Op1); 287 288 /// Materialize and insert \p Res<def> = G_GEP \p Op0, (G_CONSTANT \p Value) 289 /// 290 /// G_GEP adds \p Value bytes to the pointer specified by \p Op0, 291 /// storing the resulting pointer in \p Res. If \p Value is zero then no 292 /// G_GEP or G_CONSTANT will be created and \pre Op0 will be assigned to 293 /// \p Res. 294 /// 295 /// \pre setBasicBlock or setMI must have been called. 296 /// \pre \p Op0 must be a generic virtual register with pointer type. 297 /// \pre \p ValueTy must be a scalar type. 298 /// \pre \p Res must be 0. This is to detect confusion between 299 /// materializeGEP() and buildGEP(). 300 /// \post \p Res will either be a new generic virtual register of the same 301 /// type as \p Op0 or \p Op0 itself. 302 /// 303 /// \return a MachineInstrBuilder for the newly created instruction. 304 Optional<MachineInstrBuilder> materializeGEP(unsigned &Res, unsigned Op0, 305 const LLT &ValueTy, 306 uint64_t Value); 307 308 /// Build and insert \p Res<def> = G_PTR_MASK \p Op0, \p NumBits 309 /// 310 /// G_PTR_MASK clears the low bits of a pointer operand without destroying its 311 /// pointer properties. This has the effect of rounding the address *down* to 312 /// a specified alignment in bits. 313 /// 314 /// \pre setBasicBlock or setMI must have been called. 315 /// \pre \p Res and \p Op0 must be generic virtual registers with pointer 316 /// type. 317 /// \pre \p NumBits must be an integer representing the number of low bits to 318 /// be cleared in \p Op0. 319 /// 320 /// \return a MachineInstrBuilder for the newly created instruction. 321 MachineInstrBuilder buildPtrMask(unsigned Res, unsigned Op0, 322 uint32_t NumBits); 323 324 /// Build and insert \p Res<def>, \p CarryOut<def> = G_UADDE \p Op0, 325 /// \p Op1, \p CarryIn 326 /// 327 /// G_UADDE sets \p Res to \p Op0 + \p Op1 + \p CarryIn (truncated to the bit 328 /// width) and sets \p CarryOut to 1 if the result overflowed in unsigned 329 /// arithmetic. 330 /// 331 /// \pre setBasicBlock or setMI must have been called. 332 /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers 333 /// with the same scalar type. 334 /// \pre \p CarryOut and \p CarryIn must be generic virtual 335 /// registers with the same scalar type (typically s1) 336 /// 337 /// \return The newly created instruction. 338 MachineInstrBuilder buildUAdde(unsigned Res, unsigned CarryOut, unsigned Op0, 339 unsigned Op1, unsigned CarryIn); 340 341 /// Build and insert \p Res<def> = G_AND \p Op0, \p Op1 342 /// 343 /// G_AND sets \p Res to the bitwise and of integer parameters \p Op0 and \p 344 /// Op1. 345 /// 346 /// \pre setBasicBlock or setMI must have been called. 347 /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers 348 /// with the same (scalar or vector) type). 349 /// 350 /// \return a MachineInstrBuilder for the newly created instruction. 351 template <typename DstTy, typename... UseArgsTy> 352 MachineInstrBuilder buildAnd(DstTy &&Dst, UseArgsTy &&... UseArgs) { 353 return buildAnd(getDestFromArg(Dst), getRegFromArg(UseArgs)...); 354 } 355 MachineInstrBuilder buildAnd(unsigned Res, unsigned Op0, 356 unsigned Op1); 357 358 /// Build and insert \p Res<def> = G_OR \p Op0, \p Op1 359 /// 360 /// G_OR sets \p Res to the bitwise or of integer parameters \p Op0 and \p 361 /// Op1. 362 /// 363 /// \pre setBasicBlock or setMI must have been called. 364 /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers 365 /// with the same (scalar or vector) type). 366 /// 367 /// \return a MachineInstrBuilder for the newly created instruction. 368 MachineInstrBuilder buildOr(unsigned Res, unsigned Op0, unsigned Op1); 369 370 /// Build and insert \p Res<def> = G_ANYEXT \p Op0 371 /// 372 /// G_ANYEXT produces a register of the specified width, with bits 0 to 373 /// sizeof(\p Ty) * 8 set to \p Op. The remaining bits are unspecified 374 /// (i.e. this is neither zero nor sign-extension). For a vector register, 375 /// each element is extended individually. 376 /// 377 /// \pre setBasicBlock or setMI must have been called. 378 /// \pre \p Res must be a generic virtual register with scalar or vector type. 379 /// \pre \p Op must be a generic virtual register with scalar or vector type. 380 /// \pre \p Op must be smaller than \p Res 381 /// 382 /// \return The newly created instruction. 383 384 MachineInstrBuilder buildAnyExt(unsigned Res, unsigned Op); 385 template <typename DstType, typename ArgType> 386 MachineInstrBuilder buildAnyExt(DstType &&Res, ArgType &&Arg) { 387 return buildAnyExt(getDestFromArg(Res), getRegFromArg(Arg)); 388 } 389 390 /// Build and insert \p Res<def> = G_SEXT \p Op 391 /// 392 /// G_SEXT produces a register of the specified width, with bits 0 to 393 /// sizeof(\p Ty) * 8 set to \p Op. The remaining bits are duplicated from the 394 /// high bit of \p Op (i.e. 2s-complement sign extended). 395 /// 396 /// \pre setBasicBlock or setMI must have been called. 397 /// \pre \p Res must be a generic virtual register with scalar or vector type. 398 /// \pre \p Op must be a generic virtual register with scalar or vector type. 399 /// \pre \p Op must be smaller than \p Res 400 /// 401 /// \return The newly created instruction. 402 MachineInstrBuilder buildSExt(unsigned Res, unsigned Op); 403 404 /// Build and insert \p Res<def> = G_ZEXT \p Op 405 /// 406 /// G_ZEXT produces a register of the specified width, with bits 0 to 407 /// sizeof(\p Ty) * 8 set to \p Op. The remaining bits are 0. For a vector 408 /// register, each element is extended individually. 409 /// 410 /// \pre setBasicBlock or setMI must have been called. 411 /// \pre \p Res must be a generic virtual register with scalar or vector type. 412 /// \pre \p Op must be a generic virtual register with scalar or vector type. 413 /// \pre \p Op must be smaller than \p Res 414 /// 415 /// \return The newly created instruction. 416 MachineInstrBuilder buildZExt(unsigned Res, unsigned Op); 417 418 /// Build and insert \p Res<def> = G_SEXT \p Op, \p Res = G_TRUNC \p Op, or 419 /// \p Res = COPY \p Op depending on the differing sizes of \p Res and \p Op. 420 /// /// 421 /// \pre setBasicBlock or setMI must have been called. 422 /// \pre \p Res must be a generic virtual register with scalar or vector type. 423 /// \pre \p Op must be a generic virtual register with scalar or vector type. 424 /// 425 /// \return The newly created instruction. 426 MachineInstrBuilder buildSExtOrTrunc(unsigned Res, unsigned Op); 427 428 /// Build and insert \p Res<def> = G_ZEXT \p Op, \p Res = G_TRUNC \p Op, or 429 /// \p Res = COPY \p Op depending on the differing sizes of \p Res and \p Op. 430 /// /// 431 /// \pre setBasicBlock or setMI must have been called. 432 /// \pre \p Res must be a generic virtual register with scalar or vector type. 433 /// \pre \p Op must be a generic virtual register with scalar or vector type. 434 /// 435 /// \return The newly created instruction. 436 MachineInstrBuilder buildZExtOrTrunc(unsigned Res, unsigned Op); 437 438 // Build and insert \p Res<def> = G_ANYEXT \p Op, \p Res = G_TRUNC \p Op, or 439 /// \p Res = COPY \p Op depending on the differing sizes of \p Res and \p Op. 440 /// /// 441 /// \pre setBasicBlock or setMI must have been called. 442 /// \pre \p Res must be a generic virtual register with scalar or vector type. 443 /// \pre \p Op must be a generic virtual register with scalar or vector type. 444 /// 445 /// \return The newly created instruction. 446 template <typename DstTy, typename UseArgTy> 447 MachineInstrBuilder buildAnyExtOrTrunc(DstTy &&Dst, UseArgTy &&Use) { 448 return buildAnyExtOrTrunc(getDestFromArg(Dst), getRegFromArg(Use)); 449 } 450 MachineInstrBuilder buildAnyExtOrTrunc(unsigned Res, unsigned Op); 451 452 /// Build and insert \p Res<def> = \p ExtOpc, \p Res = G_TRUNC \p 453 /// Op, or \p Res = COPY \p Op depending on the differing sizes of \p Res and 454 /// \p Op. 455 /// /// 456 /// \pre setBasicBlock or setMI must have been called. 457 /// \pre \p Res must be a generic virtual register with scalar or vector type. 458 /// \pre \p Op must be a generic virtual register with scalar or vector type. 459 /// 460 /// \return The newly created instruction. 461 MachineInstrBuilder buildExtOrTrunc(unsigned ExtOpc, unsigned Res, 462 unsigned Op); 463 464 /// Build and insert an appropriate cast between two registers of equal size. 465 MachineInstrBuilder buildCast(unsigned Dst, unsigned Src); 466 467 /// Build and insert G_BR \p Dest 468 /// 469 /// G_BR is an unconditional branch to \p Dest. 470 /// 471 /// \pre setBasicBlock or setMI must have been called. 472 /// 473 /// \return a MachineInstrBuilder for the newly created instruction. 474 MachineInstrBuilder buildBr(MachineBasicBlock &BB); 475 476 /// Build and insert G_BRCOND \p Tst, \p Dest 477 /// 478 /// G_BRCOND is a conditional branch to \p Dest. 479 /// 480 /// \pre setBasicBlock or setMI must have been called. 481 /// \pre \p Tst must be a generic virtual register with scalar 482 /// type. At the beginning of legalization, this will be a single 483 /// bit (s1). Targets with interesting flags registers may change 484 /// this. For a wider type, whether the branch is taken must only 485 /// depend on bit 0 (for now). 486 /// 487 /// \return The newly created instruction. 488 MachineInstrBuilder buildBrCond(unsigned Tst, MachineBasicBlock &BB); 489 490 /// Build and insert G_BRINDIRECT \p Tgt 491 /// 492 /// G_BRINDIRECT is an indirect branch to \p Tgt. 493 /// 494 /// \pre setBasicBlock or setMI must have been called. 495 /// \pre \p Tgt must be a generic virtual register with pointer type. 496 /// 497 /// \return a MachineInstrBuilder for the newly created instruction. 498 MachineInstrBuilder buildBrIndirect(unsigned Tgt); 499 500 /// Build and insert \p Res = G_CONSTANT \p Val 501 /// 502 /// G_CONSTANT is an integer constant with the specified size and value. \p 503 /// Val will be extended or truncated to the size of \p Reg. 504 /// 505 /// \pre setBasicBlock or setMI must have been called. 506 /// \pre \p Res must be a generic virtual register with scalar or pointer 507 /// type. 508 /// 509 /// \return The newly created instruction. 510 MachineInstrBuilder buildConstant(unsigned Res, const ConstantInt &Val); 511 512 /// Build and insert \p Res = G_CONSTANT \p Val 513 /// 514 /// G_CONSTANT is an integer constant with the specified size and value. 515 /// 516 /// \pre setBasicBlock or setMI must have been called. 517 /// \pre \p Res must be a generic virtual register with scalar type. 518 /// 519 /// \return The newly created instruction. 520 MachineInstrBuilder buildConstant(unsigned Res, int64_t Val); 521 522 template <typename DstType> 523 MachineInstrBuilder buildConstant(DstType &&Res, int64_t Val) { 524 return buildConstant(getDestFromArg(Res), Val); 525 } 526 /// Build and insert \p Res = G_FCONSTANT \p Val 527 /// 528 /// G_FCONSTANT is a floating-point constant with the specified size and 529 /// value. 530 /// 531 /// \pre setBasicBlock or setMI must have been called. 532 /// \pre \p Res must be a generic virtual register with scalar type. 533 /// 534 /// \return The newly created instruction. 535 MachineInstrBuilder buildFConstant(unsigned Res, const ConstantFP &Val); 536 537 /// Build and insert \p Res<def> = COPY Op 538 /// 539 /// Register-to-register COPY sets \p Res to \p Op. 540 /// 541 /// \pre setBasicBlock or setMI must have been called. 542 /// 543 /// \return a MachineInstrBuilder for the newly created instruction. 544 MachineInstrBuilder buildCopy(unsigned Res, unsigned Op); 545 template <typename DstType, typename SrcType> 546 MachineInstrBuilder buildCopy(DstType &&Res, SrcType &&Src) { 547 return buildCopy(getDestFromArg(Res), getRegFromArg(Src)); 548 } 549 550 /// Build and insert `Res<def> = G_LOAD Addr, MMO`. 551 /// 552 /// Loads the value stored at \p Addr. Puts the result in \p Res. 553 /// 554 /// \pre setBasicBlock or setMI must have been called. 555 /// \pre \p Res must be a generic virtual register. 556 /// \pre \p Addr must be a generic virtual register with pointer type. 557 /// 558 /// \return a MachineInstrBuilder for the newly created instruction. 559 MachineInstrBuilder buildLoad(unsigned Res, unsigned Addr, 560 MachineMemOperand &MMO); 561 562 /// Build and insert `G_STORE Val, Addr, MMO`. 563 /// 564 /// Stores the value \p Val to \p Addr. 565 /// 566 /// \pre setBasicBlock or setMI must have been called. 567 /// \pre \p Val must be a generic virtual register. 568 /// \pre \p Addr must be a generic virtual register with pointer type. 569 /// 570 /// \return a MachineInstrBuilder for the newly created instruction. 571 MachineInstrBuilder buildStore(unsigned Val, unsigned Addr, 572 MachineMemOperand &MMO); 573 574 /// Build and insert `Res0<def>, ... = G_EXTRACT Src, Idx0`. 575 /// 576 /// \pre setBasicBlock or setMI must have been called. 577 /// \pre \p Res and \p Src must be generic virtual registers. 578 /// 579 /// \return a MachineInstrBuilder for the newly created instruction. 580 MachineInstrBuilder buildExtract(unsigned Res, unsigned Src, uint64_t Index); 581 582 /// Build and insert \p Res = IMPLICIT_DEF. 583 MachineInstrBuilder buildUndef(unsigned Dst); 584 585 /// Build and insert instructions to put \p Ops together at the specified p 586 /// Indices to form a larger register. 587 /// 588 /// If the types of the input registers are uniform and cover the entirity of 589 /// \p Res then a G_MERGE_VALUES will be produced. Otherwise an IMPLICIT_DEF 590 /// followed by a sequence of G_INSERT instructions. 591 /// 592 /// \pre setBasicBlock or setMI must have been called. 593 /// \pre The final element of the sequence must not extend past the end of the 594 /// destination register. 595 /// \pre The bits defined by each Op (derived from index and scalar size) must 596 /// not overlap. 597 /// \pre \p Indices must be in ascending order of bit position. 598 void buildSequence(unsigned Res, ArrayRef<unsigned> Ops, 599 ArrayRef<uint64_t> Indices); 600 601 /// Build and insert \p Res<def> = G_MERGE_VALUES \p Op0, ... 602 /// 603 /// G_MERGE_VALUES combines the input elements contiguously into a larger 604 /// register. 605 /// 606 /// \pre setBasicBlock or setMI must have been called. 607 /// \pre The entire register \p Res (and no more) must be covered by the input 608 /// registers. 609 /// \pre The type of all \p Ops registers must be identical. 610 /// 611 /// \return a MachineInstrBuilder for the newly created instruction. 612 MachineInstrBuilder buildMerge(unsigned Res, ArrayRef<unsigned> Ops); 613 614 /// Build and insert \p Res0<def>, ... = G_UNMERGE_VALUES \p Op 615 /// 616 /// G_UNMERGE_VALUES splits contiguous bits of the input into multiple 617 /// 618 /// \pre setBasicBlock or setMI must have been called. 619 /// \pre The entire register \p Res (and no more) must be covered by the input 620 /// registers. 621 /// \pre The type of all \p Res registers must be identical. 622 /// 623 /// \return a MachineInstrBuilder for the newly created instruction. 624 MachineInstrBuilder buildUnmerge(ArrayRef<unsigned> Res, unsigned Op); 625 626 MachineInstrBuilder buildInsert(unsigned Res, unsigned Src, 627 unsigned Op, unsigned Index); 628 629 /// Build and insert either a G_INTRINSIC (if \p HasSideEffects is false) or 630 /// G_INTRINSIC_W_SIDE_EFFECTS instruction. Its first operand will be the 631 /// result register definition unless \p Reg is NoReg (== 0). The second 632 /// operand will be the intrinsic's ID. 633 /// 634 /// Callers are expected to add the required definitions and uses afterwards. 635 /// 636 /// \pre setBasicBlock or setMI must have been called. 637 /// 638 /// \return a MachineInstrBuilder for the newly created instruction. 639 MachineInstrBuilder buildIntrinsic(Intrinsic::ID ID, unsigned Res, 640 bool HasSideEffects); 641 642 /// Build and insert \p Res<def> = G_FPTRUNC \p Op 643 /// 644 /// G_FPTRUNC converts a floating-point value into one with a smaller type. 645 /// 646 /// \pre setBasicBlock or setMI must have been called. 647 /// \pre \p Res must be a generic virtual register with scalar or vector type. 648 /// \pre \p Op must be a generic virtual register with scalar or vector type. 649 /// \pre \p Res must be smaller than \p Op 650 /// 651 /// \return The newly created instruction. 652 MachineInstrBuilder buildFPTrunc(unsigned Res, unsigned Op); 653 654 /// Build and insert \p Res<def> = G_TRUNC \p Op 655 /// 656 /// G_TRUNC extracts the low bits of a type. For a vector type each element is 657 /// truncated independently before being packed into the destination. 658 /// 659 /// \pre setBasicBlock or setMI must have been called. 660 /// \pre \p Res must be a generic virtual register with scalar or vector type. 661 /// \pre \p Op must be a generic virtual register with scalar or vector type. 662 /// \pre \p Res must be smaller than \p Op 663 /// 664 /// \return The newly created instruction. 665 MachineInstrBuilder buildTrunc(unsigned Res, unsigned Op); 666 template <typename DstType, typename SrcType> 667 MachineInstrBuilder buildTrunc(DstType &&Res, SrcType &&Src) { 668 return buildTrunc(getDestFromArg(Res), getRegFromArg(Src)); 669 } 670 671 /// Build and insert a \p Res = G_ICMP \p Pred, \p Op0, \p Op1 672 /// 673 /// \pre setBasicBlock or setMI must have been called. 674 675 /// \pre \p Res must be a generic virtual register with scalar or 676 /// vector type. Typically this starts as s1 or <N x s1>. 677 /// \pre \p Op0 and Op1 must be generic virtual registers with the 678 /// same number of elements as \p Res. If \p Res is a scalar, 679 /// \p Op0 must be either a scalar or pointer. 680 /// \pre \p Pred must be an integer predicate. 681 /// 682 /// \return a MachineInstrBuilder for the newly created instruction. 683 MachineInstrBuilder buildICmp(CmpInst::Predicate Pred, 684 unsigned Res, unsigned Op0, unsigned Op1); 685 686 /// Build and insert a \p Res = G_FCMP \p Pred\p Op0, \p Op1 687 /// 688 /// \pre setBasicBlock or setMI must have been called. 689 690 /// \pre \p Res must be a generic virtual register with scalar or 691 /// vector type. Typically this starts as s1 or <N x s1>. 692 /// \pre \p Op0 and Op1 must be generic virtual registers with the 693 /// same number of elements as \p Res (or scalar, if \p Res is 694 /// scalar). 695 /// \pre \p Pred must be a floating-point predicate. 696 /// 697 /// \return a MachineInstrBuilder for the newly created instruction. 698 MachineInstrBuilder buildFCmp(CmpInst::Predicate Pred, 699 unsigned Res, unsigned Op0, unsigned Op1); 700 701 /// Build and insert a \p Res = G_SELECT \p Tst, \p Op0, \p Op1 702 /// 703 /// \pre setBasicBlock or setMI must have been called. 704 /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers 705 /// with the same type. 706 /// \pre \p Tst must be a generic virtual register with scalar, pointer or 707 /// vector type. If vector then it must have the same number of 708 /// elements as the other parameters. 709 /// 710 /// \return a MachineInstrBuilder for the newly created instruction. 711 MachineInstrBuilder buildSelect(unsigned Res, unsigned Tst, 712 unsigned Op0, unsigned Op1); 713 714 /// Build and insert \p Res<def> = G_INSERT_VECTOR_ELT \p Val, 715 /// \p Elt, \p Idx 716 /// 717 /// \pre setBasicBlock or setMI must have been called. 718 /// \pre \p Res and \p Val must be a generic virtual register 719 // with the same vector type. 720 /// \pre \p Elt and \p Idx must be a generic virtual register 721 /// with scalar type. 722 /// 723 /// \return The newly created instruction. 724 MachineInstrBuilder buildInsertVectorElement(unsigned Res, unsigned Val, 725 unsigned Elt, unsigned Idx); 726 727 /// Build and insert \p Res<def> = G_EXTRACT_VECTOR_ELT \p Val, \p Idx 728 /// 729 /// \pre setBasicBlock or setMI must have been called. 730 /// \pre \p Res must be a generic virtual register with scalar type. 731 /// \pre \p Val must be a generic virtual register with vector type. 732 /// \pre \p Idx must be a generic virtual register with scalar type. 733 /// 734 /// \return The newly created instruction. 735 MachineInstrBuilder buildExtractVectorElement(unsigned Res, unsigned Val, 736 unsigned Idx); 737}; 738 739} // End namespace llvm. 740#endif // LLVM_CODEGEN_GLOBALISEL_MACHINEIRBUILDER_H 741