Searched refs:div (Results 1 - 25 of 47) sorted by relevance

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/sound/aoa/soundbus/i2sbus/
H A Dinterface.h90 # define I2S_SF_MCLKDIV_OTHER(div) (((div/2-1)<<I2S_SF_MCLKDIV_SHIFT)&I2S_SF_MCLKDIV_MASK)
91 static inline int i2s_sf_mclkdiv(int div, int *out) argument
95 switch(div) {
101 if (div%2) return -1;
102 d = div/2-1;
105 *out |= I2S_SF_MCLKDIV_OTHER(div);
117 # define I2S_SF_SCLKDIV_OTHER(div) (((div/2-1)<<I2S_SF_SCLKDIV_SHIFT)&I2S_SF_SCLKDIV_MASK)
118 static inline int i2s_sf_sclkdiv(int div, in argument
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/sound/soc/samsung/
H A Djive_wm8750.c42 struct s3c_i2sv2_rate_calc div; local
60 s3c_i2sv2_iis_calc_rate(&div, NULL, params_rate(params),
83 ret = snd_soc_dai_set_clkdiv(cpu_dai, S3C2412_DIV_RCLK, div.fs_div);
88 div.clk_div - 1);
H A Ds3c-i2s-v2.c466 int div_id, int div)
471 pr_debug("%s(%p, %d, %d)\n", __func__, cpu_dai, div_id, div);
475 switch (div) {
477 div = S3C2412_IISMOD_BCLK_16FS;
481 div = S3C2412_IISMOD_BCLK_32FS;
485 div = S3C2412_IISMOD_BCLK_24FS;
489 div = S3C2412_IISMOD_BCLK_48FS;
498 writel(reg | div, i2s->regs + S3C2412_IISMOD);
504 switch (div) {
506 div
465 s3c2412_i2s_set_clkdiv(struct snd_soc_dai *cpu_dai, int div_id, int div) argument
583 unsigned int div; local
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H A Dh1940_uda1380.c82 int div; local
90 div = s3c24xx_i2s_get_clockrate() / (384 * rate);
92 div++;
132 S3C24XX_PRESCALE(div, div));
H A Drx1950_uda1380.c151 int div; local
161 div = s3c24xx_i2s_get_clockrate() / (256 * rate);
163 div++;
169 div = 1;
209 S3C24XX_PRESCALE(div, div));
H A Ds3c24xx_uda134x.c135 unsigned int div; local
155 div = 1;
158 div = bi % 33;
166 div, clk, err);
200 S3C24XX_PRESCALE(div, div));
H A Ds3c24xx-i2s.c340 int div_id, int div)
349 writel(reg | div, s3c24xx_i2s.regs + S3C2410_IISMOD);
353 writel(reg | div, s3c24xx_i2s.regs + S3C2410_IISMOD);
356 writel(div, s3c24xx_i2s.regs + S3C2410_IISPSR);
339 s3c24xx_i2s_set_clkdiv(struct snd_soc_dai *cpu_dai, int div_id, int div) argument
/sound/drivers/pcsp/
H A Dpcsp.h47 #define PCSP_CALC_NS(div) ({ \
48 u64 __val = 1000000000ULL * (div); \
H A Dpcsp.c47 int div, min_div, order; local
70 div = MAX_DIV / min_div;
71 order = fls(div) - 1;
/sound/soc/pxa/
H A Dpxa-ssp.c192 * @div: serial clock rate divider
194 static void pxa_ssp_set_scr(struct ssp_device *ssp, u32 div) argument
200 sscr0 |= ((div - 2)/2) << 8; /* 2..512 */
203 sscr0 |= (div - 1) << 8; /* 1..4096 */
214 u32 div; local
217 div = ((sscr0 >> 8) & 0xff) * 2 + 2;
219 div = ((sscr0 >> 8) & 0xfff) + 1;
220 return div;
284 int div_id, int div)
292 val = (pxa_ssp_read_reg(ssp, SSACD) & ~0x7) | SSACD_ACDS(div);
283 pxa_ssp_set_dai_clkdiv(struct snd_soc_dai *cpu_dai, int div_id, int div) argument
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/sound/soc/codecs/
H A Dwm9081.c132 int div; /* *10 due to .5s */ member in struct:__anon298
422 unsigned int div; local
426 div = 1;
427 while ((Fref / div) > 13500000) {
428 div *= 2;
430 if (div > 8) {
436 fll_div->fll_clk_ref_div = div / 2;
441 Fref /= div;
444 div = 0;
447 div
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H A Dwm8900.c681 unsigned int div; local
688 div = 1;
690 div *= 2;
697 if (div > 32) {
700 div, Fref, Fout, target);
704 fll_div->fllclk_div = div >> 2;
818 int div_id, int div)
827 div | (reg & WM8900_REG_CLOCKING1_BCLK_MASK));
832 div | (reg & WM8900_REG_CLOCKING1_OPCLK_MASK));
837 div | (re
817 wm8900_set_dai_clkdiv(struct snd_soc_dai *codec_dai, int div_id, int div) argument
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H A Dwm8350.c847 static int wm8350_set_clkdiv(struct snd_soc_dai *codec_dai, int div_id, int div) argument
856 wm8350_codec_write(codec, WM8350_ADC_DIVIDER, val | div);
861 wm8350_codec_write(codec, WM8350_DAC_CLOCK_CONTROL, val | div);
866 wm8350_codec_write(codec, WM8350_CLOCK_CONTROL_1, val | div);
871 wm8350_codec_write(codec, WM8350_CLOCK_CONTROL_1, val | div);
876 wm8350_codec_write(codec, WM8350_CLOCK_CONTROL_1, val | div);
881 wm8350_codec_write(codec, WM8350_DAC_LR_RATE, val | div);
886 wm8350_codec_write(codec, WM8350_ADC_LR_RATE, val | div);
1051 int div; /* FLL_OUTDIV */ member in struct:_fll_div
1068 fll_div->div
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H A Dwm8993.c205 int div; /* *10 due to .5s */ member in struct:__anon293
289 unsigned int div; local
293 div = 1;
295 while ((Fref / div) > 13500000) {
296 div *= 2;
299 if (div > 8) {
309 Fref /= div;
312 div = 0;
315 div++;
317 if (div >
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H A Dwm8510.c312 int div_id, int div)
320 snd_soc_write(codec, WM8510_GPIO, reg | div);
324 snd_soc_write(codec, WM8510_CLOCK, reg | div);
328 snd_soc_write(codec, WM8510_ADC, reg | div);
332 snd_soc_write(codec, WM8510_DAC, reg | div);
336 snd_soc_write(codec, WM8510_CLOCK, reg | div);
311 wm8510_set_dai_clkdiv(struct snd_soc_dai *codec_dai, int div_id, int div) argument
H A Dwm8904.c1512 int div; /* *10 due to .5s */ member in struct:__anon281
1627 cur_val = ((wm8904->sysclk_rate * 10) / bclk_divs[i].div)
1636 wm8904->bclk = (wm8904->sysclk_rate * 10) / bclk_divs[best].div;
1638 bclk_divs[best].div, wm8904->bclk);
1861 unsigned int div; local
1865 div = 1;
1867 while ((Fref / div) > 13500000) {
1868 div *= 2;
1871 if (div > 8) {
1881 Fref /= div;
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H A Dwm9713.c846 int div_id, int div)
854 ac97_write(codec, AC97_HANDSET_RATE, reg | div);
858 ac97_write(codec, AC97_HANDSET_RATE, reg | div);
862 ac97_write(codec, AC97_HANDSET_RATE, reg | div);
866 ac97_write(codec, AC97_HANDSET_RATE, reg | div);
870 ac97_write(codec, AC97_CENTER_LFE_MASTER, reg | div);
874 ac97_write(codec, AC97_LINE1_LEVEL, reg | 0x60 | div);
878 ac97_write(codec, AC97_LINE1_LEVEL, reg | 0x70 | div);
845 wm9713_set_dai_clkdiv(struct snd_soc_dai *codec_dai, int div_id, int div) argument
/sound/soc/ep93xx/
H A Dep93xx-i2s.c244 unsigned word_len, div, sdiv, lrdiv; local
277 div = clk_get_rate(info->mclk) / params_rate(params);
279 if (div > (256 + 512) / 2) {
283 if (div < (128 + 256) / 2)
/sound/oss/
H A Dpas2_mixer.c81 mixer_output(int right_vol, int left_vol, int div, int bits, argument
84 int left = left_vol * div / 100;
85 int right = right_vol * div / 100;
H A Dsb_ess.c211 #define ES1688_CLOCK1 795444 /* 128 - div */
212 #define ES1688_CLOCK2 397722 /* 256 - div */
213 #define ES18XX_CLOCK1 793800 /* 128 - div */
214 #define ES18XX_CLOCK2 768000 /* 256 - div */
375 int diff = 0, div; local
382 div = 0x80 | ess_calc_div (795500, 256, speedp, &diff);
384 div = 0x80 | ess_calc_div (795500, 128, speedp, &diff);
389 &div, speedp);
392 &div, speedp);
396 div
407 int div, div2; local
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/sound/soc/sh/
H A Dssi.c225 static int ssi_set_clkdiv(struct snd_soc_dai *dai, int did, int div) argument
233 switch (div) {
241 pr_debug("ssi: invalid sck divider %d\n", div);
/sound/soc/imx/
H A Dimx-ssi.c193 int div_id, int div)
204 stccr |= div;
208 stccr |= div;
212 stccr |= SSI_STCCR_PM(div);
216 stccr |= div;
220 stccr |= div;
224 stccr |= SSI_STCCR_PM(div);
192 imx_ssi_set_dai_clkdiv(struct snd_soc_dai *cpu_dai, int div_id, int div) argument
/sound/pci/
H A Dsonicvibes.c538 unsigned int div; local
541 div = 48000 / rate;
542 if (div > 8)
543 div = 8;
544 if ((48000 / div) == rate) { /* use the alternate clock */
551 snd_sonicvibes_out1(sonic, SV_IREG_ADC_ALT_RATE, (div - 1) << 4);
559 unsigned int rate, div, r, m, n; local
564 div = 48000 / rate;
565 if (div > 8)
566 div
583 unsigned int div; local
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/sound/soc/omap/
H A Domap-mcbsp.c242 unsigned int format, div, framesize, master; local
360 div = mcbsp_data->clk_div ? mcbsp_data->clk_div : 1;
361 framesize = (mcbsp_data->in_freq / div) / params_rate(params);
497 int div_id, int div)
505 mcbsp_data->clk_div = div;
506 regs->srgr1 |= CLKGDV(div - 1);
496 omap_mcbsp_dai_set_clkdiv(struct snd_soc_dai *cpu_dai, int div_id, int div) argument
/sound/soc/atmel/
H A Datmel_ssc_dai.c298 int div_id, int div)
310 ssc_p->cmr_div = div;
312 if (div != ssc_p->cmr_div)
317 ssc_p->tcmr_period = div;
321 ssc_p->rcmr_period = div;
297 atmel_ssc_set_dai_clkdiv(struct snd_soc_dai *cpu_dai, int div_id, int div) argument

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