| f7c66b7110227327cfddf22fe66c7ec1fe1d39e7 |
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14-May-2014 |
Afzal Mohammed <afzal@ti.com> |
ARM: dts: AM4372: clk: efuse based crystal frequency detect
Currently oscillator frequency is determined based on sysboot settings,
it may not be the case always. To determine it properly, efuse settings
also has to be read. CONTROL_STATUS register holds this information.
Bit 31: if 0, frequency to be determined based on sysboot
if 1, frequency to be determined based on efuse
Bit 29,30 - for efuse detection of frequency
Bit 22,23 - for sysboot detection of frequency
Add clock nodes (mux) to determine oscillator frequency as above.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
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| 10a6e1832b0c6d7da45211ba04ffe16aab528e54 |
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21-May-2014 |
Tomi Valkeinen <tomi.valkeinen@ti.com> |
ARM: dts: am43xx-clocks.dtsi: add ti, set-rate-parent to display clock path
We need set-rate-parent flags for the display's clock path so that the
DSS driver can change the clock rate of the PLL.
This patchs adds the ti,set-rate-parent flag to disp_clk and
dpll_disp_m2_ck clock nodes.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
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| 4da1c67719f612af9f3ba2c804efa9d2452bae76 |
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29-Apr-2014 |
Poddar, Sourav <sourav.poddar@ti.com> |
ARM: dts: am43x-clock: add tbclk data for ehrpwm
We need "tbclk" clock data for the functioning of ehrpwm
module. Hence, populating the required clock information
in clock dts file.
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
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| 50b9689408f600134ca96ece772a01fccaa68782 |
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28-Mar-2014 |
Dave Gerlach <d-gerlach@ti.com> |
ARM: dts: am43xx-clocks: use ti, fixed-factor-clock for dpll_per_clkdcoldo
Use the ti,fixed-factor-clock version so that autoidle for
dpll_per_clkdcoldo is properly controlled after power management code
is introduced. Without this the clock may be held active even when
it is gated.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
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| eac1cd3bd6a619e842e7a58bc0845d222627e9ed |
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19-Mar-2014 |
George Cherian <george.cherian@ti.com> |
ARM: dts: am43xx clock data
Add USB and USB PHY reference clock data
Signed-off-by: George Cherian <george.cherian@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Acked-by: Felipe Balbi <balbi@ti.com>
[tony@atomide.com: tabified]
Signed-off-by: Tony Lindgren <tony@atomide.com>
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| 6a67920811c23320aa25d94e5891d229eab506d9 |
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02-Aug-2013 |
Tero Kristo <t-kristo@ti.com> |
ARM: dts: am43xx clock data
This patch creates a unique node for each clock in the AM43xx power,
reset and clock manager (PRCM).
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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