| e86ed56adb571cddd47ba3a008e2353b057ba70b |
|
02-Sep-2014 |
Gregory CLEMENT <gregory.clement@free-electrons.com> |
ARM: mvebu: add SSCG to Armada 370 Device Tree
The Armada 370 SoC has a Spread Spectrum Clock Generator. This commit
adds the description of this generator to the Device Tree describing
this SoC.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Leigh Brown <leigh@solinno.co.uk>
Link: https://lkml.kernel.org/r/1409645719-20003-4-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| a43f99d260d30be8480f76b2c3eeb283a7115623 |
|
11-Aug-2014 |
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
ARM: mvebu: Add network pin mux configuration for the Armada 370 SoC
This commit adds the pin mux configuration for the two network interfaces
and the MDIO interface in the Armada 370 SoC .dtsi file. Only the
configuration for RGMII is added for now.
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1407759281-11513-2-git-send-email-ezequiel.garcia@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| b6249d4b36874915c65827d90b942786f72d80b3 |
|
14-Apr-2014 |
Gregory CLEMENT <gregory.clement@free-electrons.com> |
ARM: mvebu: switch to the new PMSU binding in Armada 370/XP Device Tree
Following the introduction of the new PMSU Device Tree binding, as
well as the separate CPU reset binding, this commit switches the
Armada 370 and Armada XP Device Trees to use them.
The PMSU node is moved from the Armada XP specific armada-xp.dtsi to
the common Armada 370/XP armada-370-xp.dtsi because the PMSU is in
fact available at the same location on both SOCs.
The CPU reset node is then added on both Armada 370 and Armada XP,
with a different compatible string. On Armada 370, the CPU reset
driver is not really needed as Armada 370 is single core and the only
use of the CPU reset driver is to boot secondary processors, but it
still makes sense to have this CPU reset register described in the
Device Tree.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1397483433-25836-6-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397483433-25836-6-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| 05afeeb9b1b4bdb1ae0013df0549b81a61c9ad42 |
|
11-Feb-2014 |
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
ARM: mvebu: Enable Armada 370/XP watchdog in the devicetree
Add the DT nodes to enable watchdog support available in Armada 370
and Armada XP SoCs.
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| 8d001f0b9968f1a79edf49390e5b8d8164df13fe |
|
12-Feb-2014 |
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
ARM: mvebu: add I2C0 muxing option for Armada 370 SoC
This commit adds a pin-muxing configuration for the I2C0 bus of the
Armada 370, which is used on the Armada 370 DB platform to interface
with the CS42L51 audio codec.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| 74839835fbe79726ce004deb9318cf22894959bc |
|
12-Feb-2014 |
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
ARM: mvebu: add audio I2S controller to Armada 370 Device Tree
The Armada 370 SoC has an I2S audio controller. This commit adds the
description of this controller to the Device Tree describing this SoC,
as well as two possible muxing configurations for the I2S bus pins.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| a095b1c78a35f05755ca2f0e106d84792974aef5 |
|
12-Dec-2013 |
Jason Cooper <jason@lakedaemon.net> |
ARM: mvebu: sort DT nodes by address
Prevent future unnecessary merge conflicts
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| d4fa99417a0701c7aebe2d53ff65b3048985b310 |
|
09-Aug-2013 |
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
ARM: mvebu: link PCIe controllers to the MSI controller
This commit adjusts the Armada 370 and Armada XP PCIe controllers
Device Tree informations to reference their MSI controller. In the
case of this platform, the MSI controller is implemented by the MPIC.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Daniel Price <daniel.price@gmail.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| 238493e34d3f6aea8531d3c0ee0583c4c929e12f |
|
22-Aug-2013 |
Gregory CLEMENT <gregory.clement@free-electrons.com> |
ARM: dts: mvebu: Update with the new compatible string for mv64xxx-i2c
The mv64xxx-i2c embedded in the Armada XP have a new feature to
offload i2c transaction. This new version of the IP come also with
some errata. This lead to the introduction to a another compatible
string.
This commit split the i2c information into armada-370.dtsi and
armada-xp.dtsi. Most of the data remains the same and stay in the
common file Armada-370-xp.dtsi. With this new feature the size of the
registers are bigger for Armada XP and the new compatible string is
used.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| 5d3b883071763e6448386b875f04fcb201b6e12d |
|
13-Aug-2013 |
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
ARM: mvebu: Fix the Armada 370/XP timer compatible strings
The "marvell,armada-370-xp-timer" compatible string, together with
the "marvell,timer-25Mhz" property are deprecated and should be
removed from current DT.
Instead, the timer DT nodes are now required to have an appropriate
compatible string, which should be either "marvell,armada-370-timer"
or "marvell,armada-xp-timer", depending on SoC.
The clock property is now required only for Armada 370 so move it accordingly.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| ca60985c0042ec391fa7e6131b2894ed5638feab |
|
30-Jul-2013 |
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
ARM: mvebu: use correct #interrupt-cells instead of #interrupts-cells
The Device Tree information for the GPIO banks of the Armada 370 and
Armada XP SOCs was incorrectly using #interrupts-cells instead of
controller when using GPIO interrupts, since the GPIO bank DT node
wasn't recognized as a valid interrupt controller by the OF code.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| 14fd8ed0a7fd199131425fe9e802173c4ba6a4e9 |
|
26-Jul-2013 |
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
ARM: mvebu: Relocate Armada 370/XP PCIe device tree nodes
Now that mbus has been added to the device tree, it's possible to
move the PCIe nodes out of internal registers, placing it directly
below the mbus. This is a more accurate representation of the
hardware.
Moving the PCIe nodes, we now need to introduce an extra cell to
encode the window target ID and attribute. Since this depends on
the PCIe port, we split the ranges translation entries, to correspond
to each MBus window.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| 0cd3754a8317e5e482c8227c5e994ab4c6218242 |
|
26-Jul-2013 |
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
ARM: mvebu: Add BootROM to Armada 370/XP device tree
In order to access the SoC BootROM, we need to declare a mapping
(through a ranges property). The mbus driver will use this property
to allocate a suitable address decoding window.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| 5e12a613ce393472316063dab062ad1afad84cc5 |
|
26-Jul-2013 |
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
ARM: mvebu: Add MBus to Armada 370/XP device tree
The Armada 370/XP SoC family has a completely configurable address
space handled by the MBus controller.
This patch introduces the device tree layout of MBus, making the
'soc' node as mbus-compatible.
Since every peripheral/controller is a child of this 'soc' node,
this makes all of them sit behind the mbus, thus describing the
hardware accurately.
A translation entry has been added for the internal-regs mapping.
This can't be done in the common armada-370-xp.dtsi because A370
and AXP have different addressing width.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| 38149887ef8bfdc3d95e84a5b0a344241787d2d7 |
|
26-Jul-2013 |
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
ARM: mvebu: Use the preprocessor on Armada 370/XP device tree files
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| 83735101959e26dd35675143a4b6307c76f45135 |
|
07-Jun-2013 |
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
ARM: mvebu: Remove device tree unused properties on A370
These properties are not needed so it's safe to remove them.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| 489e138eec96f529c5e8d4cd3ea45882ecdbf5ca |
|
20-May-2013 |
Gregory CLEMENT <gregory.clement@free-electrons.com> |
ARM: dts: mvebu: Fix wrong the address reg value for the L2-cache node
During the conversion to the internal-regs' subnode, the L2-cache node
haven not been converted (due to a wrong choice made by myself during
the resolution of the merge conflict when I rebased the commit). This
leads to wrong address for L2 cache which prevent it to be used on
Armada 370. This commit fix the address reg of the e L2-cache node.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| 8eed481e6fe2c28c2a579ada0c8ba5cbad45bf2c |
|
16-May-2013 |
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
arm: mvebu: fix the 'ranges' property to handle PCIe
Since 82a682676 ('ARM: dts: mvebu: Convert all the mvebu files to use
the range property') all the device nodes of Armada 370/XP are under a
common 'ranges' property that translates the device register addresses
into their absolute address, thanks to the base address of the
internal register space.
However, beyond just the register areas, there are also PCIe I/O and
memory regions, whose addresses should be properly translated. This
patch fixes the Armada 370 and XP ranges property to take PCIe into
account properly.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| be3cd268d1d1837aaed937c2fc85b3d39d2f1b50 |
|
09-Apr-2013 |
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
ARM: mvebu: do not duplicate the mpic alias
The mpic alias is already defined in the common armada-370-xp.dtsi, so
there's no need to repeat it at the armada-xp.dtsi and armada-370.dtsi
level.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| 74898364e717c6bd939bb88d95049fc91d2b4950 |
|
12-Apr-2013 |
Gregory CLEMENT <gregory.clement@free-electrons.com> |
ARM: dts: mvebu: Convert mvebu device tree files to 64 bits
In order to be able to use more than 4GB of RAM when the LPAE is
activated, the dts must be converted in 64 bits.
Only Armada XP is LPAE capable, but as it shares a common dtsi file
with Armada 370, then the common file include the skeleton64. Thanks
to the use of the overload capability of the device tree format,
armada-370 include the 32 bit skeleton and all the armada 370 based
dts can remain the same.
This was heavily based on the work of Lior Amsalem.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| 467f54b2157bd01a487fd933122fd193f1e13911 |
|
12-Apr-2013 |
Gregory CLEMENT <gregory.clement@free-electrons.com> |
ARM: dts: mvebu: introduce internal-regs node
Introduce a 'internal-regs' subnode, under which all devices are
moved. This is not really needed for now, but will be for the
mvebu-mbus driver. This generates a lot of code movement since it's
indenting by one more tab all the devices. So it was a good
opportunity to fix all the bad indentation.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| 82a682676ce34e59369f60168a8729348aaae4d0 |
|
12-Apr-2013 |
Gregory CLEMENT <gregory.clement@free-electrons.com> |
ARM: dts: mvebu: Convert all the mvebu files to use the range property
This conversion will allow to keep 32 bits addresses for the internal
registers whereas the memory of the system will be 64 bits.
Later it will also ease the move of the mvebu-mbus driver to the
device tree support.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| b18ea4dc7746f1270bbe3a0817f9a034eec031a8 |
|
12-Apr-2013 |
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
ARM: dts: mvebu: move all peripherals inside soc
reorganize the .dts and .dtsi files so that all devices are under the
soc { } node (currently some devices such as the interrupt controller,
the L2 cache and a few others are outside).
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| a09a0b7c6ff122e3e74efab2565ded2a4bbef854 |
|
09-Apr-2013 |
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
arm: mvebu: add PCIe Device Tree informations for Armada 370
The Armada 370 SoC has two 1x PCIe 2.0 interfaces, so we add the
necessary Device Tree informations to make these interfaces availabel.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| a10837ba09fdb3ddb781dae2efc30dc5c4ec5cc1 |
|
26-Mar-2013 |
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
ARM: mvebu: Add thermal support to Armada 370 device tree
This patch adds support for the thermal controller available in
all Armada 370 boards. This controller has two 4-byte registers:
one to read the thermal sensor, the other for sensor initialization.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| 879d68a445dd7073a8c022fcdd21dc27eca7f192 |
|
27-Mar-2013 |
Ryan Press <ryan@presslab.us> |
arm: mvebu: Fix pinctrl for Armada 370 Mirabox SDIO port.
The previous configuration used the wrong "clk" pin. Without this
change mv_sdio worked because the bootloader would set the pin up, but
with a bootloader that does not set the pin, mv_sdio fails to detect any
card.
I have tested this change using a mwifiex_sdio wireless network adapter
over the SDIO interface.
Signed-off-by: Ryan Press <ryan@presslab.us>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| b2bb806f553f57459b8052fc5b8e2489e21ddf24 |
|
23-Jan-2013 |
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
arm: mvebu: Add support for USB host controllers in Armada 370/XP
The Armada 370 and Armada XP SoC has an Orion EHCI USB controller.
This patch adds support for this controller in Armada 370
and Armada XP SoC common device tree files.
Cc: Lior Amsalem <alior@marvell.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tested-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| fa1b21d13538d52639ee19eea2aa6148a6c3ba47 |
|
21-Dec-2012 |
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
arm: mvebu: add pin muxing options for the SDIO interface on Armada 370
The SDIO interface is available either on pins MPP9/11/12/13/14/15 or
MPP47/48/49/50/51/52 on the Armada 370. Even though all combinations
are potentially possible, those two muxing options are the most
probable ones, so we provide those at the SoC level .dtsi file.
In practice, in turns out the Armada 370 DB board uses the former,
while the Armada 370 Mirabox uses the latter.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| 2f96fbb7d851740d0594a6b74142083d51483ab5 |
|
26-Sep-2012 |
Gregory CLEMENT <gregory.clement@free-electrons.com> |
arm: mvebu: add Aurora L2 Cache Controller to the DT
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Yehuda Yitschak <yehuday@marvell.com>
Tested-and-reviewed-by: Yehuda Yitschak <yehuday@marvell.com>
Tested-and-reviewed-by: Lior Amsalem <alior@marvell.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| 0122eee890e28e466d682cdc4e1d125cc0ad9fdf |
|
20-Nov-2012 |
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
arm: mvebu: add XOR engines to Armada 370 .dtsi
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
|
| 9d2027830c6306b079d5e888d40ec1f2efebd6ad |
|
17-Nov-2012 |
Gregory CLEMENT <gregory.clement@free-electrons.com> |
clk: armada-370-xp: add support for clock framework
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by Gregory CLEMENT <gregory.clement@free-electrons.com>
|
| 397d59f3b59e32236a0b74803d636c061d537aef |
|
19-Sep-2012 |
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
arm: mvebu: add DT information for GPIO banks on Armada 370 and XP
The gpioX aliases are needed so that the driver can use
of_alias_get_id() to get a 0-based number of the GPIO bank, which we
then use to compute the base GPIO of the bank being probed. This is
similar to what gpio-mxs.c is doing.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <gregory.clement@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| d81b8bafc44b369b326b02af907554769e1b1434 |
|
13-Sep-2012 |
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
ARM: mvebu: Add pinctrl support to Armada 370 SoC
This commits adds the necessary device tree information to define the
compatible property for the pinctrl driver instance of Armada 370 SoC.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
| 9ae6f740b49f933eeff972a79fd2a8b7e4592cf5 |
|
13-Jun-2012 |
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
arm: mach-mvebu: add support for Armada 370 and Armada XP with DT
[ben.dooks@codethink.co.uk: ensure error check on of_property_read_u32]
[ben.dooks@codethink.co.uk: use mpic address instead of bus-unit's ]
[ben.dooks@codethink.co.uk: BUG_ON() if the of_iomap() fails for mpic]
[ben.dooks@codethink.co.uk: move mpic per-cpu register base ]
[ben.dooks@codethink.co.uk: number fetch should use irqd_to_hwirq()]
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Lior Amsalem <alior@marvell.com>
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Yehuda Yitschak <yehuday@marvell.com>
Tested-by: Lior Amsalem <alior@marvell.com>
|