| efb4a44e24df2b98464977aee5be41148936fc7c |
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16-Oct-2014 |
Dinh Nguyen <dinguyen@opensource.altera.com> |
ARM: dts: socfpga: Add a 3.3V fixed regulator node
Without the 3.3V regulator node, the SDMMC driver will give these warnings:
dw_mmc ff704000.dwmmc0: No vmmc regulator found
dw_mmc ff704000.dwmmc0: No vqmmc regulator found
This patch adds the regulator node, and points the SD/MMC to the regulator.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
---
v3: Rename nodes to have schematic-name_regulator and remove "boot-on" and
"always-on"
v2: Move the regulator nodes to their respective board dts file and
correctly rename them to match the schematic
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| c6dcb1010239e484a461178d3318b35ef44dbcf0 |
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14-Aug-2014 |
Dinh Nguyen <dinguyen@opensource.altera.com> |
ARM: dts: socfpga: memreserve first 4KB for future system use
This patch adds a /memreserve/ section to reserve the first 4K for future
use by the system. One possible use-case is trampoline code used to bring
secondary cores online.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
---
v3: Update commit message based on Mark Rutland's comment
v2: Add a comment in the dts files
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| f5bbe55a270fa153465df23c266f61973c4c7dc0 |
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11-Aug-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: socfpga: unuse the slot-node and deprecate the supports-highspeed for
dw-mmc
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And "supports-highspeed" property in dw-mmc is deprecated.
"supports-highspeed" property can be replaced with "cap-sd/mmc-highspeed".
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Tushar Behera <trblinux@gmail.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Seungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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| bd785efda77c073e8ed5c7f29c7bdab6a3f3f6ad |
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03-Apr-2014 |
Dinh Nguyen <dinguyen@altera.com> |
ARM: socfpga: dts: Remove hard coded clock-frequency property
The timers and uart can get their clock frequencies using the common clock
driver.
Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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| 7da9b436d837941533ec0a0ccc78d3b294f997e8 |
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03-Apr-2014 |
Steffen Trumtrar <s.trumtrar@pengutronix.de> |
ARM: socfpga: dts: convert to preprocessor includes
Convert all socfpga DT files to the dtc preprocessor include syntax.
This allows to include header files in the devicetrees like other
SoC-types already do.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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| 2b5cc85135279c3504c72ab51bd089d102a2f8e9 |
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17-Mar-2014 |
Chris Ball <chris@printf.net> |
Revert "dts: socfpga: Add support for SD/MMC on the SOCFPGA platform"
This reverts commit d9c3f5df539a8a74cc830b35838670fe0541fed1, which
should not have been merged via mmc-next. It's in arm-soc instead now.
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| 9b931361ff0971d2639b1366f8b468c687fa942f |
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18-Feb-2014 |
Dinh Nguyen <dinguyen@altera.com> |
dts: socfpga: Add support for SD/MMC on the SOCFPGA platform
Introduce "altr,socfpga-dw-mshc" to enable Altera's SOCFPGA platform
specific implementation of the dw_mmc driver.
Also add the "syscon" binding to the "altr,sys-mgr" node. The clock
driver can use the syscon driver to toggle the register for the SD/MMC
clock phase shift settings.
Finally, fix an indentation error for the sysmgr node.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Tested-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Chris Ball <chris@printf.net>
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| d9c3f5df539a8a74cc830b35838670fe0541fed1 |
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18-Feb-2014 |
Dinh Nguyen <dinguyen@altera.com> |
dts: socfpga: Add support for SD/MMC on the SOCFPGA platform
Introduce "altr,socfpga-dw-mshc" to enable Altera's SOCFPGA platform
specific implementation of the dw_mmc driver.
Also add the "syscon" binding to the "altr,sys-mgr" node. The clock
driver can use the syscon driver to toggle the register for the SD/MMC
clock phase shift settings.
Finally, fix an indentation error for the sysmgr node.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Tested-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Chris Ball <chris@printf.net>
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| 163a036468c2eb8f30658dff6c0de6c959f79b0d |
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25-Sep-2013 |
Dinh Nguyen <dinguyen@altera.com> |
dts: socfpga: Add support for Altera's SOCFPGA Arria V board
Add support for a new SOCFPGA board that has an Arria V FPGA along with
dual ARM Cortex-A9 cores.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: devicetree@vger.kernel.org
CC: linux-arm-kernel@lists.infradead.org
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