| b6e23bb63f28f0a8ffa7cf9824fa48000c08f9b2 |
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28-Oct-2013 |
Shawn Guo <shawn.guo@linaro.org> |
ARM: imx: remove imx_src_prepare_restart() call
There is ~10% possibility that the following emergency restart command
fails to reboot imx6q.
$ echo b > /proc/sysrq-trigger
The IMX restart routine mxc_restart() assumes that it will always run on
primary core, and will call imx_src_prepare_restart() to disable
secondary cores in order to get them come to online in the following
boot. However, the assumption is only true for normal kernel_restart()
case where migrate_to_reboot_cpu() will be called to migrate to primary
core, but not necessarily true for emergency_restart() case. So when
emergency_restart() calls into mxc_restart() on any secondary core,
system will hang immediately once imx_src_prepare_restart() is called
to disabled secondary cores. Since emergency_restart() is defined as a
function that is safe to call in interrupt context, we cannot just call
migrate_to_reboot_cpu() to fix the issue.
Fortunately, we just found that the issue can be fixed at imx6q platform
level. We used to call imx_src_prepare_restart() to disable all
secondary cores before resetting hardware. Otherwise, the secondary
will fail come to online in the reboot. However, we recently found that
after commit 6050d18 (ARM: imx: reset core along with enable/disable
operation) comes to play, we do not need to reset the secondary cores
any more. That said, mxc_restart() now can run on any core to reboot
the system, as long as we remove the imx_src_prepare_restart() call from
mxc_restart().
So let's simply remove imx_src_prepare_restart() call to fix the above
emergency restart failure.
Reported-by: Jiada Wang <jiada_wang@mentor.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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| 6050d181a4fd4abb745506a6e565d55f1f9df964 |
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09-Oct-2013 |
Shawn Guo <shawn.guo@linaro.org> |
ARM: imx: reset core along with enable/disable operation
From hotplug stress test result, resetting core during enable/disable
operation can improve cpu hotplug stability. So let's set
SRC reset bit in imx_enable_cpu() for the core when its enable bit is
accessed.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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| 5c5f0421a8eea5bdaba9b9313c5bb4833aeb39cd |
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30-Apr-2013 |
Arnd Bergmann <arnd@arndb.de> |
ARM: imx: reset_controller may be disabled
The new reset controller API is optional, so if that is disabled,
we must not call it from platform code.
arch/arm/mach-imx/built-in.o: In function
`imx_src_init': /git/arm-soc/arch/arm/mach-imx/src.c:144:
undefined reference to `reset_controller_register'
Cc: Sascha Hauer <kernel@pengutronix.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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| 02985b94638b4de3ef9f2eb2ac5befe5bab12c26 |
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28-Mar-2013 |
Philipp Zabel <p.zabel@pengutronix.de> |
ARM i.MX6q: Add GPU, VPU, IPU, and OpenVG resets to System Reset Controller (SRC)
The SRC has auto-deasserting reset bits that control reset lines to
the GPU, VPU, IPU, and OpenVG IP modules. This patch adds a reset
controller that can be controlled by those devices using the
reset controller API.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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| bd3d924d71a45b88941b50ddaa77aadb2ae4ded7 |
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28-Mar-2013 |
Philipp Zabel <p.zabel@pengutronix.de> |
ARM i.MX5: Add System Reset Controller (SRC) support for i.MX51 and i.MX53
The SRC in i.MX51 and i.MX53 is similar to the one in i.MX6q minus
the IPU2 reset line and multi core CPU reset/enable bits.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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| 0989857625ba9d446916495f619435a3b42e7be4 |
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25-Mar-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
ARM: mach-imx: src: Include "common.h
Fix the following sparse warnings:
arch/arm/mach-imx/src.c:28:6: warning: symbol 'imx_enable_cpu' was not declared. Should it be static?
arch/arm/mach-imx/src.c:39:6: warning: symbol 'imx_set_cpu_jump' was not declared. Should it be static?
arch/arm/mach-imx/src.c:46:6: warning: symbol 'imx_src_prepare_restart' was not declared. Should it be static?
arch/arm/mach-imx/src.c:59:13: warning: symbol 'imx_src_init' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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| 2f3edfd7e27ad4206acbc2ae99c9df5f46353024 |
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26-Mar-2013 |
Shawn Guo <shawn.guo@linaro.org> |
ARM: imx: fix sync issue between imx_cpu_die and imx_cpu_kill
There is a sync issue with hotplug operation. It's possible that when
imx_cpu_kill gets running on primary core, the imx_cpu_die execution
on the core which is to be killed hasn't been finished yet. The problem
will very likely be hit when running suspend without no_console_suspend
setting on kernel cmdline.
It uses cpu jumping argument register to sync imx_cpu_die and
imx_cpu_kill. The register will be set in imx_cpu_die and imx_cpu_kill
will wait for the register being cleared to actually kill the cpu.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: <stable@vger.kernel.org>
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| eb50439b92b6298bf209a982f295ba9c0f7cb30b |
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20-Jan-2012 |
Will Deacon <will.deacon@arm.com> |
ARM: 7293/1: logical_cpu_map: decouple CPU mapping from SMP
It turns out that the logical CPU mapping is useful even when !CONFIG_SMP
for manipulation of devices like interrupt and power controllers when
running a UP kernel on a CPU other than 0. This can happen when kexecing
a UP image from an SMP kernel.
In the future, multi-cluster systems running AMP configurations will
require something similar for mapping cluster IDs, so it makes sense to
decouple this logic in preparation for this support.
Acked-by: Yang Bai <hamo.by@gmail.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Reported-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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| 0a60cb14a58696100481674682eb07ffb2a8eac7 |
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09-Jan-2012 |
Rob Herring <rob.herring@calxeda.com> |
ARM: imx: remove incorrect BSYM usage
BSYM macro is only needed for assembly files and its usage in c files is
wrong, so remove it. The linker will correctly set bit 0 for Thumb2
kernels.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Dave Martin <dave.martin@linaro.org>
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| 0575fb754dbfc32a01f297e778533340a533ec68 |
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09-Dec-2011 |
Shawn Guo <shawn.guo@linaro.org> |
ARM: 7198/1: arm/imx6: add restart support for imx6q
The restart support was missed from the initial imx6q submission.
The mxc_restart() does not work for imx6q. Instead, this patch adds
the restart for imx6q.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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| eaa142ca3dee1478aca1a645bb0e5a249a33241a |
|
09-Aug-2011 |
Will Deacon <will.deacon@arm.com> |
ARM: mach-imx: convert logical CPU numbers to physical numbers
This patch uses the new cpu_logical_map() macro for converting logical
CPU numbers into physical numbers when releasing CPUs during the SMP
boot and CPU hotplug paths.
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
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| 9fbbe6890c88aa332efe61d5894108dd8b932530 |
|
06-Sep-2011 |
Shawn Guo <shawn.guo@linaro.org> |
arm/imx6q: add core drivers clock, gpc, mmdc and src
It adds a number of core drivers support for imx6q, including clock,
General Power Controller (gpc), Multi Mode DDR Controller(mmdc) and
System Reset Controller (src).
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|