5d002cce4c8a24234b81033119eda3272ebf7981 |
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28-Jun-2011 |
Mike Frysinger <vapier@gentoo.org> |
spi/bfin_spi: drop bits_per_word from client data No other SPI controller has this field, and SPI clients should be setting this up in their own drivers. So drop it from the Blackfin controller to keep people from using it. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Bob Liu <lliubbo@gmail.com>
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ff7cbc4b5c6276865a6db594c4b8459ebad457a4 |
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24-Oct-2010 |
Mike Frysinger <vapier@gentoo.org> |
Blackfin: ppi/spi/twi headers: add missing __BFP undef Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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b9ac41e314f0b43641bc01bd553fd2e0458ed832 |
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22-Oct-2010 |
Mike Frysinger <vapier@gentoo.org> |
Blackfin: bfin_spi.h: add MMR peripheral layout Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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5e8592dca303fb429d1641c205fe509f4b781ca2 |
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18-Dec-2009 |
Mike Frysinger <vapier@gentoo.org> |
spi/bfin_spi: combine duplicate SPI_CTL read/write logic While combining things, also switch to the proper SPI bit define names. This lets us punt the rarely used SPI defines. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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d3cc71f71ae13596cb988e16bfa2b15f09fb7347 |
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17-Nov-2009 |
Barry Song <barry.song@analog.com> |
spi/bfin_spi: redo GPIO CS handling The common SPI layers take care of detecting CS conflicts and preventing two devices from claiming the same CS. This causes problems for the GPIO CS support we currently have as we are using CS0 to mean "GPIO CS". But if we have multiple devices using a GPIO CS, the common SPI layers see multiple devices using the virtual "CS0" and reject any such attempts. To make both work, we introduce an offset define. This represents the max number of hardware CS values that the SPI peripheral supports. If the CS is below this limit, we know we can use the hardware CS. If it's above, we treat it as a GPIO CS. This keeps the CS unique as seen by the common code and prevents conflicts. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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0d2c6de2255cb299fdd77d4543738adee45f4f3f |
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15-Oct-2009 |
Mike Frysinger <vapier@gentoo.org> |
Blackfin: SPI: expand SPI bitmasks Expand the BIT_CTL defines to use the naming convention of the hardware, and expand the masks to cover all documented bits. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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201bbc6fd84c67b4021f454d3e4c30d5cd77f702 |
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23-Sep-2009 |
Mike Frysinger <vapier@gentoo.org> |
spi/bfin_spi: drop custom cs_change_per_word support As David points out, the cs_change_per_word option isn't standard, nor is anyone actually using it. So punt all of the dead code considering it makes up ~10% of the code size. Reported-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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96f1050d3df105c9ae6c6ac224f370199ea82fcd |
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24-Sep-2009 |
Robin Getz <robin.getz@analog.com> |
Blackfin: mass clean up of copyright/licensing info Bill Gatliff & David Brownell pointed out we were missing some copyrights, and licensing terms in some of the files in ./arch/blackfin, so this fixes things, and cleans them up. It also removes: - verbose GPL text(refer to the top level ./COPYING file) - file names (you are looking at the file) - bug url (it's in the ./MAINTAINERS file) - "or later" on GPL-2, when we did not have that right It also allows some Blackfin-specific assembly files to be under a BSD like license (for people to use them outside of Linux). Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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e68d1ebc30e033612bb69f949da654d72beae57d |
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03-Jun-2009 |
Yi Li <yi.li@analog.com> |
Blackfin: bf537-stamp: declare SPI IRQ resources Signed-off-by: Yi Li <yi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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93b61bddc13d9acf1fe341b39d826e80f3182d1e |
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07-Apr-2009 |
Wolfgang Muees <wolfgang.mues@auerswald.de> |
Blackfin SPI Driver: Make mmc_spi driver work on Blackfin 1. Rewrite of the non-dma data transfer functions to use only ONE mode of TIMOD (TIMOD=0x1). With TIMOD=0, it was not possible to set the TX bit pattern. So the TDBR = 0xFFFF inside the read calls won't work. 2. Clear SPI_RDBR before reading and before duplex transfer. Otherwise the garbage data in RDBR will get read. Since mmc_spi uses a lot of duplex transfers, this is the main cause of mmc_spi failure. 3. Poll RXS for transfer completion. Polling SPIF or TXS cannot guarantee transfer completion. This may interrupt a transfer before it is finished. Also this may leave garbage data in buffer and affect next transfer. [Yi Li <yi.li@analog.com>: add a field "u16 idle_tx_val" in "struct bfin5xx_spi_chip" to specify the value to transmit if no TX value is supplied.] Signed-off-by: Wolfgang Muees <wolfgang.mues@auerswald.de> Signed-off-by: Yi Li <yi.li@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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42c78b2bf51bafb4cfa98dfecc28dd9b8bcd04b0 |
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07-Apr-2009 |
Michael Hennerich <michael.hennerich@analog.com> |
Blackfin SPI Driver: Add GPIO controlled SPI Slave Select support Add support for GPIO controlled SPI Chip Selects. To make use of this feature, set chip_select = 0 and add a proper cs_gpio to your controller_data. struct spi_board_info .chip_select = 0 struct bfin5xx_spi_chip .cs_gpio = GPIO_P### There are various SPI devices that require SPI MODE_0, and need to have the Chip Selects asserted during the entire transfer. Consider using SPI_MODE_3 (SPI_CPHA | SPI_CPOL) if your device allows it. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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7513e006c64fbe2f43aef2139c8c1f2b1a9cb6b9 |
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07-Apr-2009 |
Michael Hennerich <michael.hennerich@analog.com> |
Blackfin SPI Driver: Fix erroneous SPI Clock divisor calculation Fix erroneous SPI Clock divisor calculation. Make sure SPI_BAUD is always >= 2. Writing a value of 0 or 1 to the SPI_BAUD register disables the serial clock. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> Acked-by: David Brownell <dbrownell@users.sourceforge.net> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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1eb19e30adeb05957b45204f0c04d94fc4662ffd |
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28-Mar-2009 |
Cliff Cai <cliff.cai@analog.com> |
Blackfin arch: sport spi needs 6 gpio pins Signed-off-by: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
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16daaf59c9aa996c94cb17b30538eead61d63694 |
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07-Jan-2009 |
Mike Frysinger <vapier.adi@gmail.com> |
Blackfin arch: cleanup the header file comments use scm changelog rather than comment blocks in files Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
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639f6571458948b5112be2cf00c0c2c04db2897d |
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27-Aug-2008 |
Bryan Wu <cooloney@kernel.org> |
Blackfin arch: move include/asm-blackfin header files to arch/blackfin Signed-off-by: Bryan Wu <cooloney@kernel.org>
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