| 0ded1becc8deaea66f8837c274fd84facc257919 |
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22-Dec-2013 |
Hauke Mehrtens <hauke@hauke-m.de> |
MIPS: BCM47XX: add vectored interrupt support
This adds support for vectored interrupt which is supported by the SoC
using a MIPS 74K CPU like the BCM4716 and BCM4706.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6290/
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| 69733c9b0bcd35382e2d514362a31a12a507aea3 |
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13-Oct-2013 |
Hauke Mehrtens <hauke@hauke-m.de> |
MIPS: BCM47XX: add asmlinkage to plat_irq_dispatch()
plat_irq_dispatch() is called from asm code, add asmlinkage.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6043/
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| a3e72cd2974a4b178d4edf6737ae51d1ea83b5d8 |
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23-Jul-2011 |
Hauke Mehrtens <hauke@hauke-m.de> |
bcm47xx: fix irq assignment for new SoCs.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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| 1c0c13eb935c95fd2ca0b0aca6dd4860487fb242 |
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25-Sep-2007 |
Aurelien Jarno <aurelien@aurel32.net> |
[MIPS] Add support for BCM47XX CPUs.
Note that the BCM4710 does not support the wait instruction, this
is not a mistake in the code.
It originally comes from the OpenWrt patches.
Cc: Michael Buesch <mb@bu3sch.de>
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Florian Schirmer <jolt@tuxbox.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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