| cc81d7f37273ccb34db99a1f7ce688953a04289d |
|
12-Jul-2014 |
Jonas Gorski <jogo@openwrt.org> |
MIPS: BCM63xx: Append irq line to irq_{stat,mask}*
The SMP capable irq controllers have two interrupt output pins which are
controlled through separate registers, so make the variables arrays.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: John Crispin <blogic@openwrt.org>
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Gregory Fong <gregory.0xf0@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/7318/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| e95acd3d0d3a7bac9bca50c51a1d86777b6334eb |
|
06-Dec-2013 |
Florian Fainelli <florian@openwrt.org> |
MIPS: BCM63XX: use linux/serial_bcm63xx.h
Update the early_printk code to include linux/serial_bcm63xx.h which
provides the definitions for the UART block registers. While at it,
remove the inclusion of serial_bcm63xx.h which was just there to allow
smooth transition.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6203/
|
| 74e200c781501fc7a551ae04e2d4171ba0a60d9b |
|
06-Dec-2013 |
Florian Fainelli <florian@openwrt.org> |
MIPS: BCM63XX: move UART register definitions
Move the BCM63XX UART driver definitions to
include/linux/serial_bcm63xx.h such that we do not rely on the MIPS
BCM63XX code to provide these for us.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6202/
|
| 7ac836ce2aa7b931f6347e554cb65f9e9cc1da57 |
|
18-Jun-2013 |
Jonas Gorski <jogo@openwrt.org> |
MIPS: BCM63xx: Enable second core SMP on BCM6328 if available
BCM6328 has a OTP which tells us if the second core is available.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: John Crispin <blogic@openwrt.org>
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/5490/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 7b9334215f53135fb9cbdf0b44833cbc8e7d57b2 |
|
18-Jun-2013 |
Florian Fainelli <florian@openwrt.org> |
MIPS: BCM63XX: add support for BCM3368 Cable Modem
The Broadcom BCM3368 Cable Modem SoC is extremely similar to the
existing BCM63xx DSL SoCs, in particular BCM6358, therefore little effort
in the existing code base is required to get it supported. This patch adds
support for the following on-chip peripherals:
- two UARTS
- GPIO
- Ethernet
- SPI
- PCI
- NOR Flash
The most noticeable difference with 3368 is that it has its peripheral
register at 0xfff8_0000 we check that separately in ioremap.h. Since
3368 is identical to 6358 for its clock and reset bits, we use them
verbatim.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: jogo@openwrt.org
Patchwork: https://patchwork.linux-mips.org/patch/5499/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 3dc6475c0c9e55ac7f053ad6b8b398e779954545 |
|
12-Jun-2013 |
Florian Fainelli <florian@openwrt.org> |
bcm63xx_enet: add support Broadcom BCM6345 Ethernet
This patch adds support for the Broadcom BCM6345 SoC Ethernet. BCM6345
has a slightly different and older DMA engine which requires the
following modifications:
- the width of the DMA channels on BCM6345 is 64 bytes vs 16 bytes,
which means that the helpers enet_dma{c,s} need to account for this
channel width and we can no longer use macros
- BCM6345 DMA engine does not have any internal SRAM for transfering
buffers
- BCM6345 buffer allocation and flow control is not per-channel but
global (done in RSET_ENETDMA)
- the DMA engine bits are right-shifted by 3 compared to other DMA
generations
- the DMA enable/interrupt masks are a little different (we need to
enabled more bits for 6345)
- some register have the same meaning but are offsetted in the ENET_DMAC
space so a lookup table is required to return the proper offset
The MAC itself is identical and requires no modifications to work.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
|
| 6f00a0229627ca189529cad3f9154ac2f9e5c7db |
|
04-Jun-2013 |
Maxime Bizon <mbizon@freebox.fr> |
bcm63xx_enet: add support for Broadcom BCM63xx integrated gigabit switch
Newer Broadcom BCM63xx SoCs: 6328, 6362 and 6368 have an integrated switch
which needs to be driven slightly differently from the traditional
external switches. This patch introduces changes in arch/mips/bcm63xx in order
to:
- register a bcm63xx_enetsw driver instead of bcm63xx_enet driver
- update DMA channels configuration & state RAM base addresses
- add a new platform data configuration knob to define the number of
ports per switch/device and force link on some ports
- define the required switch registers
On the driver side, the following changes are required:
- the switch ports need to be polled to ensure the link is up and
running and RX/TX can properly work
- basic switch configuration needs to be performed for the switch to
forward packets to the CPU
- update the MIB counters since the integrated
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
|
| ab8ed9820f5645d0b5b81ef17bbcbd1cdd43a4fa |
|
21-Mar-2013 |
Jonas Gorski <jogo@openwrt.org> |
MIPS: BCM63XX: add flash detection for BCM6362
BCM6362 support booting from SPI flash and NAND.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5012/
Acked-by: John Crispin <blogic@openwrt.org>
|
| a156ba61f0b959a803d7a6941a52c5453524c99b |
|
21-Mar-2013 |
Jonas Gorski <jogo@openwrt.org> |
MIPS: BCM63XX: enable pcie for BCM6362
The PCIe controller is almost the same as the BCM6328 one, with only
the SERDES register being at a different location.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5011/
Acked-by: John Crispin <blogic@openwrt.org>
|
| 2c8aaf71b0a4738ae8cb70d9367089bdb892aea3 |
|
21-Mar-2013 |
Jonas Gorski <jogo@openwrt.org> |
MIPS: BCM63XX: add basic BCM6362 support
Add basic support for detecting and booting the BCM6362.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5009/
Acked-by: John Crispin <blogic@openwrt.org>
|
| 6605428c506bea269ca6c4aed85e97fbee2cbe7b |
|
21-Mar-2013 |
Jonas Gorski <jogo@openwrt.org> |
MIPS: BCM63XX: fix revision ID width
The REVID is only 8 bit wide.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5007/
Acked-by: John Crispin <blogic@openwrt.org>
|
| 8a398d757dd0f56c8ac621104b198ff66eef7a7a |
|
21-Mar-2013 |
Jonas Gorski <jogo@openwrt.org> |
MIPS: BCM63XX: remove duplicate spi register definitions
BCM6338 and BCM6348, and BCM6358 and everything after that share the
same register layout. To not have to redefine them for each new chip
and keep the code size small, only use the definitions for the first
chip with the certain layout.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5006/
Acked-by: John Crispin <blogic@openwrt.org>
|
| 7034228792cc561e79ff8600f02884bd4c80e287 |
|
22-Jan-2013 |
Ralf Baechle <ralf@linux-mips.org> |
MIPS: Whitespace cleanup.
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| e59b008e14c63572d4c643592e84bbd1b4088f39 |
|
12-Nov-2012 |
Florian Fainelli <florian@openwrt.org> |
MIPS: BCM63XX: fix BCM6345 clocks bits
BCM6345 has an intermediate 16-bits wide test control register between the
peripheral identifier register, and its clock control register is only 16-bits
wide contrary to other platforms where it is 32-bits wide. By shifting all
clocks bits by 16-bits to the left we ensure they get written to the proper
clock control register, without adding specific BCM6345 handling in the clock
code.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4555/
Signed-off-by: John Crispin <blogic@openwrt.org>
|
| e7e9937ff57a11b76e862f5445c46b53a76c6aa8 |
|
28-Oct-2012 |
Jonas Gorski <jonas.gorski@gmail.com> |
MIPS: BCM63XX: add softreset register description for BCM6358
The softreset register description for BCM6358 was missing, so add it.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4454
Signed-off-by: John Crispin <blogic@openwrt.org>
|
| 5fd66c2b2b7ce5cfc660cc75abbb3bf248ba3e9b |
|
09-Jul-2012 |
Kevin Cernekee <cernekee@gmail.com> |
MIPS: BCM63XX: Add register and IRQ definitions for USB 2.0 device
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4084/
Signed-off-by: John Crispin <blogic@openwrt.org>
|
| 18ec0e707917bbe9bb77555e578ec564c8a2abca |
|
23-Jun-2012 |
Kevin Cernekee <cernekee@gmail.com> |
MIPS: BCM63XX: Add register definitions for USBD dependencies
The USB 2.0 device depends on some functionality in other blocks, such
as GPIO and USBH. Add those register definitions here.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4025/
Signed-off-by: John Crispin <blogic@openwrt.org>
|
| 6f9423454aa68bdf64099f3a30fafb2c64b25cda |
|
09-Jul-2012 |
Kevin Cernekee <cernekee@gmail.com> |
MIPS: BCM63XX: Add new IUDMA definitions needed for USBD
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4083/
Signed-off-by: John Crispin <blogic@openwrt.org>
|
| 64eaea4a84a14f0299b5c0bc400fa92c10512d07 |
|
13-Jul-2012 |
Maxime Bizon <mbizon@freebox.fr> |
MIPS: BCM63XX: add external irq support for BCM6345
Add the missing definitions for BCM6345.
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4091/
Signed-off-by: John Crispin <blogic@openwrt.org>
|
| 5a6704454a68ab6e27e4fc5b82818a8c5733bf29 |
|
18-Jun-2012 |
Florian Fainelli <florian@openwrt.org> |
MIPS: BCM63xx: Fix SPI message control register handling for BCM6338/6348.
BCM6338 and BCM6348 have a message control register width of 8 bits, instead
of 16-bits like what the SPI driver assumes right now. Also the SPI message
type shift value of 14 is actually 6 for these SoCs.
This resulted in transmit FIFO corruption because we were writing 16-bits
to an 8-bits wide register, thus spanning on the first byte of the transmit
FIFO, which had already been filed in bcm63xx_spi_fill_txrx_fifo().
Fix this by passing the message control register width and message type
shift through platform data back to the SPI driver so that it can use
it properly.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: grant.likely@secretlab.ca
Cc: spi-devel-general@lists.sourceforge.net
Cc: jonas.gorski@gmail.com
Patchwork: https://patchwork.linux-mips.org/patch/3983/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 19c860d932de520017c9b2d88cd9dff90b71ba36 |
|
24-Jul-2012 |
Jonas Gorski <jonas.gorski@gmail.com> |
MIPS: BCM63XX: Add PCIe Support for BCM6328
Add support for the PCIe port found on BCM6328.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/3956/
Reviewed-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| e5766aea5b9b7519654261c27b639f567b5415b4 |
|
24-Jul-2012 |
Jonas Gorski <jonas.gorski@gmail.com> |
MIPS: BCM63XX: Add basic BCM6328 support
This includes CPU speed, memory size detection and working UART, but
lacking the appropriate drivers, no support for attached flash.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/3951/
Reviewed-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| aaf3fedb56c95b419eda4c5392e03ad9b82c4847 |
|
24-Jul-2012 |
Jonas Gorski <jonas.gorski@gmail.com> |
MIPS: BCM63XX: Add flash type detection
On BCM6358 and BCM6368 the attached flash type is exposed through a
bootstrapping register. Use it for auto detecting the flash type on
those and default to parallel flash for earlier SoCs.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/3954/
Reviewed-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 8aecfe946275d23a207c73dbaf7a7c7a8a80be24 |
|
24-Jul-2012 |
Florian Fainelli <florian@openwrt.org> |
MIPS: BCM63XX: add RNG peripheral definitions
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: mpm@selenic.com
Cc: herbert@gondor.apana.org.au
Patchwork: https://patchwork.linux-mips.org/patch/3326/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 0f6db0d07289c9ebf46be8909afe2b3772e06015 |
|
04-Jul-2012 |
Florian Fainelli <florian@openwrt.org> |
MIPS: BCM63xx: Define internal registers offsets of the SPI controller
BCM6338, BCM6348, BCM6358 and BCM6368 basically use the same SPI controller
though the internal registers are shuffled, which still allows a common
driver to drive that IP block.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: grant.likely@secretlab.ca
Cc: spi-devel-general@lists.sourceforge.net
Patchwork: https://patchwork.linux-mips.org/patch/3318/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| d9831a41e3409ae60e0cac353272d8ae4996b442 |
|
04-Jul-2012 |
Florian Fainelli <florian@openwrt.org> |
MIPS: BCM63XX: Be consistent in clock bits enable naming
Remove the _CLK suffix from the BCM6368 clock bits definitions to be
consistent with what is already present.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3312/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 38be3c7e77ee9bc8ca34a83506e34809ec36c2a4 |
|
19-Jul-2012 |
Florian Fainelli <florian@openwrt.org> |
MIPS: BCM63XX: Fix BCM6368 IPSec clock bit
The IPsec clock bit is 18 and not 17.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: mpm@selenic.com
Cc: herbert@gondor.apana.org.au
Patchwork: https://patchwork.linux-mips.org/patch/3323/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 92d9ae20269461deeefc46fbcdb8d428c4aa8d18 |
|
16-Nov-2011 |
Florian Fainelli <florian@openwrt.org> |
MIPS: BCM63xx: Fix GPIO set/get for BCM6345
On BCM6345, the register offsets for the set/get GPIO registers is wrong.
Use the same logic as the one present in arch/mips/bcm63xx/irq.c to
define the correct gpio_out_low_reg value when support for BCM6345
is compiled in.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3010/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| d61fcfe2bbb27d4da18c609cf279627ae1b74151 |
|
16-Nov-2011 |
Florian Fainelli <florian@openwrt.org> |
MIPS: BCM63xx: Fix SDRAM size computation for BCM6345
Instead of hardcoding the amount of available RAM, read the number of
effective multiples of 8MB from SDRAM_MBASE_REG.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3008/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 04712f3ff6e3a42ef658b55b0f99478f4f0682e3 |
|
04-Nov-2011 |
Maxime Bizon <mbizon@freebox.fr> |
MIPS: BCM63XX: Add support for bcm6368 CPU.
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2892/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 6224892c819e96898534c107c72b80a1a8e75abf |
|
04-Nov-2011 |
Maxime Bizon <mbizon@freebox.fr> |
MIPS: BCM63XX: Add external irq support for non 6348 CPUs.
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2899/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| f61cced99347783c1f3a7464e88b855a5ca6c227 |
|
04-Nov-2011 |
Maxime Bizon <mbizon@freebox.fr> |
MIPS: BCM63XX: Change irq code to prepare for per-cpu peculiarity.
No functionnal change is introduced by this patch.
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2894/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| d430b6c5e7b3a16ad3b4cd921b3a22b553f53ca2 |
|
04-Nov-2011 |
Maxime Bizon <mbizon@freebox.fr> |
MIPS: BCM63XX: Add more register sets & missing register definitions.
Needed for upcoming 6368 CPU support.
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2893/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| b29af676a2e11126e9bf9205c792faa81f775df0 |
|
08-Jun-2011 |
Jonas Gorski <jonas.gorski@gmail.com> |
MIPS: BCM63xx: Remove duplicate PERF_IRQSTAT_REG definition
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Cc: linux-mips@linux-mips.org
Acked-by: Florian Fainelli <florian@openwrt.org>
Patchwork: https://patchwork.linux-mips.org/patch/2461/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| e0e53dee69e07e9446eb16ceabd55a1116611696 |
|
27-Feb-2010 |
Ralf Baechle <ralf@linux-mips.org> |
MIPS: Nuke trailing blank lines
Recent git versions now warn about those and they've always been a bit of
an annoyance.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| e7300d04bd0809eb7ea10a2ed8c729459f816e36 |
|
18-Aug-2009 |
Maxime Bizon <mbizon@freebox.fr> |
MIPS: BCM63xx: Add support for the Broadcom BCM63xx family of SOCs.
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|