a36d8225bceba4b7be47ade34d175945f85cffbc |
|
28-May-2014 |
David Daney <david.daney@cavium.com> |
MIPS: OCTEON: Enable use of FPU Some versions of the assembler will not assemble CFC1 for OCTEON, so override the ISA for these. Add r4k_fpu.o to handle low level FPU initialization. Modify octeon_switch.S to save the FPU registers. And include r4k_switch.S to pick up more FPU support. Get rid of "#define cpu_has_fpu 0" Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com> Cc: linux-mips@linux-mips.org Cc: James Hogan <james.hogan@imgtec.com> Cc: kvm@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/7006/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
3179d37ee1ed602770a8b8ed975bd30faa85b4a3 |
|
14-Apr-2014 |
Paul Burton <paul.burton@imgtec.com> |
MIPS: pm-cps: add PM state entry code for CPS systems This patch adds code to generate entry & exit code for various low power states available on systems based around the MIPS Coherent Processing System architecture (ie. those with a Coherence Manager, Global Interrupt Controller & for >=CM2 a Cluster Power Controller). States supported are: - Non-coherent wait. This state first leaves the coherent domain and then executes a regular MIPS wait instruction. Power savings are found from the elimination of coherency interventions between the core and any other coherent requestors in the system. - Clock gated. This state leaves the coherent domain and then gates the clock input to the core. This removes all dynamic power from the core but leaves the core at the mercy of another to restart its clock. Register state is preserved, but the core can not service interrupts whilst its clock is gated. - Power gated. This deepest state removes all power input to the core. All register state is lost and the core will restart execution from its BEV when another core powers it back up. Because register state is lost this state requires cooperation with the CONFIG_MIPS_CPS SMP implementation in order for the core to exit the state successfully. The code will detect which states are available on the current system during boot & generate the entry/exit code for those states. This will be used by cpuidle & hotplug implementations. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
|
b633648c5ad3cfbda0b3daea50d2135d44899259 |
|
23-May-2014 |
Ralf Baechle <ralf@linux-mips.org> |
MIPS: MT: Remove SMTC support Nobody is maintaining SMTC anymore and there also seems to be no userbase. Which is a pity - the SMTC technology primarily developed by Kevin D. Kissell <kevink@paralogos.com> is an ingenious demonstration for the MT ASE's power and elegance. Based on Markos Chandras <Markos.Chandras@imgtec.com> patch https://patchwork.linux-mips.org/patch/6719/ which while very similar did no longer apply cleanly when I tried to merge it plus some additional post-SMTC cleanup - SMTC was a feature as tricky to remove as it was to merge once upon a time. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
b1d4c6cac02808b1d4e84d0187dc6014bffd2446 |
|
04-Mar-2014 |
James Hogan <james.hogan@imgtec.com> |
MIPS: PM: Add CPU PM callbacks for general CPU context Add a CPU power management notifier callback for preserving general CPU context. The CPU PM callbacks will be triggered by the powering down of CPU cores, for example by cpuidle drivers & in the future by suspend to RAM implementations. The current state preserved is mostly related to the process context: - FPU - DSP - ASID - UserLocal - Watch registers Signed-off-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
|
0ee958e102b62b418c2fb46c3439d4262067a5fc |
|
15-Jan-2014 |
Paul Burton <paul.burton@imgtec.com> |
MIPS: Coherent Processing System SMP implementation This patch introduces a new SMP implementation for systems implementing the MIPS Coherent Processing System architecture. The kernel will make use of the Coherence Manager, Cluster Power Controller & Global Interrupt Controller in order to detect, bring up & make use of other cores in the system. SMTC is not supported, so only a single TC per VPE in the system is used. That is, this option enables an SMVP style setup but across multiple cores. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6362/ Patchwork: https://patchwork.linux-mips.org/patch/6611/ Patchwork: https://patchwork.linux-mips.org/patch/6651/ Patchwork: https://patchwork.linux-mips.org/patch/6652/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
9c38cf44712af95a5ec3937d63faaea9b43eab9a |
|
15-Jan-2014 |
Paul Burton <paul.burton@imgtec.com> |
MIPS: Add CPC probe, access functions This patch introduces code to probe for a MIPS Cluster Power Controller & accessor functions to allow for easy register access. This support code will be used by a subsequent patch. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6361/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
9f98f3dd0c518d9de02aebe0c25712b17ab3358d |
|
15-Jan-2014 |
Paul Burton <paul.burton@imgtec.com> |
MIPS: Add generic CM probe & access code The kernel currently only probes for a MIPS Coherence Manager in the Malta interrupt code in order to detect & enable the GIC. However CM is not Malta-specific, so this should really be more generic. This patch introduces some non-Malta-specific code which probes for a CM and performs some basic initialisation. A new header, with temporarily duplicated register definitions, is introduced in order to: 1) Allow the new definitions to be correct with regards to the CM documentation, as many of those in gcmpregs.h aren't. 2) Allow switching away from the REG() macro used via a few layers of nested macros in order to access registers in gcmpregs.h. This patch instead introduced accessor functions akin to the {read,write}_c0_* functions used for cop0 registers. 3) Allow users of the CM to be migrated one by one. 4) Switch from the name 'GCMP' to 'CM' since the Coherence Manager is what this code is actually dealing with. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6360/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
72e20142b2bf4cf1c3071e6cf49d01f55f2e1e53 |
|
15-Jan-2014 |
Paul Burton <paul.burton@imgtec.com> |
MIPS: Move GIC IPI functions out of smp-cmp.c The GIC IPI functions aren't necessarily specific to the "CMP framework" SMP implementation, and will be used elsewhere in a subsequent commit. This patch adds cleaned up GIC IPI functions to a separate file which is compiled when a new CONFIG_MIPS_GIC_IPI Kconfig symbol is selected, and selects that symbol for CONFIG_MIPS_CMP. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6359/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
da615cf603e209fdf2e5917d84e070b34dd8daa1 |
|
01-Jan-2014 |
Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> |
MIPS: APRP: Add RTLX API support for CMP platforms. This patch adds RTLX API support for platforms having a CMP. Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Reviewed-by: Qais Yousef <Qais.Yousef@imgtec.com> Patchwork: http://patchwork.linux-mips.org/patch/6095/ Reviewed-by: John Crispin <blogic@openwrt.org>
|
2c973ef0cc3f981bfb137c3e42e08de5e8f1cc18 |
|
01-Jan-2014 |
Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> |
MIPS: APRP: Split RTLX support into separate files. Split the RTLX functionality in preparation for adding support for CMP platforms. Common functions remain in the original file and a new file contains code specific to platforms that do not have a CMP. Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Reviewed-by: Qais Yousef <Qais.Yousef@imgtec.com> Patchwork: http://patchwork.linux-mips.org/patch/6093/ Reviewed-by: John Crispin <blogic@openwrt.org>
|
17a1d523aa5826dec25f2362e1630be365167bda |
|
30-Oct-2013 |
Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> |
MIPS: APRP: Add VPE loader support for CMP platforms. This patch adds VPE loader support for platforms having a CMP. Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Reviewed-by: Qais Yousef <Qais.Yousef@imgtec.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6092/
|
1a2a6d7e8816ed2b2679a0c4f7ba4019cd31dd62 |
|
30-Oct-2013 |
Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> |
MIPS: APRP: Split VPE loader into separate files. Split the VPE functionality in preparation for adding support for CMP platforms. Common functions remain in the original file and a new file contains code specific to platforms that do not have a CMP present. Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Reviewed-by: Qais Yousef <Qais.Yousef@imgtec.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6094/
|
29f9087c52d19067a1eccfd5c0a4a0045cf3ea04 |
|
14-Nov-2013 |
Steven J. Hill <Steven.Hill@imgtec.com> |
MIPS: Add debugfs file to print the segmentation control registers Add a new mips/segments debugfs file to print the 6 segmentation control registers for supported cores. A sample from a proAptiv core is given below: Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6137/ Segment Virtual Size Access Mode Physical Caching EU ------- ------- ---- ----------- -------- ------- -- 0 e0000000 512M MK UND U 0 1 c0000000 512M MSK UND U 0 2 a0000000 512M UK 000 2 0 3 80000000 512M UK 000 3 0 4 40000000 1G MUSK UND U 1 5 00000000 1G MUSK UND U 1 Reviewed-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
|
a6e95a86e02e4a60b4355c84d19dba2baf3d87ba |
|
26-Sep-2013 |
Ralf Baechle <ralf@linux-mips.org> |
MIPS: PowerTV: Remove support code. Nobody seems to care about this platform anymore and my attempts to find somebody willing to provide some tlc for PowerTV have failed so far. So let's nuke the bloody thing. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/5910/
|
19e2e172f0ed2552793ecef506b00c3fa3421845 |
|
13-Jul-2012 |
Ralf Baechle <ralf@linux-mips.org> |
MIPS: Provide arch_syscall_addr. The generic version is wrong for MIPS. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
7cd93b893567906d9c9e9e1121667600b4cebbaf |
|
08-Feb-2010 |
Yoichi Yuasa <yuasa@linux-mips.org> |
MIPS: Add 8250/16550 serial early printk driver Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/947/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
49f2ec91e14ce9bb20fdac88a38243129f3261c3 |
|
21-May-2013 |
Ralf Baechle <ralf@linux-mips.org> |
MIPS: Consolidate idle loop / WAIT instruction support in a single file. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
0ab2b7d08ea7226dc72ff0f8c05f470566facf7c |
|
10-Apr-2013 |
Raghu Gandham <Raghu.Gandham@imgtec.com> |
MIPS: Add new GIC clockevent driver. Add new clockevent driver that uses the counter present on the MIPS Global Interrupt Controller. Signed-off-by: Raghu Gandham <Raghu.Gandham@imgtec.com> Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
|
dfa762e1c31c30607e4e5259f287dd3e174cbcc3 |
|
10-Apr-2013 |
Steven J. Hill <Steven.Hill@imgtec.com> |
MIPS: Refactor GIC clocksource code. Reorganize some of the GIC clocksource driver code. Below is a list of the various changes. * No longer select CSRC_GIC by default for Malta platform. * Limit choice for either the GIC or R4K clocksource, not both. * Change location in Makefile. * Created new 'gic_read_count' function in common 'irq-gic.c' file. * Change 'git_hpt_read' function in 'csrc-gic.c' to use new function. * Surround GIC specific code in Malta platform code with #ifdef's. * Only initialize the GIC clocksource if it was selected. Original code called it unconditionally if a GIC was found. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
|
9169a5d01114c930a0494f9160da8c334d71680d |
|
11-Apr-2013 |
John Crispin <blogic@openwrt.org> |
MIPS: move mips_{set,get}_machine_name() to a more generic place Previously this functionality was only available to users of the mips_machine api. Moving the code to prom.c allows us to also add a OF wrapper. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5164/
|
7a9989356b23fa2c7731632d3b575c53c1ac8bce |
|
04-Apr-2013 |
Viresh Kumar <viresh.kumar@linaro.org> |
cpufreq: mips: move cpufreq driver to drivers/cpufreq This patch moves cpufreq driver of MIPS architecture to drivers/cpufreq. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: John Crispin <blogic@openwrt.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
63c2b6812f1dc0beda4d6adad0365e048aa693e2 |
|
18-Mar-2013 |
Florian Fainelli <florian@openwrt.org> |
MIPS: Fix code generation for non-DSP capable CPUs Commit 32a7ede (MIPS: dsp: Add assembler support for DSP ASEs) has enabled the use of DSP ASE specific instructions such as rddsp and wrdsp under the idea that all code path that will make use of these two instructions are properly checking for cpu_has_dsp to ensure that the particular CPU we are running on *actually* supports DSP ASE. This commit actually causes the following oops on QEMU Malta emulating a MIPS 24Kc without the DSP ASE implemented: [ 7.960000] Reserved instruction in kernel [ 7.960000] Cpu 0 [ 7.960000] $ 0 : 00000000 00000000 00000014 00000005 [ 7.960000] $ 4 : 8fc2de48 00000001 00000000 8f59ddb0 [ 7.960000] $ 8 : 8f5ceec4 00000018 00000c00 00800000 [ 7.960000] $12 : 00000100 00000200 00000000 00457b84 [ 7.960000] $16 : 00000000 8fc2ba78 8f4ec980 00000001 [ 7.960000] $20 : 80418f90 00000000 00000000 000002dd [ 7.960000] $24 : 0000009c 7730d7b8 [ 7.960000] $28 : 8f59c000 8f59dd38 00000001 80104248 [ 7.960000] Hi : 0000001d [ 7.960000] Lo : 0000000b [ 7.960000] epc : 801041ec thread_saved_pc+0x2c/0x38 [ 7.960000] Not tainted [ 7.960000] ra : 80104248 get_wchan+0x48/0xac [ 7.960000] Status: 1000b703 KERNEL EXL IE [ 7.960000] Cause : 10800028 [ 7.960000] PrId : 00019300 (MIPS 24Kc) [ 7.960000] Modules linked in: [ 7.960000] Process killall (pid: 1574, threadinfo=8f59c000, task=8fd14558, tls=773aa440) [ 7.960000] Stack : 8fc2ba78 8012b008 0000000c 0000001d 00000000 00000000 8f58a380 8f58a380 8fc2ba78 80202668 8f59de78 8f468600 8f59de28 801b2a3c 8f59df00 8f98ba20 74696e69 8f468600 8f59de28 801b7308 0081c007 00000000 00000000 00000000 00000000 00000000 00000000 00000000 8fc2bbb4 00000001 0000001d 0000000b 77f038cc 7fe80648 ffffffff ffffffff 00000000 00000001 0016e000 00000000 ... [ 7.960000] Call Trace: [ 7.960000] [<801041ec>] thread_saved_pc+0x2c/0x38 [ 7.960000] [<80104248>] get_wchan+0x48/0xac The disassembly of thread_saved_pc points to the following: 000006d0 <thread_saved_pc>: 6d0: 8c820208 lw v0,520(a0) 6d4: 3c030000 lui v1,0x0 6d8: 24630000 addiu v1,v1,0 6dc: 10430008 beq v0,v1,700 <thread_saved_pc+0x30> 6e0: 00000000 nop 6e4: 3c020000 lui v0,0x0 6e8: 8c43000c lw v1,12(v0) 6ec: 04620004 bltzl v1,700 <thread_saved_pc+0x30> 6f0: 00001021 move v0,zero 6f4: 8c840200 lw a0,512(a0) 6f8: 00031080 sll v0,v1,0x2 6fc: 7c44100a lwx v0,a0(v0) <------------ 700: 03e00008 jr ra 704: 00000000 nop If we specifically disable -mdsp/-mdspr2 for arch/mips/kernel/process.o, we get the following (non-crashing) assembly: 00000708 <thread_saved_pc>: 708: 8c820208 lw v0,520(a0) 70c: 3c030000 lui v1,0x0 710: 24630000 addiu v1,v1,0 714: 10430009 beq v0,v1,73c <thread_saved_pc+0x34> 718: 00000000 nop 71c: 3c020000 lui v0,0x0 720: 8c42000c lw v0,12(v0) 724: 04420005 bltzl v0,73c <thread_saved_pc+0x34> 728: 00001021 move v0,zero 72c: 8c830200 lw v1,512(a0) 730: 00021080 sll v0,v0,0x2 734: 00431021 addu v0,v0,v1 738: 8c420000 lw v0,0(v0) 73c: 03e00008 jr ra 740: 00000000 nop The specific line that leads a different assembly being produced is: unsigned long thread_saved_pc(struct task_struct *tsk) ... return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset]; <--- The problem here is that the compiler was given the right to use DSP instructions with the -mdsp / -mdspr2 command-line switches and performed some optimization for us and used DSP ASE instructions where we are not checking that the running CPU actually supports DSP ASE. This patch fixes the issue by partially reverting commit 32a7ede for arch/mips/kernel/Makefile in order to remove the -mdsp / -mdspr2 compiler command-line switches such that we are now guaranteed that the compiler will not optimize using DSP ASE reserved instructions. We also need to fixup the rddsp/wrdsp and m{t,h}{hi,lo}{0,1,2,3} macros in arch/mips/include/asm/mipsregs.h to tell the assembler that we are going to explicitely use DSP ASE reserved instructions. The comment in arch/mips/kernel/Makefile is also updated to reflect that. Signed-off-by: Florian Fainelli <florian@openwrt.org> Acked-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: blogic@openwrt.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
778eeb1b199b85bec79b49ac483b013e270636ea |
|
07-Dec-2012 |
Steven J. Hill <sjhill@mips.com> |
MIPS: Add new GIC clocksource. Add new clocksource that uses the counter present on the MIPS Global Interrupt Controller. Signed-off-by: Steven J. Hill <sjhill@mips.com> Patchwork: http://patchwork.linux-mips.org/patch/4681/ Signed-off-by: John Crispin <blogic@openwrt.org>
|
32a7ede673cd0be580f24d855099a8a5f195e80c |
|
03-Jan-2013 |
Steven J. Hill <sjhill@mips.com> |
MIPS: dsp: Add assembler support for DSP ASEs. Newer toolchains support the DSP and DSP Rev2 instructions. This patch performs a check for that support and adds compiler and assembler flags for only the files that need use those instructions. Signed-off-by: Steven J. Hill <sjhill@mips.com> Acked-by: Florian Fainelli <florian@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4752/ Signed-off-by: John Crispin <blogic@openwrt.org>
|
7034228792cc561e79ff8600f02884bd4c80e287 |
|
22-Jan-2013 |
Ralf Baechle <ralf@linux-mips.org> |
MIPS: Whitespace cleanup. Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
bdf20507da11a9a5b32ef04fa09f352828189aef |
|
11-Dec-2012 |
Ralf Baechle <ralf@linux-mips.org> |
MIPS: PMC-Sierra Yosemite: Remove support. Nobody seems to be interested anymore and upstream also never had an ethernet driver. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
f772cdb2bd544eeb3e83a8bb42629d155c1b53fd |
|
30-Nov-2012 |
Ralf Baechle <ralf@linux-mips.org> |
MIPS: Remove usage of CEVT_R4K_LIB config option. Manuel Lauss <manuel.lauss@gmail.com> writes: I introduced it as a fallback because early revisions of Alchemy hardware we shipped had a non-functional 32kHz timer and had to rely on the r4k timer instead. Previously the r4k timer was initialized regardless, but it's useless with the "wait" instruction. So long story short: I need either the on-chip 32kHz timer OR the r4k timer if the 32kHz one is unusable, but not both, and r4k timer is useless when au1k_idle is in use. The current in-kernel Alchemy boards all work with the 32kHz timer, so I'm not against removing R4K_LIB symbols. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
d7ea335c05ba7c013615d1e0d5a71459eb4195e8 |
|
15-Nov-2012 |
Steven J. Hill <sjhill@mips.com> |
MIPS: Remove usage of CSRC_R4K_LIB config option. Manuel Lauss <manuel.lauss@gmail.com> writes: I introduced it as a fallback because early revisions of Alchemy hardware we shipped had a non-functional 32kHz timer and had to rely on the r4k timer instead. Previously the r4k timer was initialized regardless, but it's useless with the "wait" instruction. So long story short: I need either the on-chip 32kHz timer OR the r4k timer if the 32kHz one is unusable, but not both, and r4k timer is useless when au1k_idle is in use. The current in-kernel Alchemy boards all work with the 32kHz timer, so I'm not against removing R4K_LIB symbols. Signed-off-by: Steven J. Hill <sjhill@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
7aa1c8f47e7e792d11f898cbdddaf6fa21ff08cc |
|
11-Oct-2012 |
Ralf Baechle <ralf@linux-mips.org> |
MIPS: kdump: Add support [ralf@linux-mips.org: Original patch by Maxim Uvarov <muvarov@gmail.com> with plenty of further shining, polishing, debugging and testing by me.] Signed-off-by: Maxim Uvarov <muvarov@gmail.com> Cc: linux-mips@linux-mips.org Cc: kexec@lists.infradead.org Cc: horms@verge.net.au Patchwork: https://patchwork.linux-mips.org/patch/1025/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
2551aebc670073530d15ee249c6e41afda82a98b |
|
11-Oct-2012 |
Ralf Baechle <ralf@linux-mips.org> |
MIPS: MT: Remove kspd. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
b1e0d8b70fa31821ebca3965f2ef8619d7c5e316 |
|
02-Oct-2012 |
Jean Delvare <jdelvare@suse.de> |
kbuild: Fix gcc -x syntax The correct syntax for gcc -x is "gcc -x assembler", not "gcc -xassembler". Even though the latter happens to work, the former is what is documented in the manual page and thus what gcc wrappers such as icecream do expect. This isn't a cosmetic change. The missing space prevents icecream from recognizing compilation tasks it can't handle, leading to silent kernel miscompilations. Besides me, credits go to Michael Matz and Dirk Mueller for investigating the miscompilation issue and tracking it down to this incorrect -x parameter syntax. Signed-off-by: Jean Delvare <jdelvare@suse.de> Acked-by: Ingo Molnar <mingo@kernel.org> Cc: stable@vger.kernel.org Cc: Bernhard Walle <bernhard@bwalle.de> Cc: Michal Marek <mmarek@suse.cz> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Michal Marek <mmarek@suse.cz>
|
786d35d45cc40b2a51a18f73e14e135d47fdced7 |
|
28-Sep-2012 |
David Howells <dhowells@redhat.com> |
Make most arch asm/module.h files use asm-generic/module.h Use the mapping of Elf_[SPE]hdr, Elf_Addr, Elf_Sym, Elf_Dyn, Elf_Rel/Rela, ELF_R_TYPE() and ELF_R_SYM() to either the 32-bit version or the 64-bit version into asm-generic/module.h for all arches bar MIPS. Also, use the generic definition mod_arch_specific where possible. To this end, I've defined three new config bools: (*) HAVE_MOD_ARCH_SPECIFIC Arches define this if they don't want to use the empty generic mod_arch_specific struct. (*) MODULES_USE_ELF_RELA Arches define this if their modules can contain RELA records. This causes the Elf_Rela mapping to be emitted and allows apply_relocate_add() to be defined by the arch rather than have the core emit an error message. (*) MODULES_USE_ELF_REL Arches define this if their modules can contain REL records. This causes the Elf_Rel mapping to be emitted and allows apply_relocate() to be defined by the arch rather than have the core emit an error message. Note that it is possible to allow both REL and RELA records: m68k and mips are two arches that do this. With this, some arch asm/module.h files can be deleted entirely and replaced with a generic-y marker in the arch Kbuild file. Additionally, I have removed the bits from m32r and score that handle the unsupported type of relocation record as that's now handled centrally. Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
|
6ede81239e31cfacbb1e2d260530cd80d13cf0db |
|
14-Aug-2012 |
Ralf Baechle <ralf@linux-mips.org> |
MIPS: Fix module.c build for 32 bit Fixes build failure introduced by "Make most arch asm/module.h files use asm-generic/module.h" by moving all the RELA processing code to a separate file to be used only for RELA processing on 64-bit kernels. CC arch/mips/kernel/module.o arch/mips/kernel/module.c:250:14: error: 'reloc_handlers_rela' defined but not used [-Werror=unused-variable] cc1: all warnings being treated as errors make[6]: *** [arch/mips/kernel/module.o] Error 1 Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
|
91405eb69ee007ee854aa917e2a15e6ccede2cd1 |
|
31-Jan-2012 |
Florian Fainelli <florian@openwrt.org> |
MIPS: introduce CPU_R4K_FPU R4K-style CPUs have this boolean defined by default. Allows us to remove some lines in arch/mips/kernel/Makefile. Signed-off-by: Florian Fainelli <florian@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/3330/ Signed-off-by: John Crispin <blogic@openwrt.org>
|
957b369c3d35d73e1d0c3e9d21db791e58984cbb |
|
03-May-2012 |
Thomas Gleixner <tglx@linutronix.de> |
mips: Use generic init_task Same code. Use the generic version. The special Makefile treatment is pointless anyway as init_task.o contains only data which is handled by the linker script. So no point on being treated like head text. Make the linker script align the task on THREAD_SIZE and not on PAGE_SIZE, as PAGE_SIZE might be smaller than THREAD_SIZE. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Ralf Baechle <ralf@linux-mips.org> Link: http://lkml.kernel.org/r/20120503085034.941344764@linutronix.de
|
1c773ea4dceff889c2f872343609a87ae0cfbf56 |
|
16-Nov-2011 |
Jayachandran C <jayachandranc@netlogicmicro.com> |
MIPS: Netlogic: Add XLP makefiles and config - Add CPU_XLP and NLM_XLR_BOARD to arch/mips/Kconfig for Netlogic XLP boards - Update mips Makefiles to add XLP Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2968/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
df0ac8a406718360aa08e632a73a805a6cc4cb27 |
|
16-Nov-2011 |
Kevin Cernekee <cernekee@gmail.com> |
MIPS: BMIPS: Add SMP support code for BMIPS43xx/BMIPS5000 Initial commit of BMIPS SMP support code. Smoke-tested on a variety of BMIPS4350, BMIPS4380, and BMIPS5000 platforms. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2977/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
e5dcb58aa51090f462959b9789eb477286bd2279 |
|
24-Sep-2011 |
David Daney <david.daney@cavium.com> |
MIPS: perf: Reorganize contents of perf support files. The contents of arch/mips/kernel/perf_event.c and arch/mips/kernel/perf_event_mipsxx.c were divided in a seemingly ad hoc manner, with the first including the second. I moved all the hardware counter support code to perf_event_mipsxx.c and removed the gating #ifdefs to the Kconfig and Makefile. Now perf_event.c contains only the callchain support, everything else is in perf_event_mipsxx.c There are no code changes, only moving of functions from one file to the other, or removing empty unneeded functions. Signed-off-by: David Daney <david.daney@cavium.com> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Paul Mackerras <paulus@samba.org> Cc: Ingo Molnar <mingo@elte.hu> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Dezhong Diao <dediao@cisco.com> Cc: Gabor Juhos <juhosg@openwrt.org> Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2791/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
7f058e852b229ec77b37676b2b78baf2e78ffee8 |
|
06-May-2011 |
Jayachandran C <jayachandranc@netlogicmicro.com> |
MIPS: Kconfig and Makefile update for Netlogic XLR/XLS Add NLM_XLR_BOARD, CPU_XLR and other config options Makefile updates, mostly based on r4k Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2334/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
94bb0c1ab293c298a8852e4f10c4215bad6daa9b |
|
28-Dec-2010 |
David Daney <ddaney@caviumnetworks.com> |
MIPS: jump label: Add MIPS support. In order not to be left behind, we add jump label support for MIPS. Tested on 64-bit big endian (Octeon), and 32-bit little endian (malta/qemu). Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Jason Baron <jbaron@redhat.com> Patchwork: https://patchwork.linux-mips.org/patch/1923/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
487d70d0b8bd1c70d099a7526077ffefee412050 |
|
23-Nov-2010 |
Gabor Juhos <juhosg@openwrt.org> |
MIPS: Add generic support for multiple machines within a single kernel This patch adds a generic solution to support multiple machines based on a given SoC within a single kernel image. It is implemented already for several other architectures but MIPS has no generic support for that yet. [Ralf: This competes with DT but DT is a much more complex solution and this code has been used by OpenWRT for a long time so for now DT is a bad reason to stop the merge but longer term this should be migrated to DT.] Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: kaloz@openwrt.org Cc: Luis R. Rodriguez <lrodriguez@atheros.com> Cc: Cliff Holden <Cliff.Holden@Atheros.com> Patchwork: https://patchwork.linux-mips.org/patch/1814/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
14f7001284185bffeb796a181664906f7160f593 |
|
12-Oct-2010 |
Deng-Cheng Zhu <dengcheng.zhu@gmail.com> |
MIPS: add support for hardware performance events (skeleton) This patch provides the skeleton of the HW perf event support. To enable this feature, we can not choose the SMTC kernel; Oprofile should be disabled; kernel performance events be selected. Then we can enable it in Kernel type menu. Oprofile for MIPS platforms initializes irq at arch init time. Currently we do not change this logic to allow PMU reservation. If a platform has EIC, we can use the irq base and perf counter irq offset defines for the interrupt controller in specific init_hw_perf_events(). Based on this skeleton patch, the 3 different kinds of MIPS PMU, namely, mipsxx/loongson2/rm9000, can be supported by adding corresponding lower level C files at the bottom. The suggested names of these files are perf_event_mipsxx.c/perf_event_loongson2.c/perf_event_rm9000.c. So, for example, we can do this by adding "#include perf_event_mipsxx.c" at the bottom of perf_event.c. In addition, PMUs with 64bit counters are also considered in this patch. Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@gmail.com> To: linux-mips@linux-mips.org Cc: a.p.zijlstra@chello.nl Cc: paulus@samba.org Cc: mingo@elte.hu Cc: acme@redhat.com Cc: jamie.iles@picochip.com Cc: ddaney@caviumnetworks.com Cc: matt@console-pimps.org Patchwork: https://patchwork.linux-mips.org/patch/1688/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
f2ffa5ab74f4dfd598860f96ca37a71c4d0a28a8 |
|
13-Oct-2010 |
Dezhong Diao <dediao@cisco.com> |
of/mips: Add device tree support to MIPS Add the ability to enable CONFIG_OF on the MIPS architecture. Signed-off-by: Dezhong Diao <dediao@cisco.com> [grant.likely@secretlab.ca: cleared out obsolete hooks, removed ARCH_HAS_DEVTREE_MEM, remove __init tags from header file, removed debugfs support hunk] [ddaney@linux-mips.org: backed out over aggressive trimming of hooks] Acked-by: Ralf Baechle <ralf@linux-mips.org> Tested-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
|
c1bf207d6ee1eb72e9c10365edbdc7c9ff7fb9b0 |
|
03-Aug-2010 |
David Daney <ddaney@caviumnetworks.com> |
MIPS: kprobe: Add support. This patch is based on previous work by Sony and Himanshu Chauhan. I have done some cleanup and implemented JProbes and KRETPROBES. The KRETPROBES part is pretty much copied verbatim from powerpc. A possible future enhance might be to factor out the common code. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: Himanshu Chauhan <hschauhan@nulltrace.org> To: linux-mips@linux-mips.org To: ananth@in.ibm.com, To: anil.s.keshavamurthy@intel.com To: davem@davemloft.net To: masami.hiramatsu.pt@hitachi.com Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1525/ Patchwork: https://patchwork.linux-mips.org/patch/1530/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
66f9ba101f54bda63ab1db97f9e9e94763d0651b |
|
30-May-2010 |
Sam Ravnborg <sam@ravnborg.org> |
MIPS: Add -Werror to arch/mips/Kbuild Adding subdirs-ccflags-y := -Werror to arch/mips/Kbuild let us in one go cover all files with -Werror. In addition this allows us to remove the individual -Werror definition in various Makefile. Adding the definition to Kbuild as a recursive option help us not to forget to do so. With this change we now compile arch/mips/kernel/cpufreq with -Werror One drawback: When specifying a subdirectory covered by the Kbuild file like this: make arch/mips/kernel/ then kbuild fails to pick up the -Werror definition. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> To: linux-mips <linux-mips@linux-mips.org> To: Wu Zhangjin <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/1301/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
c52d0d30aef84aa8893b34e5254716c8ab5c4472 |
|
19-Feb-2010 |
David Daney <ddaney@caviumnetworks.com> |
MIPS: Preliminary VDSO This is a preliminary patch to add a vdso to all user processes. Still missing are ELF headers and .eh_frame information. But it is enough to allow us to move signal trampolines off of the stack. Note that emulation of branch delay slots in the FPU emulator still requires the stack. We allocate a single page (the vdso) and write all possible signal trampolines into it. The stack is moved down by one page and the vdso is mapped into this space. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/975/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
bba90760582d2563b28a4738fb785185a59e9e71 |
|
17-Feb-2010 |
David Daney <ddaney@caviumnetworks.com> |
MIPS: Crazy spinlock speed test. This is just a test program for raw_spinlocks. The main reason I wrote it is to validate my spinlock changes that I sent in a previous patch. To use it enable CONFIG_DEBUG_FS and CONFIG_SPINLOCK_TEST then at run time do: # mount -t debugfs none /sys/kernel/debug/ # cat /sys/kernel/debug/mips/spin_single # cat /sys/kernel/debug/mips/spin_multi On my 600MHz octeon cn5860 (16 CPUs) I get spin_single spin_multi base 106885 247941 spinlock_patch 75194 219465 This shows that for uncontended locks the spinlock patch gives 41% improvement and for contended locks 12% improvement (1/time). Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/969/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
cf72e9470dc071c395f7895b5cb9418dca27d07d |
|
17-Dec-2009 |
Ralf Baechle <ralf@linux-mips.org> |
MIPS: Cleanup random differences beween lmo and Linus' kernel. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
538f19526e40ce7a5a296fad6a3121409c890adc |
|
20-Nov-2009 |
Wu Zhangjin <wuzhangjin@gmail.com> |
MIPS: Tracing: Add dynamic function tracer support With dynamic function tracer, by default, _mcount is defined as an "empty" function, it returns directly without any more action . When enabling it in user-space, it will jump to a real tracing function(ftrace_caller), and do the real job for us. Differ from the static function tracer, dynamic function tracer provides two functions ftrace_make_call()/ftrace_make_nop() to enable/disable the tracing of some indicated kernel functions(set_ftrace_filter). In the -v4 version, the implementation of this support is basically the same as X86 version does: _mcount is implemented as an empty function and ftrace_caller is implemented as a real tracing function respectively. But in this version, to support module tracing with the help of -mlong-calls in arch/mips/Makefile: MODFLAGS += -mlong-calls. The stuff becomes a little more complex. We need to cope with two different type of calling to _mcount. For the kernel part, the calling to _mcount(result of "objdump -hdr vmlinux"). is like this: 108: 03e0082d move at,ra 10c: 0c000000 jal 0 <fpcsr_pending> 10c: R_MIPS_26 _mcount 10c: R_MIPS_NONE *ABS* 10c: R_MIPS_NONE *ABS* 110: 00020021 nop For the module with -mlong-calls, it looks like this: c: 3c030000 lui v1,0x0 c: R_MIPS_HI16 _mcount c: R_MIPS_NONE *ABS* c: R_MIPS_NONE *ABS* 10: 64630000 daddiu v1,v1,0 10: R_MIPS_LO16 _mcount 10: R_MIPS_NONE *ABS* 10: R_MIPS_NONE *ABS* 14: 03e0082d move at,ra 18: 0060f809 jalr v1 In the kernel version, there is only one "_mcount" string for every kernel function, so, we just need to match this one in mcount_regex of scripts/recordmcount.pl, but in the module version, we need to choose one of the two to match. Herein, I choose the first one with "R_MIPS_HI16 _mcount". and In the kernel verion, without module tracing support, we just need to replace "jal _mcount" by "jal ftrace_caller" to do real tracing, and filter the tracing of some kernel functions via replacing it by a nop instruction. but as we have described before, the instruction "jal ftrace_caller" only left 32bit length for the address of ftrace_caller, it will fail when calling from the module space. so, herein, we must replace something else. the basic idea is loading the address of ftrace_caller to v1 via changing these two instructions: lui v1,0x0 addiu v1,v1,0 If we want to enable the tracing, we need to replace the above instructions to: lui v1, HI_16BIT_ftrace_caller addiu v1, v1, LOW_16BIT_ftrace_caller If we want to stop the tracing of the indicated kernel functions, we just need to replace the "jalr v1" to a nop instruction. but we need to replace two instructions and encode the above two instructions oursevles. Is there a simpler solution? Yes! Here it is, in this version, we put _mcount and ftrace_caller together, which means the address of _mcount and ftrace_caller is the same: _mcount: ftrace_caller: j ftrace_stub nop ...(do real tracing here)... ftrace_stub: jr ra move ra, at By default, the kernel functions call _mcount, and then jump to ftrace_stub and return. and when we want to do real tracing, we just need to remove that "j ftrace_stub", and it will run through the two "nop" instructions and then do the real tracing job. what about filtering job? we just need to do this: lui v1, hi_16bit_of_mcount <--> b 1f (0x10000004) addiu v1, v1, low_16bit_of_mcount move at, ra jalr v1 nop 1f: (rec->ip + 12) In linux-mips64, there will be some local symbols, whose name are prefixed by $L, which need to be filtered. thanks goes to Steven for writing the mips64-specific function_regex. In a conclusion, with RISC, things becomes easier with such a "stupid" trick, RISC is something like K.I.S.S, and also, there are lots of "simple" tricks in the whole ftrace support, thanks goes to Steven and the other folks for providing such a wonderful tracing framework! Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Nicholas Mc Guire <der.herr@hofr.at> Cc: zhangfx@lemote.com Cc: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/675/ Acked-by: Steven Rostedt <rostedt@goodmis.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
d2bb0762993e11363d8343127516b8fe88f9006f |
|
20-Nov-2009 |
Wu Zhangjin <wuzhangjin@gmail.com> |
MIPS: Tracing: Add static function tracer support for MIPS If -pg of gcc is enabled with CONFIG_FUNCTION_TRACER=y. a calling to _mcount will be inserted into each kernel function. so, there is a possibility to trace the kernel functions in _mcount. This patch add the MIPS specific _mcount support for static function tracing. by default, ftrace_trace_function is initialized as ftrace_stub(an empty function), so, the default _mcount will introduce very little overhead. after enabling ftrace in user-space, it will jump to a real tracing function and do static function tracing for us. and -ffunction-sections is incompatible with -pg, so, disable it when ftracer is enabled. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Reviewed-by: Steven Rostedt <rostedt@goodmis.org> Cc: Nicholas Mc Guire <der.herr@hofr.at> Cc: zhangfx@lemote.com Cc: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/672/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
f8ede0f700f5478851f242f291d203cde54ca6cf |
|
16-Nov-2009 |
Wu Zhangjin <wuzhangjin@gmail.com> |
MIPS: Loongson 2F: Add CPU frequency scaling support Loongson 2F supports CPU clock scaling. When put it into wait mode by setting the frequency as ZERO it will stay in this mode until an external interrupt wakes the CPU again. To enable clock scaling support, an external timer of a known stable rate is required. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: cpufreq@vger.kernel.org, Cc: Dave Jones <davej@redhat.com>, Cc: Dominik Brodowski <linux@dominikbrodowski.net>, Cc: yanh@lemote.com Cc: huhb@lemote.com, Patchwork: http://patchwork.linux-mips.org/patch/660/ Patchwork: http://patchwork.linux-mips.org/patch/751/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
a3a0f8c8ed2e2470f4dcd6da95020d41fed84747 |
|
31-Aug-2009 |
David VomLehn <dvomlehn@cisco.com> |
MIPS: PowerTV: Base files for Cisco PowerTV platform Add the Cisco Powertv cable settop box to the MIPS tree. This platform is based on a MIPS 24Kc processor with various devices integrated on the same ASIC. There are multiple models of this box, with differing configuration but the same kernel runs across the product line. Signed-off-by: David VomLehn <dvomlehn@cisco.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/132/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
d71789b6fa37c21ce5eb588d279f57904a62e7e2 |
|
24-Sep-2009 |
Manuel Lauss <manuel.lauss@gmail.com> |
mips: fix build of vmlinux.lds Commit 51b563fc93c8cb5bff1d67a0a71c374e4a4ea049 ("arm, cris, mips, sparc, powerpc, um, xtensa: fix build with bash 4.0") removed a few CPPFLAGS with vital include paths necessary to build vmlinux.lds on MIPS, and moved the calculation of the 'jiffies' symbol directly to vmlinux.lds.S but forgot to change make ifdef/... to cpp macros. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> [sam: moved assignment of CPPFLAGS arch/mips/kernel/Makefile] Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Acked-by: Dmitri Vorobiev <dmitri.vorobiev@movial.com>
|
779e7d41ad004946603da139da99ba775f74cb1c |
|
21-Dec-2008 |
Manuel Lauss <mano@roarinelk.homelinux.net> |
MIPS: make cp0 counter clocksource/event usable as fallback. The current mips clock build infrastructure lets a system only use either the MIPS cp0 counter or a SoC specific timer as a clocksource / clockevent device. This patch renames the core cp0 counter clocksource / clockevent functions from mips_* to r4k_* and updates the wrappers in asm-mips/time.h to call these renamed functions instead. Chips which can detect whether it is safe to use a chip-specific timer can now fall back on the cp0 counter if necessary and possible (e.g. Alchemy with a follow-on patch). Existing behaviour is not changed in any way. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
7e69deb83c9fffe75e8ea17fb40a63375e56ac9f |
|
12-Dec-2008 |
David Daney <ddaney@caviumnetworks.com> |
MIPS: Hook up Cavium OCTEON in arch/mips. Take all the OCTEON specific files that were added, and hook them into the build system for the arch/mips. For versions of GCC that lack OCTEON support, override gas target architecture. Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
542c1020ac1cbc2f50934086ad893384a2cbd233 |
|
23-Oct-2008 |
Shinya Kuribayashi <skuribay@ruby.dti.ne.jp> |
MIPS: Add CONFIG_CPU_R5500 for NEC VR5500 series processors We already have sufficient infrastructure to support VR5500 and VR5500A series processors. Here's a Makefile support to make it selectable by ports, and enable it for NEC EMMA2RH Markeins board. This patch also fixes a confused target help, and adds 1Gb PageMask bits supported by VR5500 and its variants. Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
6aa3524c182c01b8b8b7c21c4da20c742a9b4d86 |
|
23-Sep-2008 |
David Daney <ddaney@avtrex.com> |
MIPS: Add HARDWARE_WATCHPOINTS definitions and support code. This is the main support code for the patch. Here we just add the code, the following patches hook it up. Signed-off-by: David Daney <ddaney@avtrex.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> create mode 100644 arch/mips/include/asm/watch.h create mode 100644 arch/mips/kernel/watch.c
|
8531a35e5e275b17c57c39b7911bc2b37025f28c |
|
09-Sep-2008 |
Kevin D. Kissell <kevink@paralogos.com> |
[MIPS] SMTC: Fix SMTC dyntick support. Rework of SMTC support to make it work with the new clock event system, allowing "tickless" operation, and to make it compatible with the use of the "wait_irqoff" idle loop. The new clocking scheme means that the previously optional IPI instant replay mechanism is now required, and has been made more robust. Signed-off-by: Kevin D. Kissell <kevink@paralogos.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
8854700115ecf8aa6f087aa915b7b6cf18090d39 |
|
29-Jul-2008 |
Jason Wessel <jason.wessel@windriver.com> |
[MIPS] kgdb: add arch support for the kernel's kgdb core The new kgdb architecture specific handler registers and unregisters dynamically for exceptions depending on when you configure a kgdb I/O driver. Aside from initializing the exceptions earlier in the boot process, kgdb should have no impact on a device when it is compiled in so long as an I/O module is not configured for use. There have been quite a number of contributors during the existence of this patch (see arch/mips/kernel/kgdb.c). Most recently Jason re-wrote the mips kgdb logic to use the die notification handlers. Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
8d60a903d986ffa26c41f0092320a3b9da20bfaf |
|
29-Jul-2008 |
Jason Wessel <jason.wessel@windriver.com> |
[MIPS] kgdb: Remove existing implementation This patch explicitly removes the kgdb implementation, for mips which is intended to be followed by a patch that adds a kgdb implementation for MIPS that makes use of the kgdb core in the kernel. Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
d5deda6fa1ca434d36c2daffb63127e92c6470f5 |
|
15-Jul-2008 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] MSC01: Cleanup configuration. This shouldn't depend on CONFIG_MIPS_BOARDS_GEN which is about to go away. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
2957c9e61ee9c37e7ebf2c8acab03e073fe942fd |
|
15-Jul-2008 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] IRIX: Goodbye and thanks for all the fish Never terribly functional or popular, plagued by hard to fix bugs the time to say goodbye has more than arrived. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
c2719d93836b0b0cdf1725449d87705da6ede9a5 |
|
21-May-2008 |
Adrian Bunk <bunk@kernel.org> |
[MIPS] remove CONFIG_CPU_R4000 line from Makefile The existing options are named CONFIG_CPU_R4300 and CONFIG_CPU_R4X00, and they are directly below. Reported-by: Robert P. J. Day <rpjday@crashcourse.ca> Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
1928cc84a0a937ce7042d9235996ab380f36f18a |
|
16-Apr-2008 |
Kevin D. Kissell <kevink@mips.com> |
[MIPS] MT: Functional fixes and a little reformatting of APRP support Signed-off-by: Kevin D. Kissell <kevink@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
6457d9fc3bb87c72db03cfb34cd414c8fb9b8edf |
|
24-Apr-2008 |
Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> |
[MIPS] DS1287: Add clockevent driver Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
4247417d8457b326ede001cb74af8570b5aa302b |
|
24-Apr-2008 |
Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> |
[MIPS] add DECstation I/O ASIC clocksource Add DECstation I/O ASIC clocksource Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
a9aec7fe74cd912cad74ca621ed91cb1c37566ae |
|
04-Apr-2008 |
Atsushi Nemoto <anemo@mba.ocn.ne.jp> |
[MIPS] generic txx9 gpio support This is a board-independent TXx9 gpio API implementation using gpiolib. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
39b8d5254246ac56342b72f812255c8f7a74dca9 |
|
28-Apr-2008 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Add support for MIPS CMP platform. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
0b6d497fcbb72b356c9d6446810a9597ee55c432 |
|
13-Sep-2007 |
Chris Dearman <chris@mips.com> |
[MIPS] Basic SPRAM support Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
64ac24e738823161693bf791f87adc802cf529ff |
|
08-Mar-2008 |
Matthew Wilcox <matthew@wil.cx> |
Generic semaphore implementation Semaphores are no longer performance-critical, so a generic C implementation is better for maintainability, debuggability and extensibility. Thanks to Peter Zijlstra for fixing the lockdep warning. Thanks to Harvey Harrison for pointing out that the unlikely() was unnecessary. Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Acked-by: Ingo Molnar <mingo@elte.hu>
|
131b02c459db2de3aff6b213d317a6f2fa6c5d96 |
|
10-Mar-2008 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Delete leftovers of old pcspeaker support. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
940f6b48a130e0a33cb8bd397dd0e277166470ad |
|
24-Nov-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Only build r4k clocksource for systems that work ok with it. In particular as-is it's not suited for multicore and mutiprocessors systems where there is on guarantee that the counter are synchronized or running from the same clock at all. This broke Sibyte and probably others since the "[MIPS] Handle R4000/R4400 mfc0 from count register." commit. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
217dd11e9d0442767fa13c9c188be0b92dc93d7e |
|
01-Nov-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Sibyte: Split and move clock code. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
229f773ef4ee852ad7bfbe8e1238a2c35b2baa6f |
|
24-Oct-2007 |
Atsushi Nemoto <anemo@mba.ocn.ne.jp> |
[MIPS] txx9tmr clockevent/clocksource driver Convert jmr3927_clock_event_device to more generic txx9tmr_clock_event_device which supports one-shot mode. The txx9tmr_clock_event_device can be used for TX49 too if the cp0 timer interrupt was not available. Convert jmr3927_hpt_read to txx9_clocksource driver which does not depends jiffies anymore. The txx9_clocksource itself can be used for TX49, but normally TX49 uses higher precision clocksource_mips. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
1097c6ac33defae6cf501b7919c23faf240601f0 |
|
22-Oct-2007 |
Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> |
[MIPS] time: Add GT641xx timer0 clockevent driver And make use of it for Cobalt. A few others such as the Malta could make use of it as well. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
42f77542f4a1c104bb6fbba2e18e04e84415a96b |
|
18-Oct-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] time: Move R4000 clockevent device code to separate configurable file Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
a0f97e06a43cf524e616f09e6af3398e1e9c1c5b |
|
14-Oct-2007 |
Sam Ravnborg <sam@neptun.(none)> |
kbuild: enable 'make CFLAGS=...' to add additional options to CC The variable CFLAGS is a wellknown variable and the usage by kbuild may result in unexpected behaviour. On top of that several people over time has asked for a way to pass in additional flags to gcc. This patch replace use of CFLAGS with KBUILD_CFLAGS all over the tree and enabling one to use: make CFLAGS=... to specify additional gcc commandline options. One usecase is when trying to find gcc bugs but other use cases has been requested too. Patch was tested on following architectures: alpha, arm, i386, x86_64, mips, sparc, sparc64, ia64, m68k Test was simple to do a defconfig build, apply the patch and check that nothing got rebuild. Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
|
d865bea4dace1d42995a6cf552bc4863842623f4 |
|
12-Oct-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] i8253 PIT clocksource and clockevent drivers Derived from the i386 variant with a few x86 complexities chopped off. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
d5ab1a6910fe850fa092888f210cf6c43136a7ab |
|
13-Sep-2007 |
Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> |
[MIPS] Add GT641xx IRQ routines. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
8420fd00e88ef4f6082866aa151bc753b006b3b6 |
|
02-Aug-2007 |
Atsushi Nemoto <anemo@mba.ocn.ne.jp> |
[MIPS] The irq_chip for TX39/TX49 SoCs Add generic irq_chip for TX39/TX49 SoCs. This can be replace jmr3927_irq_irc, tx4927_irq_pic_type and tx4938_irq_pic_type. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
dde96ca8b398637e2b4442e312723f66fa6a8186 |
|
30-Jul-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Use -Werror on subdirectories which build cleanly. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
de61b542b822746d1498718c40f5dd740da49629 |
|
12-Jul-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Rename PC speaker code While the PC speaker is wired up to the i8254 there is more to the i8254 than just the PC speaker so this code was getting in the way under its current name. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
688b3d720820a9e3e2e9d5882be64a28f649e206 |
|
09-Jul-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Delete Ocelot 3 support. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
295cbf6d63165fe4253cf1d9ceadcda47a318b48 |
|
03-Jul-2007 |
Ralf Baechle <ralf@mips.com> |
[MIPS] Move FPU affinity code into separate file. Gets rid of some of the CONFIG_MIPS_MT_FPAFF #ifdefery. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
2a21c7300b53b744d16903256a172d9cbcfdd03e |
|
06-Jun-2007 |
Fuxin Zhang <zhangfx@lemote.com> |
[MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2 Signed-off-by: Fuxin Zhang <zhangfx@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
e7c4782f92fc4b83d953ce53f77f05ae65dcd773 |
|
10-Jul-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Put an end to <asm/serial.h>'s long and annyoing existence Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
36a885306fdf7bb557c773309c993bfb2d0d693c |
|
01-Mar-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Fix and cleanup the mess that a dozen prom_printf variants are. early_printk is a so much saner thing. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
d2af363cfb94f1bacb3e60327bc44a97881a38c2 |
|
22-Feb-2007 |
Atsushi Nemoto <anemo@mba.ocn.ne.jp> |
[MIPS] Kill redundant EXTRA_AFLAGS Many Makefiles in arch/mips have EXTRA_AFLAGS := $(CFLAGS) line. This is redundant while AFLAGS contains $(cflags-y) and any options only listed in CFLAGS (not in cflags-y) should be unnecessary for asm sources. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
38201fb23cd554f942702cd938c3215a76296c87 |
|
15-Feb-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Fix CONFIG_MIPS32_N32=y CONFIG_MIPS32_O32=n build Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
2116245ee121af820225834e9695005ab07d1e84 |
|
09-Feb-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[APM] MIPS: Convert to use shared APM emulation. Also convert to use generic kernel/power/Kconfig to make the use of the shared APM emulation possible. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
aa414dff4f7bef29457592414551becdca72dd6b |
|
30-Nov-2006 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Remove duplicate ISA DMA code for 0 DMA channel case. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
583bb86fbb9e85287f020fe4eb5352a0ec3c66a3 |
|
18-Oct-2006 |
Nicolas Schichan <nschichan@freebox.fr> |
[MIPS] Add support for kexec A tiny userland application loading the kernel and invoking kexec_load for mips is available here: http://chac.le-poulpe.net/~nico/kexec/kexec-2006-10-18.tar.gz Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
f5d6c63a67a8f124ddae88511427249d1dd87880 |
|
29-Nov-2006 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Do topology_init even on uniprocessor kernels. Otherwise CPU 0 doesn't show up in sysfs which breaks some software. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
1df0f0ff7e56f6dcb1351b9490d55ebf91ff4bd8 |
|
26-Sep-2006 |
Atsushi Nemoto <anemo@mba.ocn.ne.jp> |
[MIPS] lockdep: Add STACKTRACE_SUPPORT and enable LOCKDEP_SUPPORT Implement stacktrace interface by using unwind_stack() and enable lockdep support in Kconfig. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
952fa954a61cee43de5afba91ae605e30ed2586c |
|
05-Jun-2006 |
Rodolfo Giometti <giometti@linux.it> |
[MIPS] APM emu support Signed-off-by: Rodolfo Giometti <giometti@linux.it> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
41c594ab65fc89573af296d192aa5235d09717ab |
|
05-Apr-2006 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] MT: Improved multithreading support. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
2600990e640e3bef29ed89d565864cf16ee83833 |
|
05-Apr-2006 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] kpsd and other AP/SP improvements. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
e5c6c8e457d16c7cbc12f849ad18d4d508950de2 |
|
14-Mar-2006 |
Michael Neuling <mikey@neuling.org> |
Input: pcspkr - separate device and driver registration The current pcspkr code combines the device and driver registration. This patch splits these, putting the device registration in the arch specific code. PowerPC and MIPS only have the pcspkr present sometimes. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
|
e6a6d2efcb7e7c87c5fe0395803da1453b29cbef |
|
10-Jan-2006 |
Christoph Hellwig <hch@lst.de> |
[PATCH] sanitize building of fs/compat_ioctl.c Now that all these entries in the arch ioctl32.c files are gone [1], we can build fs/compat_ioctl.c as a normal object and kill tons of cruft. We need a special do_ioctl32_pointer handler for s390 so the compat_ptr call is done. This is not needed but harmless on all other architectures. Also remove some superflous includes in fs/compat_ioctl.c Tested on ppc64. [1] parisc still had it's PPP handler left, which is not fully correct for ppp and besides that ppp uses the generic SIOCPRIV ioctl so it'd kick in for all netdevice users. We can introduce a proper handler in one of the next patch series by adding a compat_ioctl method to struct net_device but for now let's just kill it - parisc doesn't compile in mainline anyway and I don't want this to block this patchset. Signed-off-by: Christoph Hellwig <hch@lst.de> Cc: Matthew Wilcox <willy@debian.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
|
ec917c2c1ab4359a1d438e62daeb50cc42e632e1 |
|
07-Oct-2005 |
Ralf Baechle <ralf@linux-mips.org> |
Fixup a few lose ends in explicit support for MIPS R1/R2. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
5bcb9a58e6e3eda4af87193c8746d15e45f51628 |
|
01-Sep-2005 |
Ralf Baechle <ralf@linux-mips.org> |
Move genrtc.c's functions into <asm/rtc.h> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
340ee4b98c0543b5632cac975a7449a2d28762d8 |
|
17-Aug-2005 |
Ralf Baechle <ralf@linux-mips.org> |
Virtual SMP support for the 34K. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
e01402b115cccb6357f956649487aca2c6f7fbba |
|
14-Jul-2005 |
Ralf Baechle <ralf@linux-mips.org> |
More AP / SP bits for the 34K, the Malta bits and things. Still wants a little polishing. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
6e760c8dae7d6c47eff011dd4aad53c94d30494b |
|
06-Jul-2005 |
Ralf Baechle <ralf@linux-mips.org> |
Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
4e6a05fe5f87efd58da16fbf61e1f6329575fcfd |
|
21-Feb-2005 |
Thiemo Seufer <ths@networkno.de> |
Improved modules loader, more robust and works on 64bit kernels. Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
875d43e72b5bf22161a81de7554f88eccf8a51ae |
|
04-Sep-2005 |
Ralf Baechle <ralf@linux-mips.org> |
[PATCH] mips: clean up 32/64-bit configuration Start cleaning 32-bit vs. 64-bit configuration. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
|
1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 |
|
17-Apr-2005 |
Linus Torvalds <torvalds@ppc970.osdl.org> |
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
|