| 140e39c1e3d29f50e161f55cca60f60b80408c2a |
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26-Jun-2014 |
Huacai Chen <chenhc@lemote.com> |
MIPS: Loongson: Modify ChipConfig register definition
This patch is prepared for Multi-chip interconnection. Since each chip
has a ChipConfig register, LOONGSON_CHIPCFG should be an array.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/7185/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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| 2f55ac072f5344519348c0c94b3d2f4cca46847b |
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16-Nov-2010 |
Lionel Debroux <lionel_debroux@yahoo.fr> |
suspend: constify platform_suspend_ops
While at it, fix two checkpatch errors.
Several non-const struct instances constified by this patch were added after
the introduction of platform_suspend_ops in checkpatch.pl's list of "should
be const" structs (79404849e90a41ea2109bd0e2f7c7164b0c4ce73).
Patch against mainline.
Inspired by hunks of the grsecurity patch, updated for newer kernels.
Signed-off-by: Lionel Debroux <lionel_debroux@yahoo.fr>
Acked-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
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| f7a904dffe30a02636053d8022498ced7e44d31c |
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04-Jan-2010 |
Wu Zhangjin <wuzhangjin@gmail.com> |
MIPS: Loongson: Change the Email address of Wu Zhangjin
Currently wuzj@lemote.com is not usable; change it to wuzhangjin@gmail.com.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Patchwork: http://patchwork.linux-mips.org/patch/829/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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| f181bf60e3f31cdab48bd8b9d913201ed2f9e522 |
|
11-Nov-2009 |
Wu Zhangjin <wuzhangjin@gmail.com> |
MIPS: Loongson 2F: Add suspend support framework
This patch add basic suspend support for loongson2f family machines,
loongson2f have a specific feature: when we set it's frequency to ZERO,
it will go into a wait mode, and then can be waked up by the external
interrupt. so, if we setup suitable interrupts before putting it into
wait mode, we will be able wake it up whenever we want via sending the
relative interrupts to it.
These interrupts are board-specific, Yeeloong2F use the keyboard
interrupt and SCI interrupt, but LingLoong and Fuloong2F use the
interrupts connected to the processors directly. and BTW: some old
LingLoong and FuLoong2F have no such interrupts connected, so, there is
no way to wake them up from suspend mode. and therefore, please do not
enable the kernel support for them.
The board-specific support will be added in the coming patches.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Len Brown <len.brown@intel.com>
Cc: Rafael J. Wysocki <rjw@sisk.pl>
Cc: linux-pm@lists.linux-foundation.org
Patchwork: http://patchwork.linux-mips.org/patch/629/
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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