History log of /arch/openrisc/kernel/time.c
Revision Date Author Comments
754d5c2bf65847f7ff4e0047a830154abe666112 18-Nov-2011 Jonas Bonn <jonas@southpole.se> openrisc: Set shortest clock event to 100 ticks

It takes a couple of instructions to actually configure a clock event
so setting an alarm just 1 clock cycle in the future isn't going to work;
doing so results in setting an alarm in the "past" in which case the event
won't fire until the timer overflows and rolls back around to the "current
time".

Not quite sure how many clock cycles it actually takes to get through to
actually writing the register, but 100 seems to work reliably.

Use generic helper to set up the clock event while we're at it.

Reported-by: Jan Schulte <jan.schulte@aacmicrotec.com>
Signed-off-by: Jonas Bonn <jonas@southpole.se>
b731fbbd246e3aba59701bd6112a14ba02bf1c1c 04-Jun-2011 Jonas Bonn <jonas@southpole.se> OpenRISC: Timekeeping

Implements support for the OpenRISC timer which is a 28 bit cycle counter
that can be read out of a special purpose register. This counter is
used as a both a clock event and clocksource device.

Signed-off-by: Jonas Bonn <jonas@southpole.se>
Cc: tglx@linutronix.de
Reviewed-by: Arnd Bergmann <arnd@arndb.de>