History log of /arch/parisc/include/asm/tlbflush.h
Revision Date Author Comments
e8d8fc219f9a0e63e7fb927881e6f4db8e7d34df 29-Jun-2013 John David Anglin <dave.anglin@bell.net> parisc: Ensure volatile space register %sr1 is not clobbered

I still see the occasional random segv on rp3440. Looking at one of
these (a code 15), it appeared the problem must be with the cache
handling of anonymous pages. Reviewing this, I noticed that the space
register %sr1 might be being clobbered when we flush an anonymous page.

Register %sr1 is used for TLB purges in a couple of places. These
purges are needed on PA8800 and PA8900 processors to ensure cache
consistency of flushed cache lines.

The solution here is simply to move the %sr1 load into the TLB lock
region needed to ensure that one purge executes at a time on SMP
systems. This was already the case for one use. After a few days of
operation, I haven't had a random segv on my rp3440.

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Cc: <stable@vger.kernel.org> # 3.10
Signed-off-by: Helge Deller <deller@gmx.de>
0fc537d1d655cdae69b489dbba46ad617cfc1373 07-May-2013 Helge Deller <deller@gmx.de> parisc: tlb flush counting fix for SMP and UP

Fix up build error on UP and show correctly number of function call
(ipi) irqs.

Signed-off-by: Helge Deller <deller@gmx.de>
e82a3b75127188f20c7780bec580e148beb29da7 16-Jun-2009 Helge Deller <deller@gmx.de> parisc: ensure broadcast tlb purge runs single threaded

The TLB flushing functions on hppa, which causes PxTLB broadcasts on the system
bus, needs to be protected by irq-safe spinlocks to avoid irq handlers to deadlock
the kernel. The deadlocks only happened during I/O intensive loads and triggered
pretty seldom, which is why this bug went so long unnoticed.

Signed-off-by: Helge Deller <deller@gmx.de>
[edited to use spin_lock_irqsave on UP as well since we'd been locking there
all this time anyway, --kyle]
Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
5289f46b9de04bde181d833d48df9671b69c4b08 23-Dec-2008 Kyle McMartin <kyle@infradead.org> parisc: disable UP-optimized flush_tlb_mm

flush_tlb_mm's "optimized" uniprocessor case of allocating a new
context for userspace is exposing a race where we can suddely return
to a syscall with the protection id and space id out of sync, trapping
on the next userspace access.

Debugged-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Tested-by: Helge Deller <deller@gmx.de>
Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
deae26bf6a10e47983606f5df080b91e97650ead 29-Jul-2008 Kyle McMartin <kyle@mcmartin.ca> parisc: move include/asm-parisc to arch/parisc/include/asm