23f66e2d661b4d3226d16e25910a9e9472ce2410 |
|
27-Aug-2014 |
Tejun Heo <tj@kernel.org> |
Revert "powerpc: Replace __get_cpu_var uses" This reverts commit 5828f666c069af74e00db21559f1535103c9f79a due to build failure after merging with pending powerpc changes. Link: http://lkml.kernel.org/g/20140827142243.6277eaff@canb.auug.org.au Signed-off-by: Tejun Heo <tj@kernel.org> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Christoph Lameter <cl@linux-foundation.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
5828f666c069af74e00db21559f1535103c9f79a |
|
17-Aug-2014 |
Christoph Lameter <cl@linux.com> |
powerpc: Replace __get_cpu_var uses __get_cpu_var() is used for multiple purposes in the kernel source. One of them is address calculation via the form &__get_cpu_var(x). This calculates the address for the instance of the percpu variable of the current processor based on an offset. Other use cases are for storing and retrieving data from the current processors percpu area. __get_cpu_var() can be used as an lvalue when writing data or on the right side of an assignment. __get_cpu_var() is defined as : #define __get_cpu_var(var) (*this_cpu_ptr(&(var))) __get_cpu_var() always only does an address determination. However, store and retrieve operations could use a segment prefix (or global register on other platforms) to avoid the address calculation. this_cpu_write() and this_cpu_read() can directly take an offset into a percpu area and use optimized assembly code to read and write per cpu variables. This patch converts __get_cpu_var into either an explicit address calculation using this_cpu_ptr() or into a use of this_cpu operations that use the offset. Thereby address calculations are avoided and less registers are used when code is generated. At the end of the patch set all uses of __get_cpu_var have been removed so the macro is removed too. The patch set includes passes over all arches as well. Once these operations are used throughout then specialized macros can be defined in non -x86 arches as well in order to optimize per cpu access by f.e. using a global register that may be set to the per cpu base. Transformations done to __get_cpu_var() 1. Determine the address of the percpu instance of the current processor. DEFINE_PER_CPU(int, y); int *x = &__get_cpu_var(y); Converts to int *x = this_cpu_ptr(&y); 2. Same as #1 but this time an array structure is involved. DEFINE_PER_CPU(int, y[20]); int *x = __get_cpu_var(y); Converts to int *x = this_cpu_ptr(y); 3. Retrieve the content of the current processors instance of a per cpu variable. DEFINE_PER_CPU(int, y); int x = __get_cpu_var(y) Converts to int x = __this_cpu_read(y); 4. Retrieve the content of a percpu struct DEFINE_PER_CPU(struct mystruct, y); struct mystruct x = __get_cpu_var(y); Converts to memcpy(&x, this_cpu_ptr(&y), sizeof(x)); 5. Assignment to a per cpu variable DEFINE_PER_CPU(int, y) __get_cpu_var(y) = x; Converts to __this_cpu_write(y, x); 6. Increment/Decrement etc of a per cpu variable DEFINE_PER_CPU(int, y); __get_cpu_var(y)++ Converts to __this_cpu_inc(y) tj: Folded a fix patch. http://lkml.kernel.org/g/alpine.DEB.2.11.1408172143020.9652@gentwo.org Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> CC: Paul Mackerras <paulus@samba.org> Signed-off-by: Christoph Lameter <cl@linux.com> Signed-off-by: Tejun Heo <tj@kernel.org>
|
0869b6fd209bda402576a9a559120ddd4f61198e |
|
29-Jul-2014 |
Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> |
powerpc/book3s: Add basic infrastructure to handle HMI in Linux. Handle Hypervisor Maintenance Interrupt (HMI) in Linux. This patch implements basic infrastructure to handle HMI in Linux host. The design is to invoke opal handle hmi in real mode for recovery and set irq_pending when we hit HMI. During check_irq_replay pull opal hmi event and print hmi info on console. Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
c152833949a07f3cde8fa1e34dec80614085a159 |
|
17-Jun-2014 |
Wladislav Wiebe <wladislav.kw@gmail.com> |
powerpc/traps/e500: fix misleading error output In machine_check_e500 exception handler is a wrong indication in case of MCSR_BUS_WBERR - so print "Write" instead of "Read". Signed-off-by: Wladislav Wiebe <wladislav.kw@gmail.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
|
e6654d5b4259317be82b06cf9218f82abec8c8e7 |
|
11-Jun-2014 |
Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> |
powerpc/book3s: Increment the mce counter during machine_check_early call. We don't see MCE counter getting increased in /proc/interrupts which gives false impression of no MCE occurred even when there were MCE events. The machine check early handling was added for PowerKVM and we missed to increment the MCE count in the early handler. We also increment mce counters in the machine_check_exception call, but in most cases where we handle the error hypervisor never reaches there unless its fatal and we want to crash. Only during fatal situation we may see double increment of mce count. We need to fix that. But for now it always good to have some count increased instead of zero. Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
f83319d71002aec03bd87bc9aabce5f549680f0a |
|
28-Mar-2014 |
Anton Blanchard <anton@samba.org> |
powerpc: Add lq/stq emulation Recent CPUs support quad word load and store instructions. Add support to the alignment handler for them. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
ee4ed6fa5af0009a1205498d1f754fecc7af7657 |
|
14-Mar-2014 |
Michael Neuling <mikey@neuling.org> |
powerpc: Rate-limit users spamming kernel log buffer The facility unavailable exception can be triggered from userspace by accessing PMU registers when EBB is not enabled. This causes the included pr_err() to run, hence spamming the kernel log buffer. This avoids this by rate limiting these messages. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
3ac8ff1c475bda7174fce63230c0932454287cd5 |
|
13-Jan-2014 |
Paul Mackerras <paulus@samba.org> |
powerpc: Fix transactional FP/VMX/VSX unavailable handlers Currently, if a process starts a transaction and then takes an exception because the FPU, VMX or VSX unit is unavailable to it, we end up corrupting any FP/VMX/VSX state that was valid before the interrupt. For example, if the process starts a transaction with the FPU available to it but VMX unavailable, and then does a VMX instruction inside the transaction, the FP state gets corrupted. Loading up the desired state generally involves doing a reclaim and a recheckpoint. To avoid corrupting already-valid state, we have to be careful not to reload that state from the thread_struct between the reclaim and the recheckpoint (since the thread_struct values are stale by now), and we have to reload that state from the transact_fp/vr arrays after the recheckpoint to get back the current transactional values saved there by the reclaim. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
d31626f70b6103f4d9153b75d07e0e8795728cc9 |
|
13-Jan-2014 |
Paul Mackerras <paulus@samba.org> |
powerpc: Don't corrupt transactional state when using FP/VMX in kernel Currently, when we have a process using the transactional memory facilities on POWER8 (that is, the processor is in transactional or suspended state), and the process enters the kernel and the kernel then uses the floating-point or vector (VMX/Altivec) facility, we end up corrupting the user-visible FP/VMX/VSX state. This happens, for example, if a page fault causes a copy-on-write operation, because the copy_page function will use VMX to do the copy on POWER8. The test program below demonstrates the bug. The bug happens because when FP/VMX state for a transactional process is stored in the thread_struct, we store the checkpointed state in .fp_state/.vr_state and the transactional (current) state in .transact_fp/.transact_vr. However, when the kernel wants to use FP/VMX, it calls enable_kernel_fp() or enable_kernel_altivec(), which saves the current state in .fp_state/.vr_state. Furthermore, when we return to the user process we return with FP/VMX/VSX disabled. The next time the process uses FP/VMX/VSX, we don't know which set of state (the current register values, .fp_state/.vr_state, or .transact_fp/.transact_vr) we should be using, since we have no way to tell if we are still in the same transaction, and if not, whether the previous transaction succeeded or failed. Thus it is necessary to strictly adhere to the rule that if FP has been enabled at any point in a transaction, we must keep FP enabled for the user process with the current transactional state in the FP registers, until we detect that it is no longer in a transaction. Similarly for VMX; once enabled it must stay enabled until the process is no longer transactional. In order to keep this rule, we add a new thread_info flag which we test when returning from the kernel to userspace, called TIF_RESTORE_TM. This flag indicates that there is FP/VMX/VSX state to be restored before entering userspace, and when it is set the .tm_orig_msr field in the thread_struct indicates what state needs to be restored. The restoration is done by restore_tm_state(). The TIF_RESTORE_TM bit is set by new giveup_fpu/altivec_maybe_transactional helpers, which are called from enable_kernel_fp/altivec, giveup_vsx, and flush_fp/altivec_to_thread instead of giveup_fpu/altivec. The other thing to be done is to get the transactional FP/VMX/VSX state from .fp_state/.vr_state when doing reclaim, if that state has been saved there by giveup_fpu/altivec_maybe_transactional. Having done this, we set the FP/VMX bit in the thread's MSR after reclaim to indicate that that part of the state is now valid (having been reclaimed from the processor's checkpointed state). Finally, in the signal handling code, we move the clearing of the transactional state bits in the thread's MSR a bit earlier, before calling flush_fp_to_thread(), so that we don't unnecessarily set the TIF_RESTORE_TM bit. This is the test program: /* Michael Neuling 4/12/2013 * * See if the altivec state is leaked out of an aborted transaction due to * kernel vmx copy loops. * * gcc -m64 htm_vmxcopy.c -o htm_vmxcopy * */ /* We don't use all of these, but for reference: */ int main(int argc, char *argv[]) { long double vecin = 1.3; long double vecout; unsigned long pgsize = getpagesize(); int i; int fd; int size = pgsize*16; char tmpfile[] = "/tmp/page_faultXXXXXX"; char buf[pgsize]; char *a; uint64_t aborted = 0; fd = mkstemp(tmpfile); assert(fd >= 0); memset(buf, 0, pgsize); for (i = 0; i < size; i += pgsize) assert(write(fd, buf, pgsize) == pgsize); unlink(tmpfile); a = mmap(NULL, size, PROT_READ|PROT_WRITE, MAP_PRIVATE, fd, 0); assert(a != MAP_FAILED); asm __volatile__( "lxvd2x 40,0,%[vecinptr] ; " // set 40 to initial value TBEGIN "beq 3f ;" TSUSPEND "xxlxor 40,40,40 ; " // set 40 to 0 "std 5, 0(%[map]) ;" // cause kernel vmx copy page TABORT TRESUME TEND "li %[res], 0 ;" "b 5f ;" "3: ;" // Abort handler "li %[res], 1 ;" "5: ;" "stxvd2x 40,0,%[vecoutptr] ; " : [res]"=r"(aborted) : [vecinptr]"r"(&vecin), [vecoutptr]"r"(&vecout), [map]"r"(a) : "memory", "r0", "r3", "r4", "r5", "r6", "r7"); if (aborted && (vecin != vecout)){ printf("FAILED: vector state leaked on abort %f != %f\n", (double)vecin, (double)vecout); exit(1); } munmap(a, size); close(fd); printf("PASSED!\n"); return 0; } Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
4c703416efc0a23f83a282b9240bb92fbd9e0be9 |
|
30-Oct-2013 |
Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> |
powerpc/book3s: Introduce a early machine check hook in cpu_spec. This patch adds the early machine check function pointer in cputable for CPU specific early machine check handling. The early machine handle routine will be called in real mode to handle SLB and TLB errors. We can not reuse the existing machine_check hook because it is always invoked in kernel virtual mode and we would already be in trouble if we get SLB or TLB errors. This patch just sets up a mechanism to invoke CPU specific handler. The subsequent patches will populate the function pointer. Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Acked-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
1e9b4507ed98457edb8a892934282b8f63e17246 |
|
30-Oct-2013 |
Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> |
powerpc/book3s: handle machine check in Linux host. Move machine check entry point into Linux. So far we were dependent on firmware to decode MCE error details and handover the high level info to OS. This patch introduces early machine check routine that saves the MCE information (srr1, srr0, dar and dsisr) to the emergency stack. We allocate stack frame on emergency stack and set the r1 accordingly. This allows us to be prepared to take another exception without loosing context. One thing to note here that, if we get another machine check while ME bit is off then we risk a checkstop. Hence we restrict ourselves to save only MCE information and register saved on PACA_EXMC save are before we turn the ME bit on. We use paca->in_mce flag to differentiate between first entry and nested machine check entry which helps proper use of emergency stack. We increment paca->in_mce every time we enter in early machine check handler and decrement it while leaving. When we enter machine check early handler first time (paca->in_mce == 0), we are sure nobody is using MC emergency stack and allocate a stack frame at the start of the emergency stack. During subsequent entry (paca->in_mce > 0), we know that r1 points inside emergency stack and we allocate separate stack frame accordingly. This prevents us from clobbering MCE information during nested machine checks. The early machine check handler changes are placed under CPU_FTR_HVMODE section. This makes sure that the early machine check handler will get executed only in hypervisor kernel. This is the code flow: Machine Check Interrupt | V 0x200 vector ME=0, IR=0, DR=0 | V +-----------------------------------------------+ |machine_check_pSeries_early: | ME=0, IR=0, DR=0 | Alloc frame on emergency stack | | Save srr1, srr0, dar and dsisr on stack | +-----------------------------------------------+ | (ME=1, IR=0, DR=0, RFID) | V machine_check_handle_early ME=1, IR=0, DR=0 | V +-----------------------------------------------+ | machine_check_early (r3=pt_regs) | ME=1, IR=0, DR=0 | Things to do: (in next patches) | | Flush SLB for SLB errors | | Flush TLB for TLB errors | | Decode and save MCE info | +-----------------------------------------------+ | (Fall through existing exception handler routine.) | V machine_check_pSerie ME=1, IR=0, DR=0 | (ME=1, IR=1, DR=1, RFID) | V machine_check_common ME=1, IR=1, DR=1 . . . Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
a3821b2af185b64e3382c45fbdaa2cbc91ce14b8 |
|
29-Oct-2013 |
Scott Wood <scottwood@freescale.com> |
powerpc: Fix PPC_EMULATED_STATS build break with sync patch Commit 9863c28a2af90a56c088f5f6288d7f6d2c923c14 ("powerpc: Emulate sync instruction variants") introduced a build breakage with CONFIG_PPC_EMULATED_STATS enabled. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Kumar Gala <galak@kernel.org> Cc: James Yang <James.Yang@freescale.com> ---
|
1eb2819d69c818784cab0d4a89a35e36bd753e57 |
|
28-Aug-2013 |
LEROY Christophe <christophe.leroy@c-s.fr> |
powerpc/mpc8xx: Clearer Oops message for Software Emulation Exception This patch modifies the Oops message in case of Software Emulation Exception. The existing message is quite confusing because it refers to FPU Emulation while most often the issue is due to either a non supported instruction (not necessarily FPU related) or a stale instruction due to HW issues. The new message tries to be more generic in order to make the user understand that the Oops is due to something wrong with an instruction, not necessarily due to an FPU instruction. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <scottwood@freescale.com>
|
51ae8d4a2b9e4aa9a502061b9c39168e08829b94 |
|
04-Jul-2013 |
Bharat Bhushan <r65777@freescale.com> |
powerpc: move debug registers in a structure This way we can use same data type struct with KVM and also help in using other debug related function. Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com> Acked-by: Michael Neuling <mikey@neuling.org> [scottwood@freescale.com: removed obvious debug_reg comment] Signed-off-by: Scott Wood <scottwood@freescale.com>
|
95791988fec645d196e746fcc0e329e19f7b1347 |
|
26-Jun-2013 |
Bharat Bhushan <r65777@freescale.com> |
powerpc: move debug registers in a structure This way we can use same data type struct with KVM and also help in using other debug related function. Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
|
9863c28a2af90a56c088f5f6288d7f6d2c923c14 |
|
03-Jul-2013 |
James Yang <James.Yang@freescale.com> |
powerpc: Emulate sync instruction variants Reserved fields of the sync instruction have been used for other instructions (e.g. lwsync). On processors that do not support variants of the sync instruction, emulate it by executing a sync to subsume the effect of the intended instruction. Signed-off-by: James Yang <James.Yang@freescale.com> [scottwood@freescale.com: whitespace and subject line fix] Signed-off-by: Scott Wood <scottwood@freescale.com>
|
de79f7b9f6f92ec1bd6f61fa1f20de60728a5b5e |
|
10-Sep-2013 |
Paul Mackerras <paulus@samba.org> |
powerpc: Put FP/VSX and VR state into structures This creates new 'thread_fp_state' and 'thread_vr_state' structures to store FP/VSX state (including FPSCR) and Altivec/VSX state (including VSCR), and uses them in the thread_struct. In the thread_fp_state, the FPRs and VSRs are represented as u64 rather than double, since we rarely perform floating-point computations on the values, and this will enable the structures to be used in KVM code as well. Similarly FPSCR is now a u64 rather than a structure of two 32-bit values. This takes the offsets out of the macros such as SAVE_32FPRS, REST_32FPRS, etc. This enables the same macros to be used for normal and transactional state, enabling us to delete the transactional versions of the macros. This also removes the unused do_load_up_fpu and do_load_up_altivec, which were in fact buggy since they didn't create large enough stack frames to account for the fact that load_up_fpu and load_up_altivec are not designed to be called from C and assume that their caller's stack frame is an interrupt frame. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
bc683a7e51c5c838bc74316125bebec92af74f12 |
|
26-Aug-2013 |
Michael Neuling <mikey@neuling.org> |
powerpc: Cleanup handling of the DSCR bit in the FSCR register As suggested by paulus we can simplify the Data Stream Control Register (DSCR) Facility Status and Control Register (FSCR) handling. Firstly, we simplify the asm by using a rldimi. Secondly, we now use the FSCR only to control the DSCR facility, rather than both the FSCR and HFSCR. Users will see no functional change from this but will get a minor speedup as they will trap into the kernel only once (rather than twice) when they first touch the DSCR. Also, this changes removes a bunch of ugly FTR_SECTION code. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
b3f6a45925232d29519007f1ba6687e1e790fb5d |
|
15-Aug-2013 |
Michael Ellerman <michael@ellerman.id.au> |
powerpc: Skip emulating & leave interrupts off for kernel program checks In the program check handler we handle some causes with interrupts off and others with interrupts on. We need to enable interrupts to handle the emulation cases, because they access userspace memory and might sleep. For faults in the kernel we don't want to do any emulation, and emulate_instruction() enforces that. do_mathemu() doesn't but probably should. The other disadvantage of enabling interrupts for kernel faults is that we may take another interrupt, and recurse. As seen below: --- Exception: e40 at c000000000004ee0 performance_monitor_relon_pSeries_1 [link register ] c00000000000f858 .arch_local_irq_restore+0x38/0x90 [c000000fb185dc10] 0000000000000000 (unreliable) [c000000fb185dc80] c0000000007d8558 .program_check_exception+0x298/0x2d0 [c000000fb185dd00] c000000000002f40 emulation_assist_common+0x140/0x180 --- Exception: e40 at c000000000004ee0 performance_monitor_relon_pSeries_1 [link register ] c00000000000f858 .arch_local_irq_restore+0x38/0x90 [c000000fb185dff0] 00000000008b9190 (unreliable) [c000000fb185e060] c0000000007d8558 .program_check_exception+0x298/0x2d0 So avoid both problems by checking if the fault was in the kernel and skipping the enable of interrupts and the emulation. Go straight to delivering the SIGILL, which for kernel faults calls die() and so on, dropping us in the debugger etc. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
4288e343fb63cd74b35bf68c5d83551f867dba56 |
|
06-Aug-2013 |
Anton Blanchard <anton@samba.org> |
powerpc: Emulate instructions in little endian mode Alistair noticed we got a SIGILL on userspace mfpvr instructions. Remove the little endian check in the emulation code, it is probably there to protect against the old pseudo little endian implementations but doesn't make sense for real little endian. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
3a3b5aa63fad4911e239055c2c0a89ce2dac62ce |
|
14-Jul-2013 |
Kevin Hao <haokexin@gmail.com> |
powerpc: Introduce function emulate_math() There are two invocations of do_mathemu() in traps.c. And the codes in these two places are almost the same. Introduce a locale function to eliminate the duplication. With this change we can also make sure that in program_check_exception() the PPC_WARN_EMULATED is invoked for the correctly emulated math instructions. Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
6761ee3d7e139ec8728e1515bfc5fdcaf3be317e |
|
14-Jul-2013 |
Kevin Hao <haokexin@gmail.com> |
powerpc/math-emu: Move the flush FPU state function into do_mathemu By doing this we can make sure that the FPU state is only flushed to the thread struct when it is really needed. Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
2517617e0de65f8f7cfe75cae745d06b1fa98586 |
|
09-Aug-2013 |
Michael Neuling <mikey@neuling.org> |
powerpc: Fix context switch DSCR on POWER8 POWER8 allows the DSCR to be accessed directly from userspace via a new SPR number 0x3 (Rather than 0x11. DSCR SPR number 0x11 is still used on POWER8 but like POWER7, is only accessible in HV and OS modes). Currently, we allow this by setting H/FSCR DSCR bit on boot. Unfortunately this doesn't work, as the kernel needs to see the DSCR change so that it knows to no longer restore the system wide version of DSCR on context switch (ie. to set thread.dscr_inherit). This clears the H/FSCR DSCR bit initially. If a process then accesses the DSCR (via SPR 0x3), it'll trap into the kernel where we set thread.dscr_inherit in facility_unavailable_exception(). We also change _switch() so that we set or clear the H/FSCR DSCR bit based on the thread.dscr_inherit. Signed-off-by: Michael Neuling <mikey@neuling.org> Cc: <stable@vger.kernel.org> [v3.10] Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
4e0e3435b50285eafe5898124ce02f7577f6803a |
|
28-Apr-2013 |
Hongtao Jia <hongtao.jia@freescale.com> |
powerpc/85xx: Add machine check handler to fix PCIe erratum on mpc85xx A PCIe erratum of mpc85xx may causes a core hang when a link of PCIe goes down. when the link goes down, Non-posted transactions issued via the ATMU requiring completion result in an instruction stall. At the same time a machine-check exception is generated to the core to allow further processing by the handler. We implements the handler which skips the instruction caused the stall. This patch depends on patch: powerpc/85xx: Add platform_device declaration to fsl_pci.h Signed-off-by: Zhao Chenhui <b35336@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Liu Shuo <soniccat.liu@gmail.com> Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
|
b14b6260efeee6eb8942c6e6420e31281892acb6 |
|
25-Jun-2013 |
Michael Ellerman <michael@ellerman.id.au> |
powerpc: Wire up the HV facility unavailable exception Similar to the facility unavailble exception, except the facilities are controlled by HFSCR. Adapt the facility_unavailable_exception() so it can be called for either the regular or Hypervisor facility unavailable exceptions. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> CC: <stable@vger.kernel.org> [v3.10] Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
021424a1fce335e05807fd770eb8e1da30a63eea |
|
25-Jun-2013 |
Michael Ellerman <michaele@au1.ibm.com> |
powerpc: Rename and flesh out the facility unavailable exception handler The exception at 0xf60 is not the TM (Transactional Memory) unavailable exception, it is the "Facility Unavailable Exception", rename it as such. Flesh out the handler to acknowledge the fact that it can be called for many reasons, one of which is TM being unavailable. Use STD_EXCEPTION_COMMON() for the exception body, for some reason we had it open-coded, I've checked the generated code is identical. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> CC: <stable@vger.kernel.org> [v3.10] Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
80aa0fb4940bf8ee52bcb574d74459a7aea45621 |
|
25-Jun-2013 |
James Yang <James.Yang@freescale.com> |
powerpc: Fix string instr. emulation for 32-bit processes on ppc64 String instruction emulation would erroneously result in a segfault if the upper bits of the EA are set and is so high that it fails access check. Truncate the EA to 32 bits if the process is 32-bit. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
968219fa334ce8fed3421dd12ea12e9f562c95cb |
|
09-Jun-2013 |
Benjamin Herrenschmidt <benh@kernel.crashing.org> |
powerpc/8xx: Remove 8xx specific "minimal FPU emulation" This is duplicated code from math-emu and implements such a small subset of the FPU (load/stores/fmr) that it's essentially pointless nowdays. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
4e63f8edfe4d6f20b1af176efc022c2b2f5e7aeb |
|
09-Jun-2013 |
Benjamin Herrenschmidt <benh@kernel.crashing.org> |
powerpc/math-emu: Allow math-emu to be used for HW FPU (Including 64-bit ones) This allow SW emulation by the kernel of optional instructions such as fsqrt which aren't implemented on some processors, and thus fixes some Fedora 19 issues such as Anaconda since the compiler is set to generate those by default on 64-bit. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
bf593907f7236e95698a76b7c7a2bbf8b1165327 |
|
14-Jun-2013 |
Paul Mackerras <paulus@samba.org> |
powerpc: Fix emulation of illegal instructions on PowerNV platform Normally, the kernel emulates a few instructions that are unimplemented on some processors (e.g. the old dcba instruction), or privileged (e.g. mfpvr). The emulation of unimplemented instructions is currently not working on the PowerNV platform. The reason is that on these machines, unimplemented and illegal instructions cause a hypervisor emulation assist interrupt, rather than a program interrupt as on older CPUs. Our vector for the emulation assist interrupt just calls program_check_exception() directly, without setting the bit in SRR1 that indicates an illegal instruction interrupt. This fixes it by making the emulation assist interrupt set that bit before calling program_check_interrupt(). With this, old programs that use no-longer implemented instructions such as dcba now work again. CC: <stable@vger.kernel.org> Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
6ce6c629fd8254b3177650de99699682ff7f6707 |
|
26-May-2013 |
Michael Neuling <mikey@neuling.org> |
powerpc/tm: Abort on emulation and alignment faults If we are emulating an instruction inside an active user transaction that touches memory, the kernel can't emulate it as it operates in transactional suspend context. We need to abort these transactions and send them back to userspace for the hardware to rollback. We can service these if the user transaction is in suspend mode, since the kernel will operate in the same suspend context. This adds a check to all alignment faults and to specific instruction emulations (only string instructions for now). If the user process is in an active (non-suspended) transaction, we abort the transaction go back to userspace allowing the HW to roll back the transaction and tell the user of the failure. This also adds new tm abort cause codes to report the reason of the persistent error to the user. Crappy test case here http://neuling.org/devel/junkcode/aligntm.c Signed-off-by: Michael Neuling <mikey@neuling.org> Cc: <stable@vger.kernel.org> # v3.9 Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
ba12eedee321eeb5baecaada285daeb3462c35f5 |
|
13-May-2013 |
Li Zhong <zhong@linux.vnet.ibm.com> |
powerpc: Exception hooks for context tracking subsystem This is the exception hooks for context tracking subsystem, including data access, program check, single step, instruction breakpoint, machine check, alignment, fp unavailable, altivec assist, unknown exception, whose handlers might use RCU. This patch corresponds to [PATCH] x86: Exception hooks for userspace RCU extended QS commit 6ba3c97a38803883c2eee489505796cb0a727122 But after the exception handling moved to generic code, and some changes in following two commits: 56dd9470d7c8734f055da2a6bac553caf4a468eb context_tracking: Move exception handling to generic code 6c1e0256fad84a843d915414e4b5973b7443d48d context_tracking: Restore correct previous context state on exception exit it is able for exception hooks to use the generic code above instead of a redundant arch implementation. Signed-off-by: Li Zhong <zhong@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
73d2fb758e678c93bc76d40876c2359f0729b0ef |
|
01-May-2013 |
Anton Blanchard <anton@samba.org> |
powerpc: Emulate non privileged DSCR read and write POWER8 allows read and write of the DSCR in userspace. We added kernel emulation so applications could always use the instructions regardless of the CPU type. Unfortunately there are two SPRs for the DSCR and we only added emulation for the privileged one. Add code to match the non privileged one. A simple test was created to verify the fix: http://ozlabs.org/~anton/junkcode/user_dscr_test.c Without the patch we get a SIGILL and it passes with the patch. Signed-off-by: Anton Blanchard <anton@samba.org> Cc: <stable@kernel.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
bc2a9408fa65195288b41751016c36fd00a75a85 |
|
13-Feb-2013 |
Michael Neuling <mikey@neuling.org> |
powerpc: Hook in new transactional memory code This hooks the new transactional memory code into context switching, FP/VMX/VMX unavailable and exception return. Signed-off-by: Matt Evans <matt@ozlabs.org> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
f54db641b9bbca91b071128e4d71f0f6af9a3c25 |
|
13-Feb-2013 |
Michael Neuling <mikey@neuling.org> |
powerpc: Routines for FP/VSX/VMX unavailable during a transaction We do lazy FP but not lazy TM (ie. userspace starts with MSR TM=1 FP=0). Hence if userspace does an FP instruction during a transaction, we'll take an fp unavailable exception. This adds functions needed to handle this case. We have to inject the current FP state into the checkpoint so that the hardware can decide what to do with the transaction. We can't inject only the FP so we have to do a full treclaim and recheckpoint to inject just the FP state. This will cause the transaction to be marked as aborted by the hardware. This just add the routines needed to do this for FP, VMX and VSX. It doesn't hook them into the rest of the code yet. Signed-off-by: Matt Evans <matt@ozlabs.org> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
d0c0c9a13f682157e8610565b6125a31d24434bc |
|
13-Feb-2013 |
Michael Neuling <mikey@neuling.org> |
powerpc: Add transactional memory unavaliable execption handler These should never happen since we always turn on MSR TM when in userspace. We don't do lazy TM. Hence if we hit this, we barf and kill the task as something's gone horribly wrong. Signed-off-by: Matt Evans <matt@ozlabs.org> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
8b3c34cf0e0ab334a24aad7367cd06a5ba09a898 |
|
13-Feb-2013 |
Michael Neuling <mikey@neuling.org> |
powerpc: New macros for transactional memory support This adds new macros for saving and restoring checkpointed architected state from and to the thread_struct. It also adds some debugging macros for when your brain explodes trying to debug your transactional memory enabled kernel. Signed-off-by: Matt Evans <matt@ozlabs.org> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
373d4d099761cb1f637bed488ab3871945882273 |
|
21-Jan-2013 |
Rusty Russell <rusty@rustcorp.com.au> |
taint: add explicit flag to show whether lock dep is still OK. Fix up all callers as they were before, with make one change: an unsigned module taints the kernel, but doesn't turn off lockdep. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
|
9422de3e953d0e60eb95f5430a9dd803eec1c6d7 |
|
20-Dec-2012 |
Michael Neuling <mikey@neuling.org> |
powerpc: Hardware breakpoints rewrite to handle non DABR breakpoint registers This is a rewrite so that we don't assume we are using the DABR throughout the code. We now use the arch_hw_breakpoint to store the breakpoint in a generic manner in the thread_struct, rather than storing the raw DABR value. The ptrace GET/SET_DEBUGREG interface currently passes the raw DABR in from userspace. We keep this functionality, so that future changes (like the POWER8 DAWR), will still fake the DABR to userspace. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
1e18c17adf32b86474fd903071b0181de9334bd4 |
|
05-Oct-2012 |
Jason Gunthorpe <jgunthorpe@obsidianresearch.com> |
powerpc: Enable the Watchdog vector for 405 The watchdog and FIT code has been #if 0'd for ever, if the CPU takes an exception to either of those vectors it will jump into the middle of the PIT or Data TLB code and surely crash. At least some (all?) 405 cores have both the WDT and FIT vectors defined, so lets have proper entry points for them. Tested that the WDT vector works on a 405F6 core. Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
00ca0de02f80924dfff6b4f630e1dff3db005e35 |
|
03-Sep-2012 |
Anton Blanchard <anton@samba.org> |
powerpc: Keep thread.dscr and thread.dscr_inherit in sync When we update the DSCR either via emulation of mtspr(DSCR) or via a change to dscr_default in sysfs we don't update thread.dscr. We will eventually update it at context switch time but there is a period where thread.dscr is incorrect. If we fork at this point we will copy the old value of thread.dscr into the child. To avoid this, always keep thread.dscr in sync with reality. This issue was found with the following testcase: http://ozlabs.org/~anton/junkcode/dscr_inherit_test.c Signed-off-by: Anton Blanchard <anton@samba.org> Cc: <stable@kernel.org> # 3.0+ Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
41ab5266c3622354353433618edb92ab278025fa |
|
23-Aug-2012 |
Ananth N Mavinakayanahalli <ananth@in.ibm.com> |
powerpc: Add trap_nr to thread_struct Add thread_struct.trap_nr and use it to store the last exception the thread experienced. In this patch, we populate the field at various places where we force_sig_info() to the process. This is also used in uprobes to determine if the probed instruction caused an exception. Signed-off-by: Ananth N Mavinakayanahalli <ananth@in.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
a3512b2dd57cb653bb33645ca9c934436e547e3c |
|
08-May-2012 |
Benjamin Herrenschmidt <benh@kernel.crashing.org> |
powerpc/irq: Make alignment & program interrupt behave the same Alignment was the last user of the ENABLE_INTS macro, which we can now remove. All non-syscall exceptions now disable interrupts on entry, they get re-enabled conditionally from C code. Don't unconditionally re-enable in program check either, check the original context. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
ae3a197e3d0bfe3f4bf1693723e82dc018c096f3 |
|
28-Mar-2012 |
David Howells <dhowells@redhat.com> |
Disintegrate asm/system.h for PowerPC Disintegrate asm/system.h for PowerPC. Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> cc: linuxppc-dev@lists.ozlabs.org
|
9f2f79e3a3c19ae745d0439d6e0eed31df28de3c |
|
01-Mar-2012 |
Benjamin Herrenschmidt <benh@kernel.crashing.org> |
powerpc: Disable interrupts in 64-bit kernel FP and vector faults If we get a floating point, altivec or vsx unavaible interrupt in kernel, we trigger a kernel error. There is no point preserving the interrupt state, in fact, that can even make debugging harder as the processor state might change (we may even preempt) between taking the exception and landing in a debugger. So just make those 3 disable interrupts unconditionally. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> --- v2: On BookE only disable when hitting the kernel unavailable path, otherwise it will fail to restore softe as fast_exception_return doesn't do it.
|
ebaeb5ae24379b5b635dc1d1fa6df904bc95b4d9 |
|
16-Feb-2012 |
Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> |
fadump: Convert firmware-assisted cpu state dump data into elf notes. When registered for firmware assisted dump on powerpc, firmware preserves the registers for the active CPUs during a system crash. This patch reads the cpu register data stored in Firmware-assisted dump format (except for crashing cpu) and converts it into elf notes and updates the PT_NOTE program header accordingly. The exact register state for crashing cpu is saved to fadump crash info structure in scratch area during crash_fadump() and read during second kernel boot. Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
760ca4dc90e624eb8f7ff85a5925151e25577758 |
|
30-Nov-2011 |
Anton Blanchard <anton@samba.org> |
powerpc: Rework die() Our die() code was based off a very old x86 version. Update it to mirror the current x86 code. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
9b00ac06978c54788f13eefd34a07b77db48d567 |
|
30-Nov-2011 |
Anton Blanchard <anton@samba.org> |
powerpc: Remove broken and complicated kdump system reset code We have a lot of complicated logic that handles possible recursion between kdump and a system reset exception. We can solve this in a much simpler way using the same setjmp/longjmp tricks xmon does. As a first step, this patch removes the old system reset code. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
58154c8ce71a7854d969d73468fd00e5eeeab708 |
|
30-Nov-2011 |
Anton Blanchard <anton@samba.org> |
powerpc: Give us time to get all oopses out before panicking I've been seeing truncated output when people send system reset info to me. We should see a backtrace for every CPU, but the panic() code takes the box down before they all make it out to the console. The panic code runs unlocked so we also see corrupted console output. If we are going to panic, then delay 1 second before calling into the panic code. Move oops_exit inside the die lock and put a newline between oopses for clarity. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
b95bc2191412f5ecf2781c966110a13fa82a80d3 |
|
06-Oct-2011 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc: Remove extraneous CONFIG_PPC_ADV_DEBUG_REGS define All of DebugException is already protected by CONFIG_PPC_ADV_DEBUG_REGS there is no need to have another such ifdef inside the function. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
37caf9f2a1b99d11ba71e17168d221da9ca13f24 |
|
27-Aug-2011 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/fsl-booke: Handle L1 D-cache parity error correctly on e500mc If the L1 D-Cache is in write shadow mode the HW will auto-recover the error. However we might still log the error and cause a machine check (if L1CSR0[CPE] - Cache error checking enable). We should only treat the non-write shadow case as non-recoverable. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
685659ee70db0bac47ffd619c726cf600e504fd7 |
|
15-Jun-2011 |
yu liu <yu.liu@freescale.com> |
powerpc/e500: Save SPEFCSR in flush_spe_to_thread() giveup_spe() saves the SPE state which is protected by MSR[SPE]. However, modifying SPEFSCR does not trap when MSR[SPE]=0. And since SPEFSCR is already saved/restored in _switch(), not all the callers want to save SPEFSCR again. Thus, saving SPEFSCR should not belong to giveup_spe(). This patch moves SPEFSCR saving to flush_spe_to_thread(), and cleans up the caller that needs to save SPEFSCR accordingly. Signed-off-by: Liu Yu <yu.liu@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
|
76462232c21dc011462522387ddad0598a4f11e4 |
|
04-Jun-2011 |
Christian Dietrich <christian.dietrich@informatik.uni-erlangen.de> |
arch/powerpc: use printk_ratelimited instead of printk_ratelimit Since printk_ratelimit() shouldn't be used anymore (see comment in include/linux/printk.h), replace it with printk_ratelimited. Signed-off-by: Christian Dietrich <christian.dietrich@informatik.uni-erlangen.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
82a9a4809f4cb4ce3f17da99a8150df8455fa096 |
|
16-Jun-2011 |
Scott Wood <scottwood@freescale.com> |
powerpc/e500: fix breakage with fsl_rio_mcheck_exception The wrong MCSR bit was being used on e500mc. MCSR_BUS_RBERR only exists on e500v1/v2. Use MCSR_LD on e500mc, and remove all MCSR checking in fsl_rio_mcheck_exception as we now no longer call that function if the appropriate bit in MCSR is not set. If RIO support was enabled at compile-time, but was never probed, just return from fsl_rio_mcheck_exception rather than dereference a NULL pointer. TODO: There is still a remaining, though comparitively minor, issue in that this recovery mechanism will falsely engage if there's an unrelated MCSR_LD event at the same time as a RIO error. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
cce1f106c64dc1d19d5e9406320fde18dfc662df |
|
18-Nov-2010 |
Shaohui Xie <b21989@freescale.com> |
powerpc/fsl_rio: move machine_check handler Add support for machine_check support into machine_check_e500 and machine_check_e500mc. Signed-off-by: Shaohui Xie <b21989@freescale.com> Cc: Li Yang <leoli@freescale.com> Cc: Roy Zang <tie-fei.zang@freescale.com> Cc: Alexandre Bounine <alexandre.bounine@idt.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
82a3242e11d9e63c8195be46c954efaefee35e22 |
|
13-May-2011 |
Greg Kroah-Hartman <gregkh@suse.de> |
sysfs: remove "last sysfs file:" line from the oops messages On some arches (x86, sh, arm, unicore, powerpc) the oops message would print out the last sysfs file accessed. This was very useful in finding a number of sysfs and driver core bugs in the 2.5 and early 2.6 development days, but it has been a number of years since this file has actually helped in debugging anything that couldn't also be trivially determined from the stack traceback. So it's time to delete the line. This is good as we need all the space we can get for oops messages at times on consoles. Acked-by: Phil Carmody <ext-phil.2.carmody@nokia.com> Acked-by: Ingo Molnar <mingo@elte.hu> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|
104699c0ab473535793b5fea156adaf309afd29b |
|
28-Apr-2011 |
KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com> |
powerpc: Convert old cpumask API into new one Adapt new API. Almost change is trivial. Most important change is the below line because we plan to change task->cpus_allowed implementation. - ctx->cpus_allowed = current->cpus_allowed; Signed-off-by: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
9f0b079320ad1cc71ad7ea4e0ed0b64cd72bbd6d |
|
07-Apr-2011 |
Michael Ellerman <michael@ellerman.id.au> |
powerpc: Use MSR_64BIT in places Use the new MSR_64BIT in a few places. Some of these are already ifdef'ed for BOOKE vs BOOKS, but it's still clearer, MSR_SF does not immediately parse as "MSR bit for 64bit". Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
efcac6589a277c10060e4be44b9455cf43838dc1 |
|
02-Mar-2011 |
Alexey Kardashevskiy <aik@au1.ibm.com> |
powerpc: Per process DSCR + some fixes (try#4) The DSCR (aka Data Stream Control Register) is supported on some server PowerPC chips and allow some control over the prefetch of data streams. This patch allows the value to be specified per thread by emulating the corresponding mfspr and mtspr instructions. Children of such threads inherit the value. Other threads use a default value that can be specified in sysfs - /sys/devices/system/cpu/dscr_default. If a thread starts with non default value in the sysfs entry, all children threads inherit this non default value even if the sysfs value is changed later. Signed-off-by: Alexey Kardashevskiy <aik@au1.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
25985edcedea6396277003854657b5f3cb31a628 |
|
31-Mar-2011 |
Lucas De Marchi <lucas.demarchi@profusion.mobi> |
Fix common misspellings Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
|
e49b1fae0ba4d06b29bd753a961abb447566bf4a |
|
11-Jan-2011 |
Anton Blanchard <anton@samba.org> |
powerpc: Don't silently handle machine checks from userspace If a machine check comes from userspace we send a SIGBUS to the task and fail to printk anything. If we are taking machine checks due to bad hardware we want to know about it right away. Furthermore if we don't complain loudly then it will look a lot like a bug in the userspace application, potentially causing a lot of confusion. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
dfb5509f8f49ffd52922060c830978ed5a9b9731 |
|
11-Jan-2011 |
Anton Blanchard <anton@samba.org> |
powerpc: Remove duplicate debugger hook in machine_check_exception We are calling debugger_fault_handler twice in machine_check_exception. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
a443506b8598bbd784cfe403ad1db2c7083ff465 |
|
11-Jan-2011 |
Anton Blanchard <anton@samba.org> |
powerpc: Don't force MSR_RI in machine_check_exception We should never force MSR_RI on. If we take a machine check with MSR_RI off then we have no chance of recovering safely. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
4490c06b581ad7d6392bb398960ef86dfd203a91 |
|
08-Oct-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/fsl-booke: Add support for FSL 64-bit e5500 core The new e5500 core is similar to the e500mc core but adds 64-bit support. We support running it in 32-bit mode as it is identical to the e500mc. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
e3145b387a02d4bf8b8033b1354d413fc0864494 |
|
09-Jul-2010 |
Benjamin Herrenschmidt <benh@kernel.crashing.org> |
powerpc/book3e: Move doorbell_exception from traps.c to dbell.c ... where it belongs Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
2538c2d08f46141550a1e68819efa8fe31c6e3dc |
|
15-Jun-2010 |
K.Prasad <prasad@linux.vnet.ibm.com> |
powerpc, hw_breakpoint: Handle concurrent alignment interrupts If an alignment interrupt occurs on an instruction that is being single-stepped, the alignment interrupt handler currently handles the single-step condition by unconditionally sending a SIGTRAP to the process. Other synchronous interrupts that result in the instruction being emulated do likewise. With hw_breakpoint support, the hw_breakpoint code needs to be able to intercept these single-step events as well as those where the instruction executes normally and a trace interrupt happens. Fix this by making emulate_single_step() use the existing single_step_exception() function instead of calling _exception() directly. We then make single_step_exception() use the abstracted clear_single_step() rather than clearing bits in the MSR image directly so that emulate_single_step() will continue to work correctly on Book 3E processors. Signed-off-by: K.Prasad <prasad@linux.vnet.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
fe04b1121511a97982a1fcdd38e44d2029304a6d |
|
08-Apr-2010 |
Scott Wood <scottwood@freescale.com> |
powerpc/e500mc: Implement machine check handler. Most of the MSCR bit assigments are different in e500mc versus e500, and they are now write-one-to-clear. Some e500mc machine check conditions are made recoverable (as long as they aren't stuck on), most notably L1 instruction cache parity errors. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
ba797b28131b1f1367b662936ea370239d603cff |
|
21-May-2010 |
Jason Wessel <jason.wessel@windriver.com> |
powerpc,kgdb: Introduce low level trap catching The only way the debugger can handle a trap in inside rcu_lock, notify_die, or atomic_notifier_call_chain without a recursive fault is to allow the kernel debugger to handle the exception first in program_check_exception(). The other change here is to make sure that kgdb_handle_exception() is called with correct parameters when catching an oops, because kdb needs to know if the entry was an oops, single step, or breakpoint exception. [benh@kernel.crashing.org: move debugger_bpt instead of #ifdef] CC: Paul Mackerras <paulus@samba.org> Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
fc5e709731429bc2db27897630e7c0089f297680 |
|
05-Mar-2010 |
Dave Kleikamp <shaggy@linux.vnet.ibm.com> |
powerpc/476: add machine check handler for 47x core The 47x core's MCSR varies from 44x, so it needs it's own machine check handler. Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
|
5a0e3ad6af8660be21ca98a971cd00f331318c05 |
|
24-Mar-2010 |
Tejun Heo <tj@kernel.org> |
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
|
b8f87782e82709d613c5d2a165d1443478e57c00 |
|
18-Feb-2010 |
Thomas Gleixner <tglx@linutronix.de> |
powerpc: Convert die.lock to raw_spinlock die.lock needs to be a real spinlock in RT. Convert it to raw_spinlock. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
3bffb6529cf10d48a97ac0d6d789986894c25c37 |
|
08-Feb-2010 |
Dave Kleikamp <shaggy@linux.vnet.ibm.com> |
powerpc/booke: Add support for advanced debug registers powerpc/booke: Add support for advanced debug registers From: Dave Kleikamp <shaggy@linux.vnet.ibm.com> Based on patches originally written by Torez Smith. This patch defines context switch and trap related functionality for BookE specific Debug Registers. It adds support to ptrace() for setting and getting BookE related Debug Registers Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com> Cc: Torez Smith <lnxtorez@linux.vnet.ibm.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: David Gibson <dwg@au1.ibm.com> Cc: Josh Boyer <jwboyer@linux.vnet.ibm.com> Cc: Kumar Gala <galak@kernel.crashing.org> Cc: Sergio Durigan Junior <sergiodj@br.ibm.com> Cc: Thiago Jung Bauermann <bauerman@br.ibm.com> Cc: linuxppc-dev list <Linuxppc-dev@ozlabs.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
172ae2e7f8ff9053905a36672453a6d2ff95b182 |
|
08-Feb-2010 |
Dave Kleikamp <shaggy@linux.vnet.ibm.com> |
powerpc/booke: Introduce new CONFIG options for advanced debug registers powerpc/booke: Introduce new CONFIG options for advanced debug registers From: Dave Kleikamp <shaggy@linux.vnet.ibm.com> Introduce new config options to simplify the ifdefs pertaining to the advanced debug registers for booke and 40x processors: CONFIG_PPC_ADV_DEBUG_REGS - boolean: true for dac-based processors CONFIG_PPC_ADV_DEBUG_IACS - number of IAC registers CONFIG_PPC_ADV_DEBUG_DACS - number of DAC registers CONFIG_PPC_ADV_DEBUG_DVCS - number of DVC registers CONFIG_PPC_ADV_DEBUG_DAC_RANGE - DAC ranges supported Beginning conservatively, since I only have the facilities to test 440 hardware. I believe all 40x and booke platforms support at least 2 IAC and 2 DAC registers. For 440, 4 IAC and 2 DVC registers are enabled, as well as the DAC ranges. Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com> Acked-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
89713ed10815401a1bfe12e3a076b64048381b56 |
|
31-Jan-2010 |
Anton Blanchard <anton@samba.org> |
powerpc: Add timer, performance monitor and machine check counts to /proc/interrupts With NO_HZ it is useful to know how often the decrementer is going off. The patch below adds an entry for it and also adds it into the /proc/stat summaries. While here, I added performance monitoring and machine check exceptions. I found it useful to keep an eye on the PMU exception rate when using the perf tool. Since it's possible to take a completely handled machine check on a System p box it also sounds like a good idea to keep a machine check summary. The event naming matches x86 to keep gratuitous differences to a minimum. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
66fcb1059deeae072c1bf1536a8e2613028bce3e |
|
07-Feb-2010 |
Anton Blanchard <anton@samba.org> |
powerpc: Add last sysfs file and dump of ftrace buffer to oops printout Add printout of last accessed sysfs file, added to x86 in ae87221d3ce49d9de1e43756da834fd0bf05a2ad (sysfs: crash debugging) Also add the notify_die hook that allows us to print out the ftrace buffer on oops. This is useful in conjunction with ftrace function_graph: Oops: Kernel access of bad area, sig: 11 [#1] SMP NR_CPUS=128 NUMA pSeries last sysfs file: /sys/class/net/tunl0/type Dumping ftrace buffer: ... 0) | .sysrq_handle_crash() { 0) 0.476 us | .hash_page(); 0) 0.488 us | .xmon_fault_handler(); 0) | .bad_page_fault() { 0) | .search_exception_tables() { 0) 0.590 us | .search_module_extables(); 0) 2.546 us | } 0) | .printk() { 0) | .vprintk() { 0) 0.488 us | ._raw_spin_lock(); 0) 0.572 us | .emit_log_char(); Showing the function graph of a sysrq-c crash. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
5be3492f972b73051ead7ecbac6fb9efd1e8e0ec |
|
12-Jan-2010 |
Anton Blanchard <anton@samba.org> |
powerpc: Mark some variables in the page fault path __read_mostly Using perf to trace L1 dcache misses and dumping data addresses I found a few variables taking a lot of misses. Since they are almost never written, they should go into the __read_mostly section. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
25baa35befeebe6a4a8d8d12a4fc5b95918bda54 |
|
16-Dec-2009 |
Oleg Nesterov <oleg@redhat.com> |
ptrace: powerpc: implement user_single_step_siginfo() Suggested by Roland. Implement user_single_step_siginfo() for powerpc. Signed-off-by: Oleg Nesterov <oleg@redhat.com> Acked-by: Roland McGrath <roland@redhat.com> Cc: <linux-arch@vger.kernel.org> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
a0592d42fe3e12966db02f5c41f1edae2e59c490 |
|
10-Nov-2009 |
Benjamin Herrenschmidt <benh@kernel.crashing.org> |
powerpc: kill the obsolete code under is_global_init() The code under "if (is_global_init())" is bogus, and is_global_init() itself is not right in mt case. Contrary to what the comment says, nowadays force_sig_info() does kill init even if the handler is SIG_DFL. Note that force_sig_info() clears SIGNAL_UNKILLABLE exactly for this case. Signed-off-by: Oleg Nesterov <oleg@redhat.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
eecff81d1fcda22cd0029d11fe2a71dceed11dad |
|
27-Oct-2009 |
Anton Blanchard <anton@samba.org> |
powerpc: Create PPC_WARN_ALIGNMENT to match PPC_WARN_EMULATED perf_event wants a separate event for alignment and emulation faults, so create another emulation event. This will make it easy to hook in perf_event at one spot. We pass in regs which will be required for these events. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
ec097c84dff17511f2693e6ef6c3064dfbf0a3af |
|
28-May-2009 |
Roland McGrath <roland@redhat.com> |
powerpc: Add PTRACE_SINGLEBLOCK support Reworked by: Benjamin Herrenschmidt <benh@kernel.crashing.org> This adds block-step support on powerpc, including a PTRACE_SINGLEBLOCK request for ptrace. The BookE implementation is tweaked to fire a single step after a block step in order to mimmic the server behaviour. Signed-off-by: Roland McGrath <roland@redhat.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
80947e7c99c29ce3a78bdc1933b310468455a82f |
|
18-May-2009 |
Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> |
powerpc: Keep track of emulated instructions If CONFIG_PPC_EMULATED_STATS is enabled, make available counters for the various classes of emulated instructions under /sys/kernel/debug/powerpc/emulated_instructions/ (assumed debugfs is mounted on /sys/kernel/debug). Optionally (controlled by /sys/kernel/debug/powerpc/emulated_instructions/do_warn), rate-limited warnings can be printed to the console when instructions are emulated. Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
620165f971753c2c451c880796bac7cd66f3534a |
|
12-Feb-2009 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc: Add support for using doorbells for SMP IPI The e500mc supports the new msgsnd/doorbell mechanisms that were added in the Power ISA 2.05 architecture. We use the normal level doorbell for doing SMP IPIs at this point. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
16c57b3620d77e0bc981da5ef32beae730512684 |
|
10-Feb-2009 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc: Unify opcode definitions and support Create a new header that becomes a single location for defining PowerPC opcodes used by code that is either generationg instructions at runtime (fixups, debug, etc.), emulating instructions, or just compiling instructions old assemblers don't know about. We currently don't handle the floating point emulation or alignment decode as both are better handled by the specific decode support they already have. Added support for the new dcbzl, dcbal, msgsnd, tlbilx, & wait instructions since older assemblers don't know about them. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
6a800f36acd5bf06b5fe2cb27c4d0524d60c3df5 |
|
28-Oct-2008 |
Liu Yu <yu.liu@freescale.com> |
powerpc: Add SPE/EFP math emulation for E500v1/v2 processors. This patch add the handlers of SPE/EFP exceptions. The code is used to emulate float point arithmetic, when MSR(SPE) is enabled and receive EFP data interrupt or EFP round interrupt. This patch has no conflict with or dependence on FP math-emu. The code has been tested by TestFloat. Now the code doesn't support SPE/EFP instructions emulation (it won't be called when receive program interrupt), but it could be easily added. Signed-off-by: Liu Yu <yu.liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
9d5a9e74655b9d04d0ec9c8e47801163b7b74211 |
|
27-Jun-2008 |
Adrian Bunk <bunk@kernel.org> |
Remove asm/a.out.h files for all architectures without a.out support. This patch also includes the required removal of (unused) inclusion of <asm/a.out.h> <linux/a.out.h>'s in the arch/ code for these architectures. [dwmw2: updated for 2.6.27-rc] Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
|
d6a61bfc06d6f2248f3e75f208d64e794082013c |
|
23-Jul-2008 |
Luis Machado <luisgpm@linux.vnet.ibm.com> |
powerpc: BookE hardware watchpoint support This patch implements support for HW based watchpoint via the DBSR_DAC (Data Address Compare) facility of the BookE processors. It does so by interfacing with the existing DABR breakpoint code and adding the necessary bits and pieces for the new bits to be properly set or cleared Signed-off-by: Luis Machado <luisgpm@br.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
ce48b2100785e5ca629fb3aa8e3b50aca808f692 |
|
25-Jun-2008 |
Michael Neuling <mikey@neuling.org> |
powerpc: Add VSX context save/restore, ptrace and signal support This patch extends the floating point save and restore code to use the VSX load/stores when VSX is available. This will make FP context save/restore marginally slower on FP only code, when VSX is available, as it has to load/store 128bits rather than just 64bits. Mixing FP, VMX and VSX code will get constant architected state. The signals interface is extended to enable access to VSR 0-31 doubleword 1 after discussions with tool chain maintainers. Backward compatibility is maintained. The ptrace interface is also extended to allow access to VSR 0-31 full registers. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
f82796214a95b1ec00c2f121c1080d10f2b099a1 |
|
26-Jun-2008 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/booke: Add kprobes support for booke style processors This patch is based on work done by Madhvesh. R. Sulibhavi back in March 2007. We refactor some of the single step handling since it differs between "classic" and "booke" powerpc cores. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
7dbb922cea70897dd0e76c6cf8a300b061ca2531 |
|
31-Jan-2008 |
Olof Johansson <olof@lixom.net> |
[POWERPC] Fix compilation for CONFIG_DEBUGGER=n and CONFIG_KEXEC=y Looks like "[POWERPC] kdump shutdown hook support" broke builds when CONFIG_DEBUGGER=n and CONFIG_KEXEC=y, such as in g5_defconfig: arch/powerpc/kernel/crash.c: In function 'default_machine_crash_shutdown': arch/powerpc/kernel/crash.c:388: error: '__debugger_fault_handler' undeclared (first use in this function) arch/powerpc/kernel/crash.c:388: error: (Each undeclared identifier is reported only once arch/powerpc/kernel/crash.c:388: error: for each function it appears in.) Move the debugger hooks to under CONFIG_DEBUGGER || CONFIG_KEXEC, since that's when the crash code is enabled. (I should have caught this with my build-script pre-merge, my bad. :( ) Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
47c0bd1ae24c34e851cf0f2b02ef2a6847d7ae15 |
|
21-Dec-2007 |
Benjamin Herrenschmidt <benh@kernel.crashing.org> |
[POWERPC] Reworking machine check handling and Fix 440/440A This adds a cputable function pointer for the CPU-side machine check handling. The semantic is still the same as the old one, the one in ppc_md. overrides the one in cputable, though ultimately we'll want to change that so the CPU gets first. This removes CONFIG_440A which was a problem for multiplatform kernels and instead fixes up the IVOR at runtime from a setup_cpu function. The "A" version of the machine check also tweaks the regs->trap value to differenciate the 2 versions at the C level. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
|
c1469f13de275fc92b051328ea5764a32a5a43c9 |
|
20-Nov-2007 |
Kumar Gala <galak@kernel.crashing.org> |
[POWERPC] Emulate isel (Integer Select) instruction isel (Integer Select) is a new user space instruction in the PowerISA 2.04 spec. Not all processors implement it so lets emulate to ensure code built with isel will run everywhere. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
19c5870c0eefd27c6d09d867465e0571262e05d0 |
|
19-Oct-2007 |
Alexey Dobriyan <adobriyan@openvz.org> |
Use helpers to obtain task pid in printks (arch code) One of the easiest things to isolate is the pid printed in kernel log. There was a patch, that made this for arch-independent code, this one makes so for arch/xxx files. It took some time to cross-compile it, but hopefully these are all the printks in arch code. Signed-off-by: Alexey Dobriyan <adobriyan@openvz.org> Signed-off-by: Pavel Emelyanov <xemul@openvz.org> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
b460cbc581a53cc088ceba80608021dd49c63c43 |
|
19-Oct-2007 |
Serge E. Hallyn <serue@us.ibm.com> |
pid namespaces: define is_global_init() and is_container_init() is_init() is an ambiguous name for the pid==1 check. Split it into is_global_init() and is_container_init(). A cgroup init has it's tsk->pid == 1. A global init also has it's tsk->pid == 1 and it's active pid namespace is the init_pid_ns. But rather than check the active pid namespace, compare the task structure with 'init_pid_ns.child_reaper', which is initialized during boot to the /sbin/init process and never changes. Changelog: 2.6.22-rc4-mm2-pidns1: - Use 'init_pid_ns.child_reaper' to determine if a given task is the global init (/sbin/init) process. This would improve performance and remove dependence on the task_pid(). 2.6.21-mm2-pidns2: - [Sukadev Bhattiprolu] Changed is_container_init() calls in {powerpc, ppc,avr32}/traps.c for the _exception() call to is_global_init(). This way, we kill only the cgroup if the cgroup's init has a bug rather than force a kernel panic. [akpm@linux-foundation.org: fix comment] [sukadev@us.ibm.com: Use is_global_init() in arch/m32r/mm/fault.c] [bunk@stusta.de: kernel/pid.c: remove unused exports] [sukadev@us.ibm.com: Fix capability.c to work with threaded init] Signed-off-by: Serge E. Hallyn <serue@us.ibm.com> Signed-off-by: Sukadev Bhattiprolu <sukadev@us.ibm.com> Acked-by: Pavel Emelianov <xemul@openvz.org> Cc: Eric W. Biederman <ebiederm@xmission.com> Cc: Cedric Le Goater <clg@fr.ibm.com> Cc: Dave Hansen <haveblue@us.ibm.com> Cc: Herbert Poetzel <herbert@13thfloor.at> Cc: Kirill Korotaev <dev@sw.ru> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
d0c3d534a4388a465101b634a95f2ec586415254 |
|
12-Oct-2007 |
Olof Johansson <olof@lixom.net> |
[POWERPC] Implement logging of unhandled signals Implement show_unhandled_signals sysctl + support to print when a process is killed due to unhandled signals just as i386 and x86_64 does. Default to having it off, unlike x86 that defaults on. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
5dd57a1308a7e40e04fb6ecbff170df7a0b92cd8 |
|
18-Sep-2007 |
Scott Wood <scottwood@freescale.com> |
[POWERPC] 8xx: Move softemu8xx.c from arch/ppc Previously, Soft_emulate_8xx was called with no implementation, resulting in build failures whenever building 8xx without math emulation. The implementation is copied from arch/ppc to resolve this issue. However, this sort of minimal emulation is not a very good idea other than for compatibility with existing userspaces, as it's less efficient than soft-float and can mislead users into believing they have soft-float. Thus, it is made a configurable option, off by default. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
75918a4b5998c93ee1ab131fbe64b97b5d0d2315 |
|
20-Sep-2007 |
Olof Johansson <olof@lixom.net> |
[POWERPC] Separate out legacy machine check exception parsers Move out the old-style exception parsers to a separate function, and don't call it on platforms that have a platform-specific handler. It would make sense to move out the generic versions into their platforms instead, but that can be done gradually down the road. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
01f1c735f57548e6b862e815cc845e452405643d |
|
04-Sep-2007 |
Olof Johansson <olof@lixom.net> |
[POWERPC] Remove unused platform_machine_check() Remove leftover cruft from ARCH=ppc. There are no users of platform_machine_check() in ARCH=powerpc, and none should be added (they should use ppc_md.machine_check_handler instead). Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
86d7a9a9c4775f864e6bc5f5da66ef9ea3715734 |
|
02-Aug-2007 |
Becky Bruce <becky.bruce@freescale.com> |
[POWERPC] Fix FSL BookE machine check reporting Reserved MCSR bits on FSL BookE parts may have spurious values when mcheck occurs. Mask these off when printing the MCSR to avoid confusion. Also, get rid of the MCSR_GL_CI bit defined for e500 - this bit doesn't actually have any meaning. Signed-off-by: Becky Bruce <becky.bruce@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
bcdcd8e725b923ad7c0de809680d5d5658a7bf8c |
|
17-Jul-2007 |
Pavel Emelianov <xemul@openvz.org> |
Report that kernel is tainted if there was an OOPS If the kernel OOPSed or BUGed then it probably should be considered as tainted. Thus, all subsequent OOPSes and SysRq dumps will report the tainted kernel. This saves a lot of time explaining oddities in the calltraces. Signed-off-by: Pavel Emelianov <xemul@openvz.org> Acked-by: Randy Dunlap <randy.dunlap@oracle.com> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> [ Added parisc patch from Matthew Wilson -Linus ] Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
608e2619682e951f525b08e7a48669a3c0263b41 |
|
16-Jul-2007 |
Heiko Carstens <heiko.carstens@de.ibm.com> |
generic bug: use show_regs() instead of dump_stack() The current generic bug implementation has a call to dump_stack() in case a WARN_ON(whatever) gets hit. Since report_bug(), which calls dump_stack(), gets called from an exception handler we can do better: just pass the pt_regs structure to report_bug() and pass it to show_regs() in case of a warning. This will give more debug informations like register contents, etc... In addition this avoids some pointless lines that dump_stack() emits, since it includes a stack backtrace of the exception handler which is of no interest in case of a warning. E.g. on s390 the following lines are currently always present in a stack backtrace if dump_stack() gets called from report_bug(): [<000000000001517a>] show_trace+0x92/0xe8) [<0000000000015270>] show_stack+0xa0/0xd0 [<00000000000152ce>] dump_stack+0x2e/0x3c [<0000000000195450>] report_bug+0x98/0xf8 [<0000000000016cc8>] illegal_op+0x1fc/0x21c [<00000000000227d6>] sysc_return+0x0/0x10 Acked-by: Jeremy Fitzhardinge <jeremy@goop.org> Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: Andi Kleen <ak@suse.de> Cc: Kyle McMartin <kyle@parisc-linux.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
1eeb66a1bb973534dc3d064920a5ca683823372e |
|
08-May-2007 |
Christoph Hellwig <hch@lst.de> |
move die notifier handling to common code This patch moves the die notifier handling to common code. Previous various architectures had exactly the same code for it. Note that the new code is compiled unconditionally, this should be understood as an appel to the other architecture maintainer to implement support for it aswell (aka sprinkling a notify_die or two in the proper place) arm had a notifiy_die that did something totally different, I renamed it to arm_notify_die as part of the patch and made it static to the file it's declared and used at. avr32 used to pass slightly less information through this interface and I brought it into line with the other architectures. [akpm@linux-foundation.org: build fix] [akpm@linux-foundation.org: fix vmalloc_sync_all bustage] [bryan.wu@analog.com: fix vmalloc_sync_all in nommu] Signed-off-by: Christoph Hellwig <hch@lst.de> Cc: <linux-arch@vger.kernel.org> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
ae7f4463773dafac52d70c9803f283afe27ab1e3 |
|
21-Mar-2007 |
anton@samba.org <anton@samba.org> |
[POWERPC] Fix backwards ? : when printing machine type Looks like someone got this backwards, highlighting the perils of the ? : !!! :) Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
34c2a14fc20e4ab878fbf87e5f7fe1cff6afb3d4 |
|
21-Mar-2007 |
anton@samba.org <anton@samba.org> |
[POWERPC] Handle recursive oopses Handle recursive oopses, like on x86. We had a few cases recently where we locked up in oops printing and didnt make it into crashdump. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
6031d9d9ad905b514bf45572bd1877fe6b5145ab |
|
21-Mar-2007 |
anton@samba.org <anton@samba.org> |
[POWERPC] Clean up pmac_backlight_unblank in oops path Move pmac_backlight_unblank into its own function and only take the pmac_backlight_mutex when we are on a pmac for that added bit of paranoia. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
293e4688fe2fec87fccf84a3b1100b27191424e9 |
|
21-Mar-2007 |
anton@samba.org <anton@samba.org> |
[POWERPC] Add missing oops_enter/oops_exit Add missing oops_enter/oops_exit, makes pause_on_oops boot parameter work. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
599a52d12629394236d785615808845823875868 |
|
11-Feb-2007 |
Richard Purdie <rpurdie@rpsys.net> |
backlight: Separate backlight properties from backlight ops pointers Per device data such as brightness belongs to the indivdual device and should therefore be separate from the the backlight operation function pointers. This patch splits the two types of data and allows simplifcation of some code. Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
|
28ee086d5b36aab2931f6740e409bb0fb6c65e5f |
|
08-Feb-2007 |
Richard Purdie <rpurdie@rpsys.net> |
backlight: Fix external uses of backlight internal semaphore backlight_device->sem has a very specific use as documented in the header file. The external users of this are using it for a different reason, to serialise access to the update_status() method. backlight users were supposed to implement their own internal serialisation of update_status() if needed but everyone is doing things differently and incorrectly. Therefore add a global mutex to take care of serialisation for everyone, once and for all. Locking for get_brightness remains optional since most users don't need it. Also update the lcd class in a similar way. Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
|
5fad293bcbd48d9a2370020cf60e4b4a42559b12 |
|
07-Feb-2007 |
Kumar Gala <galak@kernel.crashing.org> |
[POWERPC] Fixup error handling when emulating a floating point instruction When we do full FP emulation its possible that we need to post a SIGFPE based on the results of the emulation. The previous code ignored this case completely. Additionally, the Soft_emulate_8xx case had two issues. One, we should never generate a SIGFPE since the code only does data movement. Second, we were interpreting the return codes incorrectly, it returns 0 on success, 1 on illop and -EFAULT on a data access error. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
04903a30a327513b97c1271fc6bc4dad6502d1b8 |
|
07-Feb-2007 |
Kumar Gala <galak@kernel.crashing.org> |
[POWERPC] Enable interrupts if we are doing fp math emulation Anytime we are emulating an instruction we are going to be doing some form of get_user() to get the instruction image to decode. Since get_user() might sleep we need to ensure we have interrupts enabled or we might see something like: Debug: sleeping function called from invalid context at arch/powerpc/kernel/traps.c:697 in_atomic():0, irqs_disabled():1 Call Trace: [D6023EB0] [C0007F84] show_stack+0x58/0x174 (unreliable) [D6023EE0] [C0022C34] __might_sleep+0xbc/0xd0 [D6023EF0] [C000D158] program_check_exception+0x1d8/0x4fc [D6023F40] [C000E744] ret_from_except_full+0x0/0x4c --- Exception: 700 at 0x102a7100 LR = 0xdb9ef04 However, we want to ensure that interrupts are disabled when handling a trap exception that might be used for a kernel breakpoint. This is why ProgramCheck is marked as EXC_XFER_STD instead of EXC_XFER_EE. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
60bccbed6f53c953c62bdc2ac699395a13b6eecc |
|
19-Dec-2006 |
Akinobu Mita <akinobu.mita@gmail.com> |
[POWERPC] Use is_init() instead of pid==1 Use is_init() rather than hard coded pid comparison. Cc: Anton Blanchard <anton@samba.org> Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
73c9ceab40b1269d6195e556773167c078ac8311 |
|
08-Dec-2006 |
Jeremy Fitzhardinge <jeremy@goop.org> |
[POWERPC] Generic BUG for powerpc This makes powerpc use the generic BUG machinery. The biggest reports the function name, since it is redundant with kallsyms, and not needed in general. There is an overall reduction of code, since module_32/64 duplicated several functions. Unfortunately there's no way to tell gcc that BUG won't return, so the BUG macro includes a goto loop. This will generate a real jmp instruction, which is never used. [akpm@osdl.org: build fix] [paulus@samba.org: remove infinite loop in BUG_ON] Signed-off-by: Jeremy Fitzhardinge <jeremy@goop.org> Cc: Andi Kleen <ak@muc.de> Cc: Hugh Dickens <hugh@veritas.com> Cc: Michael Ellerman <michael@ellerman.id.au> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
aa42c69c67f82e88f0726258efe7306708e1cf14 |
|
08-Dec-2006 |
Kim Phillips <kim.phillips@freescale.com> |
[POWERPC] Add support for FP emulation for the e300c2 core The e300c2 has no FPU. Its MSR[FP] is grounded to zero. If an attempt is made to execute a floating point instruction (including floating-point load, store, or move instructions), the e300c2 takes a floating-point unavailable interrupt. This patch adds support for FP emulation on the e300c2 by declaring a new CPU_FTR_FP_TAKES_FPUNAVAIL, where FP unavail interrupts are intercepted and redirected to the ProgramCheck exception path for correct emulation handling. (If we run out of CPU_FTR bits we could look to reclaim this bit by adding support to test the cpu_user_features for PPC_FEATURE_HAS_FPU instead) It adds a nop to the exception path for 32-bit processors with a FPU. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
68a64357d15ae4f596e92715719071952006e83c |
|
12-Nov-2006 |
Benjamin Herrenschmidt <benh@kernel.crashing.org> |
[POWERPC] Merge 32 and 64 bits asm-powerpc/io.h powerpc: Merge 32 and 64 bits asm-powerpc/io.h The rework on io.h done for the new hookable accessors made it easier, so I just finished the work and merged 32 and 64 bits io.h for arch/powerpc. arch/ppc still uses the old version in asm-ppc, there is just too much gunk in there that I really can't be bothered trying to cleanup. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
4393c4f6788cee65095dd838cfeca6edefbfeb52 |
|
01-Nov-2006 |
Benjamin Herrenschmidt <benh@kernel.crashing.org> |
[POWERPC] Make alignment exception always check exception table The alignment exception used to only check the exception table for -EFAULT, not for other errors. That opens an oops window if we can coerce the kernel into getting an alignment exception for other reasons in what would normally be a user-protected accessor, which can be done via some of the futex ops. This fixes it by always checking the exception tables. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
6c4841c2b6c32a134f9f36e5e08857138cc12b10 |
|
13-Oct-2006 |
Anton Blanchard <anton@samba.org> |
[POWERPC] Never panic when taking altivec exceptions from userspace At the moment we rely on a cpu feature bit or a firmware property to detect altivec. If we dont have either of these and the cpu does in fact support altivec we can cause a panic from userspace. It seems safer to always send a signal if we manage to get an 0xf20 exception from userspace. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
c3412dcb75ff4d64b44bedc72761d5707d19edf7 |
|
30-Aug-2006 |
Will Schmidt <will_schmidt@vnet.ibm.com> |
[POWERPC] Emulate power5 popcntb instruction In an attempt to make it easier for a power5 optimized app to run on a power4 or a 970 or random earlier machine, this provides emulation of the popcntb instruction. Signed-off-by: Will Schmidt <will_schmidt@vnet.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
87589f08beaec3e1f8a3af0c72406c845f706821 |
|
23-Aug-2006 |
Paul Mackerras <paulus@samba.org> |
[POWERPC] Correct masks used in emulating some instructions When we get an illegal instruction exception, we check to see whether the instruction is one that we emulate for the user program. Some of the masks we use in checking whether the offending instruction is one we care about didn't have the top bit set, which is the MSB of the major opcode. Thus some undefined opcodes could get emulated as other (defined but unimplemented) instructions. This corrects the masks. Signed-off-by: Paul Mackerras <paulus@samba.org>
|
b6f35b4966e0ae59cec45e5292b100698d12dc5f |
|
05-Jul-2006 |
Michael Ellerman <michael@ellerman.id.au> |
[POWERPC] Make crash.c work on 32-bit and 64-bit To compile kexec on 32-bit we need a few more bits and pieces. Rather than add empty definitions, we can make crash.c work on 32-bit, with only a couple of kludges. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
eac8392f9591b359847b8a6abb75ca60967bcecd |
|
30-Jun-2006 |
David Wilder <dwilder@us.ibm.com> |
[POWERPC] Make secondary CPUs call into kdump on reset exception In the case of a system hang, the user will invoke soft-reset to initiate the kdump boot. If xmon is enabled, the CPU(s) enter into the xmon debugger. Unfortunately, the secondary CPU(s) will return to the hung state when they exit from the debugger (returned from die() -> system_reset_exception()). This causes a problem in kdump since the hung CPU(s) will not respond to the IPI sent from kdump. This patch fixes the issue by calling crash_kexec_secondary() directly from system_reset_exception() without returning to the previous state. These secondary CPUs wait 5ms until the kdump boot is started by the primary CPU. In the case we exited from the debugger to "recover" (command 'x' in xmon) the primary and the secondary CPUs will all return from die() -> system_reset_exception() ->crash_kexec_secondary() wait 5ms, then return to the previous state. A kdump boot is not started in this case. Signed-off-by: Haren Myneni <haren@us.ibm.com> Signed-off-by: David Wilder <dwilder@us.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
012c437d03cb299814e58ac8d574f7510f5989a5 |
|
14-Aug-2006 |
Horms <horms@verge.net.au> |
[PATCH] Change panic_on_oops message to "Fatal exception" Previously the message was "Fatal exception: panic_on_oops", as introduced in a recent patch whith removed a somewhat dangerous call to ssleep() in the panic_on_oops path. However, Paul Mackerras suggested that this was somewhat confusing, leadind people to believe that it was panic_on_oops that was the root cause of the fatal exception. On his suggestion, this patch changes the message to simply "Fatal exception". A suitable oops message should already have been displayed. Signed-off-by: Simon Horman <horms@verge.net.au> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|
cea6a4ba8acfba6f59cc9ed71e0d05cb770b9d9c |
|
30-Jul-2006 |
Horms <horms@verge.net.au> |
[PATCH] panic_on_oops: remove ssleep() This patch is part of an effort to unify the panic_on_oops behaviour across all architectures that implement it. It was pointed out to me by Andi Kleen that if an oops has occured in interrupt context, then calling sleep() in the oops path will only cause a panic, and that it would be really better for it not to be in the path at all. This patch removes the ssleep() call and reworks the console message accordinly. I have a slght concern that the resulting console message is too long, feedback welcome. For powerpc it also unifies the 32bit and 64bit behaviour. Fror x86_64, this patch only updates the console message, as ssleep() is already not present. Signed-off-by: Horms <horms@verge.net.au> Acked-by: Paul Mackerras <paulus@samba.org> Cc: Russell King <rmk@arm.linux.org.uk> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Andi Kleen <ak@muc.de> Cc: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
|
6ab3d5624e172c553004ecc862bfeac16d9d68b7 |
|
30-Jun-2006 |
Jörn Engel <joern@wohnheim.fh-wedel.de> |
Remove obsolete #include <linux/config.h> Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
|
c0ce7d0886cf0c2579c604eac41a7e125bc0e96d |
|
24-Jun-2006 |
David Wilder <dwilder@us.ibm.com> |
[POWERPC] Add the use of the firmware soft-reset-nmi to kdump. With this patch, kdump uses the firmware soft-reset NMI for two purposes: 1) Initiate the kdump (take a crash dump) by issuing a soft-reset. 2) Break a CPU out of a deadlock condition that is detected during kdump processing. When a soft-reset is initiated each CPU will enter system_reset_exception() and set its corresponding bit in the global bit-array cpus_in_sr then call die(). When die() finds the CPU's bit set in cpu_in_sr crash_kexec() is called to initiate a crash dump. The first CPU to enter crash_kexec() is called the "crashing CPU". All other CPUs are "secondary CPUs". The secondary CPU's pass through to crash_kexec_secondary() and sleep. The crashing CPU waits for all CPUs to enter via soft-reset then boots the kdump kernel (see crash_soft_reset_check()) When the system crashes due to a panic or exception, crash_kexec() is called by panic() or die(). The crashing CPU sends an IPI to all other CPUs to notify them of the pending shutdown. If a CPU is in a deadlock or hung state with interrupts disabled, the IPI will not be delivered. The result being, that the kdump kernel is not booted. This problem is solved with the use of a firmware generated soft-reset. After the crashing_cpu has issued the IPI, it waits for 10 sec for all CPUs to enter crash_ipi_callback(). A CPU signifies its entry to crash_ipi_callback() by setting its corresponding bit in the cpus_in_crash bit array. After 10 sec, if one or more CPUs have not set their bit in cpus_in_crash we assume that the CPU(s) is deadlocked. The operator is then prompted to generate a soft-reset to break the deadlock. Each CPU enters the soft reset handler as described above. Two conditions must be handled at this point: 1) The system crashed because the operator generated a soft-reset. See 2) The system had crashed before the soft-reset was generated ( in the case of a Panic or oops). The first CPU to enter crash_kexec() uses the state of the kexec_lock to determine this state. If kexec_lock is already held then condition 2 is true and crash_kexec_secondary() is called, else; this CPU is flagged as the crashing CPU, the kexec_lock is acquired and crash_kexec() proceeds as described above. Each additional CPUs responding to the soft-reset will pass through crash_kexec() to kexec_secondary(). All secondary CPUs call crash_ipi_callback() readying them self's for the shutdown. When ready they clear their bit in cpus_in_sr. The crashing CPU waits in kexec_secondary() until all other CPUs have cleared their bits in cpus_in_sr. The kexec kernel boot is then started. Signed-off-by: Haren Myneni <haren@us.ibm.com> Signed-off-by: David Wilder <dwilder@us.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
5474c120aafe78ca54bf272f7a01107c42da2b21 |
|
25-Jun-2006 |
Michael Hanselmann <linux-kernel@hansmi.ch> |
[PATCH] Rewritten backlight infrastructure for portable Apple computers This patch contains a total rewrite of the backlight infrastructure for portable Apple computers. Backward compatibility is retained. A sysfs interface allows userland to control the brightness with more steps than before. Userland is allowed to upload a brightness curve for different monitors, similar to Mac OS X. [akpm@osdl.org: add needed exports] Signed-off-by: Michael Hanselmann <linux-kernel@hansmi.ch> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Richard Purdie <rpurdie@rpsys.net> Cc: "Antonino A. Daplas" <adaplas@pol.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
|
e9370ae15dc2f8ba1e1889ce26f13cda565b6ecb |
|
07-Jun-2006 |
Paul Mackerras <paulus@samba.org> |
[PATCH] powerpc: Implement PR_[GS]ET_UNALIGN prctls for powerpc This gives the ability to control whether alignment exceptions get fixed up or reported to the process as a SIGBUS, using the existing PR_SET_UNALIGN and PR_GET_UNALIGN prctls. We do not implement the option of logging a message on alignment exceptions. Signed-off-by: Paul Mackerras <paulus@samba.org>
|
fab5db97e44f76461f76b24adfa8ccb14d4df498 |
|
07-Jun-2006 |
Paul Mackerras <paulus@samba.org> |
[PATCH] powerpc: Implement support for setting little-endian mode via prctl This adds the PowerPC part of the code to allow processes to change their endian mode via prctl. This also extends the alignment exception handler to be able to fix up alignment exceptions that occur in little-endian mode, both for "PowerPC" little-endian and true little-endian. We always enter signal handlers in big-endian mode -- the support for little-endian mode does not amount to the creation of a little-endian user/kernel ABI. If the signal handler returns, the endian mode is restored to what it was when the signal was delivered. We have two new kernel CPU feature bits, one for PPC little-endian and one for true little-endian. Most of the classic 32-bit processors support PPC little-endian, and this is reflected in the CPU feature table. There are two corresponding feature bits reported to userland in the AT_HWCAP aux vector entry. This is based on an earlier patch by Anton Blanchard. Signed-off-by: Paul Mackerras <paulus@samba.org>
|
1a6a4ffef6a405f60b51856725074532c9696ac2 |
|
31-Mar-2006 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc: merge machine_check_exception between ppc32 & ppc64 Make machine_check_exception handling code path the same on ppc32 & ppc64. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
e8222502ee6157e2713da9e0792c21f4ad458d50 |
|
28-Mar-2006 |
Benjamin Herrenschmidt <benh@kernel.crashing.org> |
[PATCH] powerpc: Kill _machine and hard-coded platform numbers This removes statically assigned platform numbers and reworks the powerpc platform probe code to use a better mechanism. With this, board support files can simply declare a new machine type with a macro, and implement a probe() function that uses the flattened device-tree to detect if they apply for a given machine. We now have a machine_is() macro that replaces the comparisons of _machine with the various PLATFORM_* constants. This commit also changes various drivers to use the new macro instead of looking at _machine. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
e041c683412d5bf44dc2b109053e3b837b71742d |
|
27-Mar-2006 |
Alan Stern <stern@rowland.harvard.edu> |
[PATCH] Notifier chain update: API changes The kernel's implementation of notifier chains is unsafe. There is no protection against entries being added to or removed from a chain while the chain is in use. The issues were discussed in this thread: http://marc.theaimsgroup.com/?l=linux-kernel&m=113018709002036&w=2 We noticed that notifier chains in the kernel fall into two basic usage classes: "Blocking" chains are always called from a process context and the callout routines are allowed to sleep; "Atomic" chains can be called from an atomic context and the callout routines are not allowed to sleep. We decided to codify this distinction and make it part of the API. Therefore this set of patches introduces three new, parallel APIs: one for blocking notifiers, one for atomic notifiers, and one for "raw" notifiers (which is really just the old API under a new name). New kinds of data structures are used for the heads of the chains, and new routines are defined for registration, unregistration, and calling a chain. The three APIs are explained in include/linux/notifier.h and their implementation is in kernel/sys.c. With atomic and blocking chains, the implementation guarantees that the chain links will not be corrupted and that chain callers will not get messed up by entries being added or removed. For raw chains the implementation provides no guarantees at all; users of this API must provide their own protections. (The idea was that situations may come up where the assumptions of the atomic and blocking APIs are not appropriate, so it should be possible for users to handle these things in their own way.) There are some limitations, which should not be too hard to live with. For atomic/blocking chains, registration and unregistration must always be done in a process context since the chain is protected by a mutex/rwsem. Also, a callout routine for a non-raw chain must not try to register or unregister entries on its own chain. (This did happen in a couple of places and the code had to be changed to avoid it.) Since atomic chains may be called from within an NMI handler, they cannot use spinlocks for synchronization. Instead we use RCU. The overhead falls almost entirely in the unregister routine, which is okay since unregistration is much less frequent that calling a chain. Here is the list of chains that we adjusted and their classifications. None of them use the raw API, so for the moment it is only a placeholder. ATOMIC CHAINS ------------- arch/i386/kernel/traps.c: i386die_chain arch/ia64/kernel/traps.c: ia64die_chain arch/powerpc/kernel/traps.c: powerpc_die_chain arch/sparc64/kernel/traps.c: sparc64die_chain arch/x86_64/kernel/traps.c: die_chain drivers/char/ipmi/ipmi_si_intf.c: xaction_notifier_list kernel/panic.c: panic_notifier_list kernel/profile.c: task_free_notifier net/bluetooth/hci_core.c: hci_notifier net/ipv4/netfilter/ip_conntrack_core.c: ip_conntrack_chain net/ipv4/netfilter/ip_conntrack_core.c: ip_conntrack_expect_chain net/ipv6/addrconf.c: inet6addr_chain net/netfilter/nf_conntrack_core.c: nf_conntrack_chain net/netfilter/nf_conntrack_core.c: nf_conntrack_expect_chain net/netlink/af_netlink.c: netlink_chain BLOCKING CHAINS --------------- arch/powerpc/platforms/pseries/reconfig.c: pSeries_reconfig_chain arch/s390/kernel/process.c: idle_chain arch/x86_64/kernel/process.c idle_notifier drivers/base/memory.c: memory_chain drivers/cpufreq/cpufreq.c cpufreq_policy_notifier_list drivers/cpufreq/cpufreq.c cpufreq_transition_notifier_list drivers/macintosh/adb.c: adb_client_list drivers/macintosh/via-pmu.c sleep_notifier_list drivers/macintosh/via-pmu68k.c sleep_notifier_list drivers/macintosh/windfarm_core.c wf_client_list drivers/usb/core/notify.c usb_notifier_list drivers/video/fbmem.c fb_notifier_list kernel/cpu.c cpu_chain kernel/module.c module_notify_list kernel/profile.c munmap_notifier kernel/profile.c task_exit_notifier kernel/sys.c reboot_notifier_list net/core/dev.c netdev_chain net/decnet/dn_dev.c: dnaddr_chain net/ipv4/devinet.c: inetaddr_chain It's possible that some of these classifications are wrong. If they are, please let us know or submit a patch to fix them. Note that any chain that gets called very frequently should be atomic, because the rwsem read-locking used for blocking chains is very likely to incur cache misses on SMP systems. (However, if the chain's callout routines may sleep then the chain cannot be atomic.) The patch set was written by Alan Stern and Chandra Seetharaman, incorporating material written by Keith Owens and suggestions from Paul McKenney and Andrew Morton. [jes@sgi.com: restructure the notifier chain initialization macros] Signed-off-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Chandra Seetharaman <sekharan@us.ibm.com> Signed-off-by: Jes Sorensen <jes@sgi.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
|
cd8a5673e9abb3fde0a1c25ee63a60fe1908c6f5 |
|
03-Mar-2006 |
Paul Mackerras <paulus@samba.org> |
powerpc: Fix might-sleep warning in program check exception handler On 32-bit, the exception prolog for the program check exception doesn't enable interrupts early on. If it is an illegal instruction exception, we read the instruction in order to emulate certain instructions, and the get_user of the instruction triggers a WARN_ON since interrupts are still disabled. This adds a local_irq_enable() to enable interrupts before reading the instruction. Signed-off-by: Paul Mackerras <paulus@samba.org>
|
c902be71dc6d5e8473bd021feafc8c3608e2b82a |
|
04-Jan-2006 |
Arnd Bergmann <arnd@arndb.de> |
[PATCH] cell: enable pause(0) in cpu_idle This patch enables support for pause(0) power management state for the Cell Broadband Processor, which is import for power efficient operation. The pervasive infrastructure will in the future enable us to introduce more functionality specific to the Cell's pervasive unit. From: Maximino Aguilar <maguilar@us.ibm.com> Signed-off-by: Arnd Bergmann <arndb@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
555d97ac87aef08bb55dff6f05e68fe2987d6f6d |
|
16-Dec-2005 |
Andy Fleming <afleming@freescale.com> |
[PATCH] powerpc: G4+ oprofile support This patch adds oprofile support for the 7450 and all its multitudinous derivatives. * Added 7450 (and derivatives) support for oprofile * Changed e500 cputable to have oprofile model and cpu_type fields * Added support for classic 32-bit performance monitor interrupt * Cleaned up common powerpc oprofile code to be as common as possible * Cleaned up oprofile_impl.h to reflect 32 bit classic code * Added 32-bit MMCRx bitfield definitions and SPR numbers Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
cc53291521701f9c7c7265bbb3c140563174d8b2 |
|
04-Dec-2005 |
Michael Ellerman <michael@ellerman.id.au> |
[PATCH] powerpc: Add arch dependent basic infrastructure for Kdump. Implementing the machine_crash_shutdown which will be called by crash_kexec (called in case of a panic, sysrq etc.). Disable the interrupts, shootdown cpus using debugger IPI and collect regs for all CPUs. elfcorehdr= specifies the location of elf core header stored by the crashed kernel. This command line option will be passed by the kexec-tools to capture kernel. savemaxmem= specifies the actual memory size that the first kernel has and this value will be used for dumping in the capture kernel. This command line option will be passed by the kexec-tools to capture kernel. Signed-off-by: Haren Myneni <haren@us.ibm.com> Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
a7f290dad32ee34d931561b7943c858fe2aae503 |
|
11-Nov-2005 |
Benjamin Herrenschmidt <benh@kernel.crashing.org> |
[PATCH] powerpc: Merge vdso's and add vdso support to 32 bits kernel This patch moves the vdso's to arch/powerpc, adds support for the 32 bits vdso to the 32 bits kernel, rename systemcfg (finally !), and adds some new (still untested) routines to both vdso's: clock_gettime() with support for CLOCK_REALTIME and CLOCK_MONOTONIC, clock_getres() (same clocks) and get_tbfreq() for glibc to retreive the timebase frequency. Tom,Steve: The implementation of get_tbfreq() I've done for 32 bits returns a long long (r3, r4) not a long. This is such that if we ever add support for >4Ghz timebases on ppc32, the userland interface won't have to change. I have tested gettimeofday() using some glibc patches in both ppc32 and ppc64 kernels using 32 bits userland (I haven't had a chance to test a 64 bits userland yet, but the implementation didn't change and was tested earlier). I haven't tested yet the new functions. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
799d6046d3fb557006e6d7c9767fdb96479b0e0a |
|
10-Nov-2005 |
Paul Mackerras <paulus@samba.org> |
[PATCH] powerpc: merge code values for identifying platforms This patch merges platform codes. systemcfg->platform is no longer used, systemcfg use in general is deprecated as much as possible (and renamed _systemcfg before it gets completely moved elsewhere in a future patch), _machine is now used on ppc64 along as ppc32. Platform codes aren't gone yet but we are getting a step closer. A bunch of asm code in head[_64].S is also turned into C code. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
a31751e04ea738acc8042e5aa1a825901aa7b97f |
|
09-Nov-2005 |
Matt Porter <mporter@kernel.crashing.org> |
[PATCH] ppc32: fix perf_irq extern on e500 Fixes e500 build and cleans up traps.c by moving perf_irq extern to pmc.h. Signed-off-by: Matt Porter <mporter@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
|
570142ca37248291c03df9852a5a0ce97f756464 |
|
07-Nov-2005 |
Anton Blanchard <anton@samba.org> |
[PATCH] ppc64: remove some direct xmon calls Even though we can enable and disable xmon at runtime now, there are a few places in the merge tree that call xmon and xmon_printf directly. In the case below we call die() which will call xmon if it is enabled. Also remove an unnecessary include of xmon.h in smp.c. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
104dd65fef378773ec0510c788bd4b5ad6ea1121 |
|
02-Nov-2005 |
Paul Mackerras <paulus@samba.org> |
powerpc: clean up bug.h further This simplifies the macros which are different between 32-bit and 64-bit. It also fixes a couple of printks on the bug->line element, which is now a long. Signed-off-by: Paul Mackerras <paulus@samba.org>
|
f3f66f599db131ea57dc567ffd931d269dbc690e |
|
01-Nov-2005 |
Arnd Bergmann <arndb@de.ibm.com> |
[PATCH] powerpc: Rename BPA to Cell The official name for BPA is now CBEA (Cell Broadband Engine Architecture). This patch renames all occurences of the term BPA to 'Cell' for easier recognition. Signed-off-by: Arnd Bergmann <arndb@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
25c8a78b1e00ac0cc640677eda78b462c2cd4c6e |
|
27-Oct-2005 |
David Gibson <david@gibson.dropbear.id.au> |
[PATCH] powerpc: Fix handling of fpscr on 64-bit The recent merge of fpu.S broken the handling of fpscr for ARCH=powerpc and CONFIG_PPC64=y. FP registers could be corrupted, leading to strange random application crashes. The confusion arises, because the thread_struct has (and requires) a 64-bit area to save the fpscr, because we use load/store double instructions to get it in to/out of the FPU. However, only the low 32-bits are actually used, so we want to treat it as a 32-bit quantity when manipulating its bits to avoid extra load/stores on 32-bit. This patch replaces the current definition with a structure of two 32-bit quantities (pad and val), to clarify things as much as is possible. The 'val' field is used when manipulating bits, the structure itself is used when obtaining the address for loading/unloading the value from the FPU. While we're at it, consolidate the 4 (!) almost identical versions of cvt_fd() and cvt_df() (arch/ppc/kernel/misc.S, arch/ppc64/kernel/misc.S, arch/powerpc/kernel/misc_32.S, arch/powerpc/kernel/misc_64.S) into a single version in fpu.S. The new version takes a pointer to thread_struct and applies the correct offset itself, rather than a pointer to the fpscr field itself, again to avoid confusion as to which is the correct field to use. Finally, this patch makes ARCH=ppc64 also use the consolidated fpu.S code, which it previously did not. Built for G5 (ARCH=ppc64 and ARCH=powerpc), 32-bit powermac (ARCH=ppc and ARCH=powerpc) and Walnut (ARCH=ppc, CONFIG_MATH_EMULATION=y). Booted on G5 (ARCH=powerpc) and things which previously fell over no longer do. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
f7f6f4fea68d9981d65f99a589ad85f510924d99 |
|
19-Oct-2005 |
David Gibson <david@gibson.dropbear.id.au> |
[PATCH] powerpc: Merge ppc64 pmc.[ch] with ppc32 perfmon.[ch] This patches the ppc32 and ppc64 versions of the headers and .c files with helper functions for manipulating the performance counting hardware. As a side effect, it removes use of the term "perfmon" from ppc32, thus avoiding confusion with the unrelated performance counter interface from HP Labs also called "perfmon". Built, but not booted, for g5, pSeries, iSeries, and 32-bit Powermac with both ARCH=powerpc and ARCH=ppc{,64} as appropriate. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
|
8641778049e75c1da66e66441a6d8b7a2069f607 |
|
10-Oct-2005 |
Paul Mackerras <paulus@samba.org> |
powerpc: Reduce the 32/64-bit differences in traps.c Signed-off-by: Paul Mackerras <paulus@samba.org>
|
8dad3f9257414f151cd821bfe01f54d7f52d2507 |
|
06-Oct-2005 |
Paul Mackerras <paulus@samba.org> |
powerpc: Merge traps.c a bit more This reduces the differences between ppc32 and ppc64 in arch/powerpc/kernel/traps.c a bit further. Signed-off-by: Paul Mackerras <paulus@samba.org>
|
dc1c1ca3dcd94c545c5e01d7c06b46824d43f4d0 |
|
01-Oct-2005 |
Stephen Rothwell <sfr@canb.auug.org.au> |
powerpc: merge idle_power4.S and trapc.s Use idle_power4.S from ppc64 as we are not going to support 32 bit power4 in the merged tree. Merge ppc64 traps.c into powerpc traps.c: use ppc64 versions of exception routine names (as they don't have StudlyCaps) make all the versions if die() have the same prototype Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
|
14cf11af6cf608eb8c23e989ddb17a715ddce109 |
|
26-Sep-2005 |
Paul Mackerras <paulus@samba.org> |
powerpc: Merge enough to start building in arch/powerpc. This creates the directory structure under arch/powerpc and a bunch of Kconfig files. It does a first-cut merge of arch/powerpc/mm, arch/powerpc/lib and arch/powerpc/platforms/powermac. This is enough to build a 32-bit powermac kernel with ARCH=powerpc. For now we are getting some unmerged files from arch/ppc/kernel and arch/ppc/syslib, or arch/ppc64/kernel. This makes some minor changes to files in those directories and files outside arch/powerpc. The boot directory is still not merged. That's going to be interesting. Signed-off-by: Paul Mackerras <paulus@samba.org>
|