2aa799d891299457e4107d33f07a1ed5ac8849ae |
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07-May-2014 |
Thomas Gleixner <tglx@linutronix.de> |
tile: pci: Use irq_alloc/free_hwirq() No functional change. Just convert to the new interface. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Grant Likely <grant.likely@linaro.org> Cc: Tony Luck <tony.luck@intel.com> Cc: Peter Zijlstra <peterz@infradead.org> Acked-by: Chris Metcalf <cmetcalf@tilera.com> Link: http://lkml.kernel.org/r/20140507154338.132662495@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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05d58f6075bfab1f4ef424c6e5a3e22ecc09f015 |
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27-Feb-2014 |
Bjorn Helgaas <bhelgaas@google.com> |
tile PCI RC: Use default pcibios_enable_device() We don't need anything arch-specific in pcibios_enable_device(), so drop the arch implementation and use the default generic one. Note: pci_enable_resources() checks that r->parent is non-NULL, which basically checks that pci_claim_resource() or request_resource() has been called for each BAR. I don't see where that happens for tile, but this patch doesn't change that behavior, so if it worked before, it should still work. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Chris Metcalf <cmetcalf@tilera.com>
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b40f451d56de69477a2244a0b4082f644699673f |
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30-Aug-2013 |
Chris Metcalf <cmetcalf@tilera.com> |
tile PCI RC: make default consistent DMA mask 32-bit This change sets the PCI devices' initial DMA capabilities conservatively and promotes them at the request of the driver, as opposed to assuming advanced DMA capabilities. The old design runs the risk of breaking drivers that assume default capabilities. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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7b770a6a0a8504327224ad891d6862893456290d |
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13-Aug-2013 |
Chris Metcalf <cmetcalf@tilera.com> |
tile: mark pcibios_init() as __init It was bombed away because it was previously marked as __devinit, but it should be an __init function. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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a58674ff8383f5b8f6a77f03c48f6a47840b9325 |
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22-Aug-2013 |
Bjorn Helgaas <bhelgaas@google.com> |
PCI: Simplify pcie_bus_configure_settings() interface Based on a patch by Jon Mason (see URL below). All users of pcie_bus_configure_settings() pass arguments of the form "bus, bus->self->pcie_mpss". The "mpss" argument is redundant since we can easily look it up internally. In addition, all callers check "bus->self" for NULL, which we can also do internally. This patch simplifies the interface and the callers. No functional change. Reference: http://lkml.kernel.org/r/1317048850-30728-2-git-send-email-mason@myri.com Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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ae2031fb29d12d02e9ce4220d5e03e75bb6b7bdf |
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05-Aug-2013 |
Chris Metcalf <cmetcalf@tilera.com> |
tile PCI RC: reduce driver's vmalloc space usage We can take advantage of the fact that bit 29 is hard-wired to zero in register TRIO_TILE_PIO_REGION_SETUP_CFG_ADDR. This is handy since at the moment we only allocate one 4GB region for vmalloc, and with this change we can allocate four or more TRIO MACs without using up all the vmalloc space. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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5026dafa177133f9b6bf0000dfc98596fa4ad2fd |
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05-Aug-2013 |
Chris Metcalf <cmetcalf@tilera.com> |
tile PCI RC: support PCIe TRIO 0 MAC 0 on Gx72 system On Tilera Gx72 systems, the logic for figuring out whether a given port is root complex is slightly different. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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8d9e53b93de7383d5bb4b3507f146bfcd83c6e5d |
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05-Aug-2013 |
Chris Metcalf <cmetcalf@tilera.com> |
tile PCI RC: use proper accessor function Using the low-level hv_dev_pread() API makes assumptions about the layout of datastructures in the Tilera hypervisor API; it's better to use the gxio_XXX accessor and the pcie_trio_ports_property struct. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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eafa5c8a10f52e5d05870a40e2ffb49537d4471f |
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05-Aug-2013 |
Chris Metcalf <cmetcalf@tilera.com> |
tile PCI RC: bomb comments and whitespace format This change is purely stylistic but improves the readability of the tile PCI RC driver. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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1198168733c8d6fbc6898fd8d7fcfb42befabb41 |
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05-Aug-2013 |
Chris Metcalf <cmetcalf@tilera.com> |
tile PCI RC: eliminate pci_controller.mem_resources field The .mem_resources[] field in the pci_controller struct is now obsoleted by the .mem_space and .io_space fields. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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1c43649a9929ca4394ae389b4510c61f3876a12b |
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05-Aug-2013 |
Chris Metcalf <cmetcalf@tilera.com> |
tile PCI RC: restructure TRIO initialization The TRIO shim initialization is shared with other kernel drivers such as the endpoint and StreamIO drivers, so reorganize the initialization flow to ensure that the root complex driver properly initializes TRIO state regardless of what kind of TRIO driver will end up using the shim. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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cf89c4262bd5fa70e67953126001c08ecea4f346 |
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02-Aug-2013 |
Chris Metcalf <cmetcalf@tilera.com> |
tile PCI RC: support I/O space access To enable this functionality, configure CONFIG_TILE_PCI_IO. Without this flag, the kernel still assigns I/O address ranges to the devices, but no TRIO resource and mapping support is provided. We assign disjoint I/O address ranges to separate PCIe domains. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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a3c4f2fb26974b5134861af8f7593040ae61a1f4 |
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02-Aug-2013 |
Chris Metcalf <cmetcalf@tilera.com> |
tile PCI RC: gentler warning for missing plug-in PCI Besides using pr_info() to print the linkdown status for a plug-in slot, add extra indication that this is expected if the slot is empty. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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90d9dd66957a744831146dbb1a9e4f96a9106100 |
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02-Aug-2013 |
Chris Metcalf <cmetcalf@tilera.com> |
tile PCI RC: support more MSI-X interrupt vectors To support PCIe devices with higher number of MSI-X interrupt vectors, e.g. 16 for the LSI RAID card, enhance the Gx RC stack to provide more MSI-X vectors by using the TRIO Scatter Queues, which provide 8 more vectors in addition to ~10 from the Map Mem regions. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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26cde05a2cb7d4c0f4cd1d4aeeadc2939c972786 |
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02-Aug-2013 |
Chris Metcalf <cmetcalf@tilera.com> |
tile PCI RC: handle case that PCI link is already up If we are rebooting (e.g. via kexec) then the PCI RC link may already be up. In that case, we don't want to do the software fixup to force the link up, since that can degrade it to Gen1. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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b3ad73a33ebfd585b3ab551a9fc65d684b82adc3 |
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02-Aug-2013 |
Chris Metcalf <cmetcalf@tilera.com> |
tile PCI RC: tweak the the pcie_rc_delay support Allow longer delays if requested, and print the info messages as we are performing the delay, not when parsing the arguments. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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b881bc469bdbdcca60e75047885509eb9886d3a2 |
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21-Dec-2012 |
Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
ARCH: drivers remove __dev* attributes. This fixes up all of the smaller arches that had __dev* markings for their platform-specific drivers. CONFIG_HOTPLUG is going away as an option. As a result, the __dev* markings need to be removed. This change removes the use of __devinit, __devexit_p, __devinitdata, __devinitconst, and __devexit from these drivers. Based on patches originally written by Bill Pemberton, but redone by me in order to handle some of the coding style issues better, by hand. Cc: Bill Pemberton <wfp5p@virginia.edu> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Paul Mackerras <paulus@samba.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Haavard Skinnemoen <hskinnemoen@gmail.com> Cc: Hans-Christian Egtvedt <egtvedt@samfundet.no> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Mikael Starvik <starvik@axis.com> Cc: Jesper Nilsson <jesper.nilsson@axis.com> Cc: David Howells <dhowells@redhat.com> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Michal Simek <monstr@monstr.eu> Cc: Koichi Yasutake <yasutake.koichi@jp.panasonic.com> Cc: Jonas Bonn <jonas@southpole.se> Cc: "James E.J. Bottomley" <jejb@parisc-linux.org> Cc: Helge Deller <deller@gmx.de> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Chen Liqin <liqin.chen@sunplusct.com> Cc: Lennox Wu <lennox.wu@gmail.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Chris Metcalf <cmetcalf@tilera.com> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Cc: Bob Liu <lliubbo@gmail.com> Cc: Srinivas Kandagatla <srinivas.kandagatla@st.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Myron Stowe <myron.stowe@redhat.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andi Kleen <ak@linux.intel.com> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Thierry Reding <thierry.reding@avionic-design.de> Cc: Greg Ungerer <gerg@uclinux.org> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: "Srivatsa S. Bhat" <srivatsa.bhat@linux.vnet.ibm.com> Cc: Mark Salter <msalter@redhat.com> Cc: Yong Zhang <yong.zhang0@gmail.com> Cc: Michael Holzheu <holzheu@linux.vnet.ibm.com> Cc: Cornelia Huck <cornelia.huck@de.ibm.com> Cc: Jan Glauber <jang@linux.vnet.ibm.com> Cc: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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5955a5966632d0f49cb9418ae437db604db295d9 |
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25-Oct-2012 |
Chris Metcalf <cmetcalf@tilera.com> |
tilegx: remove __init from pci fixup hook Support having the PCI bus be removed at runtime and rediscovered. gregkh@linuxfoundation.org argued for removing __init rather than converting it to __devinit. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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8885b7b637fa9aca7e1b00581a0173c6956966d3 |
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17-Sep-2012 |
Thierry Reding <thierry.reding@avionic-design.de> |
PCI: Provide a default pcibios_update_irq() Most architectures implement this in exactly the same way. Instead of having each architecture duplicate this function, provide a single implementation in the core and make it a weak symbol so that it can be overridden on architectures where it is required. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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3ddbebf878ac8d958bb34e87a742a6b3adc283a3 |
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17-Sep-2012 |
Thierry Reding <thierry.reding@avionic-design.de> |
PCI: Discard __init annotations for pci_fixup_irqs() and related functions Remove the __init annotations in order to keep pci_fixup_irqs() around after init (e.g. for hotplug). This requires the same change for the implementation of pcibios_update_irq() on all architectures. While at it, all __devinit annotations are removed as well, since they will be useless now that HOTPLUG is always on. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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d41ca6dfea695777abfa35eaec863bfe2434ca54 |
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25-Jul-2012 |
Chris Metcalf <cmetcalf@tilera.com> |
tilegx pci: fix semantic merge conflict with 3527ed81c Yinghai Lu removed pci_bus.subordinate in pci-next, which meant that the tile-next changes to add tilegx PCI support don't build. This was expected (seen in linux-next) and this one-line fix is along the same lines as commit b918c62e for all other architectures. Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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f6d2ce00da145ae31ec22d21daca6ca5e22b3c84 |
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18-Jul-2012 |
Chris Metcalf <cmetcalf@tilera.com> |
tile: updates to pci root complex from community feedback Reviewed-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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41bb38fc5398ae878c799647f3c4b25374029afb |
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15-Jun-2012 |
Chris Metcalf <cmetcalf@tilera.com> |
tile pci: enable IOMMU to support DMA for legacy devices This change uses the TRIO IOMMU to map the PCI DMA space and physical memory at different addresses. We also now use the dma_mapping_ops to provide support for non-PCI DMA, PCIe DMA (64-bit) and legacy PCI DMA (32-bit). We use the kernel's software I/O TLB framework (i.e. bounce buffers) for the legacy 32-bit PCI device support since there are a limited number of TLB entries in the IOMMU and it is non-trivial to handle indexing, searching, matching, etc. For 32-bit devices the performance impact of bounce buffers should not be a concern. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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129622672d70711c6c844fb529381ff0dad9085a |
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07-Apr-2012 |
Chris Metcalf <cmetcalf@tilera.com> |
arch/tile: tilegx PCI root complex support This change implements PCIe root complex support for tilegx using the kernel support layer for accessing the TRIO hardware shim. Reviewed-by: Bjorn Helgaas <bhelgaas@google.com> [changes in 07487f3] Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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