| 141c71dd2c00ca7d807138ece55a17c61085c793 |
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11-Mar-2014 |
Jean-Jacques Hiblot <jjhiblot@traphandler.com> |
clk: at91: optimization of the set_rate callback
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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| cce6db80a049b23f867f4afded70ca8027876a08 |
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11-Mar-2014 |
Jean-Jacques Hiblot <jjhiblot@traphandler.com> |
clk: at91: fix programmable clk irq handling
The PCKRDY bit is not set until the system clock is enabled.
This patch moves the management of the ready status in the system clock
driver.
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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| 419f612932674d5f72b1995eda52ca15d87361ef |
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11-Mar-2014 |
Boris BREZILLON <b.brezillon@overkiz.com> |
clk: at91: replace prog clk round_rate with determine_rate
Implement the determine_rate callback to choose the best parent clk that
fulfills the requested rate.
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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| 1f22f8bb64b3619324020b48b03181914b1f5544 |
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11-Oct-2013 |
Boris BREZILLON <b.brezillon@overkiz.com> |
clk: at91: add PMC programmable clocks
This patch adds new at91 programmable clocks implementation using common clk
framework.
A programmable clock is a clock which can be exported on a given pin to clock
external devices.
Each programmable clock is given an id (from 0 to 8).
The number of available programmable clocks depends on the SoC you're using.
Programmable clock driver only implements the clock setting (clock rate and
parent setting). It must be chained to a system clock in order to
enable/disable the generated clock.
The PCKX pins used to output the clock signals must be assigned to the
appropriate peripheral (see atmel's datasheets).
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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