| 8b9dcb6cb7b69e6990bc4134546be5059342916c |
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22-Apr-2014 |
Zhangfei Gao <zhangfei.gao@linaro.org> |
clk: hisi: add hisi_clk_register_gate
Add hisi_clk_register_gate register clk gate table
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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| 156342a1e5719e50e001dec0ee8dfefefebb7606 |
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21-Apr-2014 |
Zhangfei Gao <zhangfei.gao@linaro.org> |
clk: hisi: use clk_register_mux_table in hisi_clk_register_mux
Platform hix5hd2 use mux table, so use clk_register_mux_table instead
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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| 75af25f581b1ffc63e06cb01547b3141d4cd5f58 |
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24-Dec-2013 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
clk: hisi: remove static variable
Remove the static variable. So these common clock register helper could
be used in more SoCs.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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| 0aa0c95f743a06893dbc494b2a75fbf7093330d4 |
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13-Nov-2013 |
Haojian Zhuang <haojian.zhuang@gmail.com> |
clk: hisilicon: add common clock support
Enable common clock driver of Hi3620 SoC. clkgate-seperated driver is
used to support the clock gate that enable/disable/status registers
are seperated.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
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