| 229fd4a505553c3a475b90e9aa8e452f5d78eb3b |
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29-Apr-2014 |
Stephen Boyd <sboyd@codeaurora.org> |
clk: qcom: Add support for banked MD RCGs
The banked MD RCGs in global clock control have a different
register layout than the ones implemented in multimedia clock
control. Add support for these types of clocks so we can change
the rates of the UBI32 clocks.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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| 50c6a50344c58f73c697e2fe38960dc176a2e69f |
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04-Sep-2014 |
Stephen Boyd <sboyd@codeaurora.org> |
clk: qcom: Consolidate frequency finding logic
There are two find_freq() functions in clk-rcg.c and clk-rcg2.c
that are almost exactly the same. Consolidate them into one
function to save on some code space.
Cc: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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| 404c1ff67d241e8503fd46a09d324343aa321a8a |
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11-Jul-2014 |
Stephen Boyd <sboyd@codeaurora.org> |
clk: qcom: Support bypass RCG configuration
In the case of HDMI clocks, we want to bypass the RCG's ability
to divide the output clock and pass through the parent HDMI PLL
rate. Add a simple set of clk_ops to configure the RCG to do
this. This removes the need to keep adding more frequency entries
to the tv_src clock whenever we want to support a new rate.
Tested-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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| bcd61c0f535a04a2aaa3f3ba27e60fae681fc88f |
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15-Jan-2014 |
Stephen Boyd <sboyd@codeaurora.org> |
clk: qcom: Add support for root clock generators (RCGs)
Add support for the root clock generators on Qualcomm devices.
RCGs are highly customizable mux/divider/counter clocks that can
be used to generate almost any rate desired given some input
source that is faster than the desired rate.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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