History log of /drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c
Revision Date Author Comments
3d47fd47f28903f5a9167e95f32a906bd53e13e6 07-Jul-2014 Stephane Viau <sviau@codeaurora.org> drm/msm/mdp5: add support for MDP5 v1.3

MDP5 has several functional blocks (ie: VIG/RGB pipes, LMs, ...).
From one revision to another, these blocks' base addresses might
change due to the number of instances present in the MDP5 hw.
A way of dealing with these offset changes is to introduce
dynamic offsets 'per block'.

This change adds support for the new revision of MDP5: v1.3.
The idea is to define one hw config per MDP version and select
either one of them at runtime, after reading the MDP5 version.

Once the MDP version is known, 'per block' dynamic offsets
are initialized through a global pointer, which is then used for
read/write register access.

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
944fc36c31ed685cf8d3d125eb681ae7198f06fc 10-Jul-2014 Rob Clark <robdclark@gmail.com> drm/msm: use upstream iommu

Downstream kernel IOMMU had a non-standard way of dealing with multiple
devices and multiple ports/contexts. We don't need that on upstream
kernel, so rip out the crazy.

Note that we have to move the pinning of the ringbuffer to after the
IOMMU is attached. No idea how that managed to work properly on the
downstream kernel.

For now, I am leaving the IOMMU port name stuff in place, to simplify
things for folks trying to backport latest drm/msm to device kernels.
Once we no longer have to care about pre-DT kernels, we can drop this
and instead backport upstream IOMMU driver.

Signed-off-by: Rob Clark <robdclark@gmail.com>
3bf6c1ecaecba6290afa6db23155cd8b9865fd6a 17-Jun-2014 Stephane Viau <sviau@codeaurora.org> drm/msm: activate iommu support

This changes activates the iommu support for MDP5, through the
platform config structure.

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
87e956e9be0cdb832e90a4731b620286a8826842 17-Jun-2014 Stephane Viau <sviau@codeaurora.org> drm/msm: fix IOMMU cleanup for -EPROBE_DEFER

If probe fails after IOMMU is attached, we need to detach in order to
clean up properly. Before this change, IOMMU faults would occur if the
probe failed (-EPROBE_DEFER).

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
a0906a023b02366b57eae71c5b9b542d9dd51e4c 02-Jun-2014 Rob Clark <robdclark@gmail.com> drm/msm/mdp5: fix error return value

Signed-off-by: Rob Clark <robdclark@gmail.com>
06c0dd96bfbba8a9368ffd7c4b12d3bfed37001d 30-Nov-2013 Rob Clark <robdclark@gmail.com> drm/msm: add mdp5/apq8x74

Add support for the new MDP5 display controller block. The mapping
between parts of the display controller and KMS is:

plane -> PIPE{RGBn,VIGn} \
crtc -> LM (layer mixer) |-> MDP "device"
encoder -> INTF /
connector -> HDMI/DSI/eDP/etc --> other device(s)

Unlike MDP4, it appears we can get by with a single encoder, rather
than needing a different implementation for DTV, DSI, etc. (Ie. the
register interface is same, just different bases.)

Also unlike MDP4, all the IRQs for other blocks (HDMI, DSI, etc) are
routed through MDP.

And finally, MDP5 has this "Shared Memory Pool" (called "SMP"), from
which blocks need to be allocated to the active pipes based on fetch
stride.

Signed-off-by: Rob Clark <robdclark@gmail.com>