| e887377338ff1f04b4c56249f3947a642e4029bf |
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09-Aug-2014 |
Ben Skeggs <bskeggs@redhat.com> |
drm/gf100-/gr: remove some broken ltc bashing, for now
... and hope that the defaults are good enough. This was always
supposed to be a read/modify/write thing anyway, so we're writing
very wrong stuff for some boards already.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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| 67cfbfdfec9fade9886ff23717023e3149926a49 |
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09-Aug-2014 |
Ben Skeggs <bskeggs@redhat.com> |
drm/gf100-/gr: unhardcode attribute cb config
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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| f331a15f84a94dce6f12cf0b7012174b4a6bf804 |
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09-Aug-2014 |
Ben Skeggs <bskeggs@redhat.com> |
drm/gf100-/gr: unhardcode pagepool config
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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| aa2d58c33a784d6d8daef66a493502bd8fe325af |
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09-Aug-2014 |
Ben Skeggs <bskeggs@redhat.com> |
drm/gf100-/gr: unhardcode bundle cb config
Should be the same values as before, except:
GF117 has smaller buffer allocated, as per register setup.
GK20A now uses values from Tegra driver, not GK104's.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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| a4d4bbf130724c9a9a3dff673eb9342f1dbe2392 |
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02-May-2014 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/graph: add GK20A support
Add a GR device for GK20A based on NVE4, with the correct classes
definitions (GK20A's 3D class is 0xa297).
Most of the NVE4 code can be used on GK20A, so make relevant bits of
NVE4 available to other chips as well.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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