| cf27020d2f253bac6457d6833b97141030f0122a |
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01-Oct-2014 |
Alexandru M Stan <amstan@chromium.org> |
i2c: rk3x: fix 0 length write transfers
i2cdetect -q was broken (everything was a false positive, and no transfers were
actually being sent over i2c). The way it works is by sending a 0 length write
request and checking for NACK. This patch fixes the 0 length writes and actually
sends them.
Reported-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Tested-by: Max Schwarz <max.schwarz@online.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org
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| 29209338b22a61c9ba67badd5f36e96cda1892d8 |
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22-Aug-2014 |
Doug Anderson <dianders@chromium.org> |
i2c: rk3x: Remove unlikely() annotations
Having a transfer more than 32 bits is not all that unlikely. Remove
the annotation.
The unlikely in the IRQ handler can't gain us much. It's not in a
loop, so at most it would save 1 instruction per IRQ, which isn't
much. In fact on the compiler I tested it produced the exact same
code. Remove it too.
Suggested-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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| b4a7bd7a386dc6b0bb49cb47614e06e8295d495a |
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08-Sep-2014 |
addy ke <addy.ke@rock-chips.com> |
i2c: rk3x: fix divisor calculation for SCL frequency
I2C_CLKDIV register descripted in the previous version of
RK3x chip manual is incorrect. Plus 1 is required.
The correct formula:
- T(SCL_HIGH) = T(PCLK) * (CLKDIVH + 1) * 8
- T(SCL_LOW) = T(PCLK) * (CLKDIVL + 1) * 8
- (SCL Divsor) = 8 * ((CLKDIVL + 1) + (CLKDIVH + 1))
- SCL = PCLK / (CLK Divsor)
It will be updated to the latest version of chip manual.
Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org
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| 5da4309f9e1b4de9c2b69e917912fbb84006d44e |
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22-Aug-2014 |
addy ke <addy.ke@rock-chips.com> |
i2c: rk3x: fix bug that cause transfer fails in master receive mode
In rk3x SOC, the I2C controller can receive/transmit up to 32 bytes data
in one chunk, so the size of data to be write/read to/from TXDATAx/RXDATAx
must be less than or equal 32 bytes at a time.
Tested on rk3288-pinky board, elan receive 158 bytes data.
Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Acked-by: Max Schwarz <max.schwarz@online.de>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org
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| 9c5f7cad3acc69ce623d04d646950183a759949e |
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08-Aug-2014 |
addy ke <addy.ke@rock-chips.com> |
i2c: rk3x: fix interrupt handling issue
If slave holds scl, I2C_IPD[7] will be set 1 by controller
for debugging. Driver must ignore it.
[ 5.752391] rk3x-i2c ff160000.i2c: unexpected irq in WRITE: 0x80
[ 5.939027] rk3x-i2c ff160000.i2c: timeout, ipd: 0x80, state: 4
Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org
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| c51bd6acf59f24f2ec4334689329f1741f071621 |
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12-Jun-2014 |
Dan Carpenter <dan.carpenter@oracle.com> |
i2c: rk3x: add NULL entry to the end of_device_id array
drivers/i2c/busses/i2c-rk3x.c:610:69-70: rk3x_i2c_match is not NULL terminated at line 610
Make sure of_device_id tables are NULL terminated
Generated by: /kbuild/src/linux/scripts/coccinelle/misc/of_table.cocci
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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| c41aa3ce938b684d853f1004072b6116a41bb1ce |
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11-Jun-2014 |
Max Schwarz <max.schwarz@online.de> |
i2c: rk3x: add driver for Rockchip RK3xxx SoC I2C adapter
Driver for the native I2C adapter found in Rockchip RK3xxx SoCs.
Configuration is only possible through devicetree. The driver is
interrupt driven and supports the I2C_M_IGNORE_NAK mangling bit.
Signed-off-by: Max Schwarz <max.schwarz@online.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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