| 5535c4dd475ff936d36ad4d3f85d8be74f30245f |
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03-Apr-2014 |
Rocco Folino <lordzen87@gmail.com> |
staging: gs_fpgaboot: Fixed code style issues
Fixed missing a blank line after declarations warning
Signed-off-by: Rocco Folino <lordzen87@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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| 14e6e35d04995c118f41582299f6861ab209bdb3 |
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25-Mar-2014 |
Arnd Bergmann <arnd@arndb.de> |
staging: gs_fpgaboot: remove __TIMESTAMP__ macro
We specifically build the kernel with -Werror=date-time to detect
such macros, which gives us this error:
gs_fpgaboot/gs_fpgaboot.c:376:44: error: macro "__TIMESTAMP__" might prevent reproducible builds [-Werror=date-time]
pr_info("built at %s UTC\n", __TIMESTAMP__);
The obvious fix is to remove the printk output line.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Insop Song <insop.song@gainspeed.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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| c39e9c87eed0d7013760230525033c19f284c3b2 |
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14-Feb-2014 |
Fengguang Wu <fengguang.wu@intel.com> |
staging: fpgaboot: fix coccinelle warnings
drivers/staging/gs_fpgaboot/gs_fpgaboot.c:191:2-3: Unneeded semicolon
Removes unneeded semicolon.
Generated by: coccinelle/misc/semicolon.cocci
CC: Insop Song <insop.song@gainspeed.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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| 00e0d3c3d73f0f99aa6024d42a27f7257f7327dd |
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14-Feb-2014 |
Fengguang Wu <fengguang.wu@intel.com> |
staging: fpgaboot: fix coccinelle warnings
drivers/staging/gs_fpgaboot/gs_fpgaboot.c:305:1-3: WARNING: PTR_RET can be used
Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR
Generated by: coccinelle/api/ptr_ret.cocci
CC: Insop Song <insop.song@gainspeed.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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| e7185c6958ee85b02629d95fe997977bb45e0393 |
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21-Jan-2014 |
Insop Song <insop.song@gainspeed.com> |
staging: fpgaboot: Xilinx FPGA firmware download driver
This driver downloads Xilinx FPGA firmware using gpio pins.
It loads Xilinx FPGA bitstream format firmware image and
program the Xilinx FPGA using SelectMAP (parallel) mode.
Signed-off-by: Insop Song <insop.song@gainspeed.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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