| dcf06a036848b4e8e6c8220f2e00b9adf6f84918 |
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21-Aug-2013 |
Mathias Nyman <mathias.nyman@linux.intel.com> |
xhci: fix port BESL LPM capability checking
Wrong capability bit was checked for best effort service latency.
bit 20 indicate port is BESL LPM capable (BLC),
bit 19 is hardware LPM capable (HLC)
This patch should be backported to kernels as old as 3.11, that
contain the commit a558ccdcc71c7770c5e80c926a31cfe8a3892a09 "usb: xhci:
add USB2 Link power management BESL support"
Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Reported-by: Steve Cotton <steve@s.cotton.clara.co.uk>
Cc: stable@vger.kernel.org
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| a558ccdcc71c7770c5e80c926a31cfe8a3892a09 |
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23-May-2013 |
Mathias Nyman <mathias.nyman@linux.intel.com> |
usb: xhci: add USB2 Link power management BESL support
usb 2.0 devices with link power managment (LPM) can describe their idle link
timeouts either in BESL or HIRD format, so far xHCI has only supported HIRD but
later xHCI errata add BESL support as well
BESL timeouts need to inform exit latency changes with an evaluate
context command the same way USB 3.0 link PM code does.
The same xhci_change_max_exit_latency() function is used as with USB3
but code is pulled out from #ifdef CONFIG_PM as USB2.0 BESL LPM
funcionality does not depend on CONFIG_PM.
Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
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| 95018a53f7653e791bba1f54c8d75d9cb700d1bd |
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30-Mar-2012 |
Alex He <alex.he@amd.com> |
xHCI: Correct the #define XHCI_LEGACY_DISABLE_SMI
Re-define XHCI_LEGACY_DISABLE_SMI and used it in right way. All SMI enable
bits will be cleared to zero and flag bits 29:31 are also cleared to zero.
Other bits should be presvered as Table 146.
This patch should be backported to kernels as old as 2.6.31.
Signed-off-by: Alex He <alex.he@amd.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Cc: stable@vger.kernel.org
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| fc71ff7583b14347fa1cb592b698f088ecff36e3 |
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23-Sep-2011 |
Andiry Xu <andiry.xu@amd.com> |
xHCI: Check host USB2 LPM capability
Check the host's USB2 LPM capability.
USB2 software LPM support is optional for xHCI 0.96 hosts. xHCI 1.0 hosts
should support software LPM, and may support hardware LPM.
Signed-off-by: Andiry Xu <andiry.xu@amd.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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| bdfca5025a159c8bb966e3b87b0c084dd1f831a9 |
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06-Jan-2011 |
Andiry Xu <andiry.xu@amd.com> |
xHCI: prolong host controller halt time limit
xHCI 1.0 spec specifies the xHC shall halt within 16ms after software clears
Run/Stop bit. In xHCI 0.96 spec the time limit is 16 microframes (2ms), it's
too short and often cause dmesg shows "Host controller not halted, aborting
reset." message when rmmod xhci-hcd.
Modify the time limit to comply with xHCI 1.0 specification and prevents the
warning message showing when remove xhci-hcd.
Signed-off-by: Andiry Xu <andiry.xu@amd.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
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| 05197921ff3dad52d99fd1647974c57d9c28d40e |
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10-Feb-2010 |
Edward Shao <laface.tw@gmail.com> |
USB: xhci: Fix finding extended capabilities registers
According "5.3.6 Capability Parameters (HCCPARAMS)" of xHCI rev0.96 spec,
value of xECP register indicates a relative offset, in 32-bit words,
from Base to the beginning of the first extended capability.
The wrong calculation will cause BIOS handoff fail (not handoff from BIOS)
in some platform with BIOS USB legacy sup support.
Signed-off-by: Edward Shao <laface.tw@gmail.com>
Cc: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Cc: stable <stable@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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| 74c6874199af98e602bb7c5fb1beb9cffda98729 |
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28-Apr-2009 |
Sarah Sharp <sarah.a.sharp@linux.intel.com> |
USB: xhci: Support xHCI host controllers and USB 3.0 devices.
This is the first of many patches to add support for USB 3.0 devices and
the hardware that implements the eXtensible Host Controller Interface
(xHCI) 0.95 specification. This specification is not yet publicly
available, but companies can receive a copy by becoming an xHCI
Contributor (see http://www.intel.com/technology/usb/xhcispec.htm).
No xHCI hardware has made it onto the market yet, but these patches have
been tested under the Fresco Logic host controller prototype.
This patch adds the xHCI register sets, which are grouped into five sets:
- Generic PCI registers
- Host controller "capabilities" registers (cap_regs) short
- Host controller "operational" registers (op_regs)
- Host controller "runtime" registers (run_regs)
- Host controller "doorbell" registers
These some of these registers may be virtualized if the Linux driver is
running under a VM. Virtualization has not been tested for this patch.
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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