Lines Matching refs:dtd
146 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
728 struct intel_sdvo_dtd *dtd)
730 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
731 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
735 struct intel_sdvo_dtd *dtd)
737 return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
738 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
742 struct intel_sdvo_dtd *dtd)
745 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
749 struct intel_sdvo_dtd *dtd)
752 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
756 struct intel_sdvo_dtd *dtd)
759 SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
787 struct intel_sdvo_dtd *dtd)
789 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
790 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
792 &dtd->part1, sizeof(dtd->part1)) &&
794 &dtd->part2, sizeof(dtd->part2));
802 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
810 memset(dtd, 0, sizeof(*dtd));
827 dtd->part1.clock = mode_clock;
829 dtd->part1.h_active = width & 0xff;
830 dtd->part1.h_blank = h_blank_len & 0xff;
831 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
833 dtd->part1.v_active = height & 0xff;
834 dtd->part1.v_blank = v_blank_len & 0xff;
835 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
838 dtd->part2.h_sync_off = h_sync_offset & 0xff;
839 dtd->part2.h_sync_width = h_sync_len & 0xff;
840 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
842 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
846 dtd->part2.dtd_flags = 0x18;
848 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
850 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
852 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
854 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
858 const struct intel_sdvo_dtd *dtd)
862 mode.hdisplay = dtd->part1.h_active;
863 mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
864 mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
865 mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
866 mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
867 mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
868 mode.htotal = mode.hdisplay + dtd->part1.h_blank;
869 mode.htotal += (dtd->part1.h_high & 0xf) << 8;
871 mode.vdisplay = dtd->part1.v_active;
872 mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
874 mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
875 mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
876 mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
878 (dtd->part2.v_sync_off_width & 0xf);
879 mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
880 mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
881 mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
883 mode.clock = dtd->part1.clock * 10;
885 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
887 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
891 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1346 struct intel_sdvo_dtd dtd;
1355 ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1362 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1367 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)