| /arch/x86/kernel/apic/ |
| H A D | io_apic.c | 189 * disable_ioapic_support() - disables ioapic support at runtime
208 static struct irq_cfg *alloc_irq_and_cfg_at(unsigned int at, int node);
293 static void free_irq_cfg(unsigned int at, struct irq_cfg *cfg) argument
297 irq_set_chip_data(at, NULL);
303 static struct irq_cfg *alloc_irq_and_cfg_at(unsigned int at, int node) argument
305 int res = irq_alloc_desc_at(at, node);
311 cfg = irq_cfg(at);
316 cfg = alloc_irq_cfg(at, node);
318 irq_set_chip_data(at, cfg);
320 irq_free_desc(at);
[all...] |
| /arch/x86/kernel/cpu/ |
| H A D | perf_event_intel_ds.c | 502 struct bts_record *at, *top; local
514 at = (struct bts_record *)(unsigned long)ds->bts_buffer_base;
517 if (top <= at)
533 if (perf_output_begin(&handle, event, header.size * (top - at)))
536 for (; at < top; at++) {
537 data.ip = at->from;
538 data.addr = at->to;
922 struct pebs_record_core *at, *top; local
928 at
963 void *at, *top; local
[all...] |
| /arch/xtensa/include/asm/ |
| H A D | asmmacro.h | 20 * __loopi ar, at, size, inc
22 * at scratch register used by macro
26 * __loops ar, as, at, inc_log2[, mask_log2][, cond][, ncond]
29 * at scratch register use by macro
38 * __endla ar, at, incr
48 .macro __loopi ar, at, size, incr variable
51 movi \at, ((\size + \incr - 1) / (\incr)) variable
52 loop \at, 99f variable
54 addi \at, \ar, \size
64 .macro __loops ar, as, at, incr_log variable
70 extui \\at, \\at, \\incr_log2, \\mask_log2 variable
72 srli \\at, \\at, \\incr_log2 variable
103 .macro __loopt ar, as, at, incr_log2 variable
106 sub \\at, \\as, \\ar variable
108 addi \\at, \\at, (1 << \\incr_log2) - 1 variable
109 srli \\at, \\at, \\incr_log2 variable
[all...] |
| H A D | cacheasm.h | 34 .macro __loop_cache_all ar at insn size line_width
38 __loopi \ar, \at, \size, (4 << (\line_width)) variable
43 __endla \ar, \at, 4 << (\line_width) variable
48 .macro __loop_cache_range ar as at insn line_width
50 extui \at, \ar, 0, \line_width
51 add \as, \as, \at
53 __loops \ar, \as, \at, \line_width variable
55 __endla \ar, \at, (1 << (\line_width)) variable
60 .macro __loop_cache_page ar at insn line_width
62 __loopi \ar, \at, PAGE_SIZ variable
67 __endla \\ar, \\at, 4 << (\\line_width) variable
[all...] |
| H A D | uaccess.h | 66 * <at> anything (temp register)
70 * <at> destroyed (actually, current)
73 .macro set_fs at, av, sp
74 GET_CURRENT(\at,\sp)
75 s32i \av, \at, THREAD_CURRENT_DS variable
90 * <at> anything (temp register)
95 * <at> destroyed (actually, current->thread.current_ds)
101 .macro kernel_ok at, sp, success
102 get_fs \at, \sp variable
103 beqz \at, \succes variable
129 .macro user_ok aa, as, at, error variable
130 movi \\at, __XTENSA_UL_CONST(TASK_SIZE) variable
131 bgeu \\as, \\at, \\error variable
132 sub \\at, \\at, \\as variable
133 bgeu \\aa, \\at, \\error variable
159 .macro access_ok aa, as, at, sp, error variable
160 kernel_ok \\at, \\sp, .Laccess_ok_\\@ variable
161 user_ok \\aa, \\as, \\at, \\error variable
[all...] |
| /arch/ia64/include/asm/ |
| H A D | pal.h | 128 /* Processor cache type at a particular level in the hierarchy */
156 at : 2, /* 2-1 Cache mem attr*/ member in struct:pal_cache_config_info_1_s::__anon1527
200 #define pcci_cache_attr pcci_info_1.pcci1_bits.at
|
| /arch/mips/kernel/ |
| H A D | pm-cps.c | 7 * Free Software Foundation; either version 2 of the License, or (at your
32 * The code entering & exiting non-coherent states is generated at runtime
34 * memory access at an unfortunate time and to allow the generation of optimal
37 * returns the number of VPEs that were in the wait state at the point this
82 zero, at, v0, v1, a0, a1, a2, a3, enumerator in enum:mips_reg
|
| /arch/mips/math-emu/ |
| H A D | dp_mul.c | 36 u64 at; local
143 at = lrm + (t << 32);
144 hrm += at < lrm;
145 lrm = at;
151 at = lrm + (t << 32);
152 hrm += at < lrm;
153 lrm = at;
|
| H A D | sp_mul.c | 36 unsigned at; local
138 at = lrm + (t << 16);
139 hrm += at < lrm;
140 lrm = at;
144 at = lrm + (t << 16);
145 hrm += at < lrm;
146 lrm = at;
|