/drivers/regulator/ |
H A D | internal.h | 28 unsigned int bypass:1; member in struct:regulator
|
H A D | anatop-regulator.c | 54 bool bypass; member in struct:anatop_regulator 89 sel = anatop_reg->bypass ? LDO_FET_FULL_ON : anatop_reg->sel; 109 if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) { 124 if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) 137 WARN_ON(!anatop_reg->bypass); 139 WARN_ON(anatop_reg->bypass); 141 *enable = anatop_reg->bypass; 150 if (enable == anatop_reg->bypass) 154 anatop_reg->bypass = enable; 284 sreg->bypass [all...] |
H A D | core.c | 418 label = "bypass"; 618 bool bypass; local 621 ret = rdev->desc->ops->get_bypass(rdev, &bypass); 625 else if (bypass) 632 static DEVICE_ATTR(bypass, 0444, 3083 * regulator_allow_bypass - allow the regulator to go into bypass mode 3086 * @enable: enable or disable bypass mode 3088 * Allow the regulator to go into bypass mode if all other consumers 3089 * for the regulator also enable bypass mode and the machine 3107 if (enable && !regulator->bypass) { [all...] |
/drivers/md/bcache/ |
H A D | request.h | 19 unsigned bypass:1; member in struct:data_insert_op::__anon1972::__anon1973
|
H A D | stats.c | 184 bool hit, bool bypass) 186 if (!bypass) 199 bool hit, bool bypass) 202 mark_cache_stats(&dc->accounting.collector, hit, bypass); 203 mark_cache_stats(&c->accounting.collector, hit, bypass); 183 mark_cache_stats(struct cache_stat_collector *stats, bool hit, bool bypass) argument 198 bch_mark_cache_accounting(struct cache_set *c, struct bcache_device *d, bool hit, bool bypass) argument
|
/drivers/clk/socfpga/ |
H A D | clk-pll.c | 27 /* Clock bypass bits */ 55 unsigned long bypass; local 58 bypass = readl(clk_mgr_base_addr + CLKMGR_BYPASS); 59 if (bypass & MAINPLL_BYPASS)
|
/drivers/base/regmap/ |
H A D | regcache.c | 299 unsigned int bypass; local 304 /* Remember the initial bypass state */ 305 bypass = map->cache_bypass; 337 /* Restore the bypass state */ 339 map->cache_bypass = bypass; 367 unsigned int bypass; local 373 /* Remember the initial bypass state */ 374 bypass = map->cache_bypass; 392 /* Restore the bypass state */ 393 map->cache_bypass = bypass; [all...] |
H A D | regmap.c | 1971 bool bypass; local 1975 bypass = map->cache_bypass; 1980 map->cache_bypass = bypass; 2564 bool bypass; local 2583 bypass = map->cache_bypass; 2594 map->cache_bypass = bypass;
|
/drivers/clk/at91/ |
H A D | clk-slow.c | 125 bool bypass) 148 if (bypass) 166 bool bypass; local 171 bypass = of_property_read_bool(np, "atmel,osc-bypass"); 174 bypass); 121 at91_clk_register_slow_osc(void __iomem *sckcr, const char *name, const char *parent_name, unsigned long startup, bool bypass) argument
|
H A D | clk-main.c | 146 bool bypass) 177 if (bypass) 199 bool bypass; local 202 bypass = of_property_read_bool(np, "atmel,osc-bypass"); 209 clk = at91_clk_register_main_osc(pmc, irq, name, parent_name, bypass); 142 at91_clk_register_main_osc(struct at91_pmc *pmc, unsigned int irq, const char *name, const char *parent_name, bool bypass) argument
|
/drivers/gpu/drm/nouveau/core/subdev/clock/ |
H A D | nva3.c | 347 u32 bypass; local 351 bypass = nv_rd32(priv, ctrl) & 0x00000008; 352 if (!bypass) {
|
/drivers/media/usb/dvb-usb/ |
H A D | vp702x.c | 155 static int vp702x_set_pld_mode(struct dvb_usb_adapter *adap, u8 bypass) argument 166 ret = vp702x_usb_in_op(adap->dev, 0xe0, (bypass << 8) | 0x0e, 231 vp702x_set_pld_mode(adap, 1); /* bypass */
|
/drivers/crypto/amcc/ |
H A D | crypto4xx_core.h | 130 u32 bypass; member in struct:crypto4xx_ctx
|
H A D | crypto4xx_reg_def.h | 266 u32 bypass:8; member in struct:ce_pd_ctl_len::__anon497
|
/drivers/irqchip/ |
H A D | irq-gic.c | 358 u32 bypass = 0; local 361 * Preserve bypass disable bits to be written back later 363 bypass = readl(cpu_base + GIC_CPU_CTRL); 364 bypass &= GICC_DIS_BYPASS_MASK; 366 writel_relaxed(bypass | GICC_ENABLE, cpu_base + GIC_CPU_CTRL);
|
/drivers/staging/media/davinci_vpfe/ |
H A D | dm365_resizer.c | 106 resizer_configure_passthru(struct vpfe_resizer_device *resizer, int bypass) argument 125 if (bypass) { 534 param->rsz_common.passthrough = cont_config->bypass; 535 if (cont_config->bypass) 795 param->rsz_common.passthrough = config->bypass; 796 if (config->bypass)
|
H A D | davinci_vpfe_user.h | 915 * 1 - bypass Gamma correction. Data is divided by 16 919 * 1 - bypass Gamma correction. Data is divided by 16 923 * 1 - bypass Gamma correction. Data is divided by 16 1282 unsigned char bypass; member in struct:vpfe_rsz_config_params
|
/drivers/gpu/drm/exynos/ |
H A D | exynos_drm_fimc.c | 103 * @bypass: unused scaler path. 111 bool bypass; member in struct:fimc_scaler 123 * @bypass: scaler bypass mode. 132 u32 bypass; member in struct:fimc_capability 429 /* bypass */ 738 /* bypass */ 778 /* bypass */ 1024 DRM_DEBUG_KMS("range[%d]bypass[%d]up_h[%d]up_v[%d]\n", 1025 sc->range, sc->bypass, s [all...] |
/drivers/infiniband/hw/cxgb3/ |
H A D | cxio_wr.h | 402 struct t3_bypass_wr bypass; member in union:t3_wr
|
/drivers/media/platform/exynos4-is/ |
H A D | fimc-is-param.h | 454 u32 bypass; member in struct:param_control
|
/drivers/net/ethernet/chelsio/cxgb4/ |
H A D | cxgb4.h | 309 unsigned char bypass; member in struct:adapter_params 905 return adap->params.bypass;
|