Searched defs:context (Results 51 - 55 of 55) sorted by relevance

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/arch/sparc/kernel/
H A Dsmp_64.c740 * Otherwise if we send an xcall from interrupt context it will
965 /* See if we need to allocate a new TLB context because
972 spin_lock_irqsave(&mm->context.lock, flags);
974 if (unlikely(!CTX_VALID(mm->context)))
977 spin_unlock_irqrestore(&mm->context.lock, flags);
980 __flush_tlb_mm(CTX_HWBITS(mm->context),
1024 * 2) TLB context numbers are shared globally across all processors
1030 * current cpu's bit set, that tlb context is flushed locally.
1037 * this task to flush the context from the local tlb if the process
1051 * bits of the context registe
1109 unsigned long context = CTX_HWBITS(mm->context); local
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/arch/sparc/mm/
H A Dsrmmu.c74 #define FLUSH_BEGIN(mm) if ((mm)->context != NO_CONTEXT) {
99 /* The context table is a nocache user with the biggest alignment needs. */
371 /* context handling - a dynamically sized pool is used */
412 mm->context = ctxp->ctx_number;
425 ctxp->ctx_mm->context = NO_CONTEXT;
427 mm->context = ctxp->ctx_number;
430 static inline void free_context(int context) argument
434 ctx_old = ctx_list_pool + context;
463 if (mm->context == NO_CONTEXT) {
467 srmmu_ctxd_set(&srmmu_context_table[mm->context], m
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/arch/ia64/kernel/
H A Dunwind.c855 desc_abi (unsigned char abi, unsigned char context, struct unw_state_record *sr)
857 if (abi == 3 && context == 'i') {
862 UNW_DPRINT(0, "unwind%s: ignoring unwabi(abi=0x%x,context=0x%x)\n",
863 __func__, abi, context);
853 desc_abi(unsigned char abi, unsigned char context, struct unw_state_record *sr) argument
/arch/mips/include/asm/sn/sn0/
H A Dhubio.h715 context: 15, /* Bit vector: member in struct:icrbd_s::__anon2155
727 #define icrbd_context icrbd_field_s.context
/arch/x86/kvm/
H A Dmmu.c3452 struct kvm_mmu *context)
3454 context->page_fault = nonpaging_page_fault;
3455 context->gva_to_gpa = nonpaging_gva_to_gpa;
3456 context->sync_page = nonpaging_sync_page;
3457 context->invlpg = nonpaging_invlpg;
3458 context->update_pte = nonpaging_update_pte;
3459 context->root_level = 0;
3460 context->shadow_root_level = PT32E_ROOT_LEVEL;
3461 context->root_hpa = INVALID_PAGE;
3462 context
3451 nonpaging_init_context(struct kvm_vcpu *vcpu, struct kvm_mmu *context) argument
3521 reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, struct kvm_mmu *context) argument
3596 reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu, struct kvm_mmu *context, bool execonly) argument
3711 paging64_init_context_common(struct kvm_vcpu *vcpu, struct kvm_mmu *context, int level) argument
3733 paging64_init_context(struct kvm_vcpu *vcpu, struct kvm_mmu *context) argument
3739 paging32_init_context(struct kvm_vcpu *vcpu, struct kvm_mmu *context) argument
3759 paging32E_init_context(struct kvm_vcpu *vcpu, struct kvm_mmu *context) argument
3767 struct kvm_mmu *context = vcpu->arch.walk_mmu; local
3807 kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *context) argument
3830 kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *context, bool execonly) argument
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