Searched defs:hose (Results 1 - 25 of 87) sorted by relevance

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/arch/powerpc/sysdev/
H A Dgrackle.c56 void __init setup_grackle(struct pci_controller *hose) argument
58 setup_indirect_pci(hose, 0xfec00000, 0xfee00000, 0);
62 grackle_set_loop_snoop(hose, 1);
64 grackle_set_stg(hose, 1);
H A Dxilinx_pci.c40 struct pci_controller *hose; local
46 hose = pci_bus_to_host(dev->bus);
47 if (!hose)
50 if (!of_match_node(xilinx_pci_match, hose->dn))
74 xilinx_pci_exclude_device(struct pci_controller *hose, u_char bus, u8 devfn) argument
84 struct pci_controller *hose; local
98 hose = pcibios_alloc_controller(pci_node);
99 if (!hose) {
105 setup_indirect_pci(hose, r.start + XPLB_PCI_ADDR,
113 early_write_config_word(hose,
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H A Dindirect_pci.c26 struct pci_controller *hose = pci_bus_to_host(bus); local
31 if (hose->indirect_type & PPC_INDIRECT_TYPE_NO_PCIE_LINK) {
32 if (bus->number != hose->first_busno)
39 if (ppc_md.pci_exclude_device(hose, bus->number, devfn))
42 if (hose->indirect_type & PPC_INDIRECT_TYPE_SET_CFG_TYPE)
43 if (bus->number != hose->first_busno)
46 bus_no = (bus->number == hose->first_busno) ?
47 hose->self_busno : bus->number;
49 if (hose->indirect_type & PPC_INDIRECT_TYPE_EXT_REG)
54 if (hose
83 struct pci_controller *hose = pci_bus_to_host(bus); local
155 setup_indirect_pci(struct pci_controller *hose, resource_size_t cfg_addr, resource_size_t cfg_data, u32 flags) argument
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H A Dmpic_u3msi.c83 struct pci_controller *hose = pci_bus_to_host(pdev->bus); local
101 if (of_device_is_compatible(hose->dn, "u4-pcie") ||
102 of_device_is_compatible(hose->dn, "U4-pcie"))
H A Dmv64x60_pci.c123 struct pci_controller *hose; local
142 hose = pcibios_alloc_controller(dev);
143 if (!hose)
146 hose->first_busno = bus_range ? bus_range[0] : 0;
147 hose->last_busno = bus_range ? bus_range[1] : 0xff;
149 setup_indirect_pci(hose, rsrc.start, rsrc.start + 4, 0);
150 hose->self_busno = hose->first_busno;
154 (unsigned long long)rsrc.start, hose->first_busno,
155 hose
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/arch/alpha/kernel/
H A Dconsole.c5 * non-0 I/O hose
39 struct pci_controller *hose = NULL; local
47 if (!hose)
48 hose = dev->sysdata;
50 hose = sel_func(hose, dev->sysdata);
54 if (!hose || (conswitchp == &vga_con && pci_vga_hose == hose))
57 /* Create a new VGA ioport resource WRT the hose it is on. */
58 alpha_vga.start += hose
75 struct pci_controller *hose; local
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H A Dsys_jensen.c185 struct pci_controller *hose; local
192 /* Create a hose so that we can report i/o base addresses to
195 pci_isa_hose = hose = alloc_pci_controller();
196 hose->io_space = &ioport_resource;
197 hose->mem_space = &iomem_resource;
198 hose->index = 0;
200 hose->sparse_mem_base = EISA_MEM - IDENT_ADDR;
201 hose->dense_mem_base = 0;
202 hose->sparse_io_base = EISA_IO - IDENT_ADDR;
203 hose
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H A Dcore_polaris.c149 struct pci_controller *hose;
160 * Create our single hose.
163 pci_isa_hose = hose = alloc_pci_controller();
164 hose->io_space = &ioport_resource;
165 hose->mem_space = &iomem_resource;
166 hose->index = 0;
168 hose->sparse_mem_base = 0;
169 hose->dense_mem_base = POLARIS_DENSE_MEM_BASE - IDENT_ADDR;
170 hose->sparse_io_base = 0;
171 hose
148 struct pci_controller *hose; local
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H A Dsys_eiger.c165 struct pci_controller *hose = dev->sysdata; local
183 /* Check for built-in bridges on hose 0. */
184 if (hose->index == 0
H A Dsys_rawhide.c47 rawhide_update_irq_hw(int hose, int mask) argument
49 *(vuip)MCPCIA_INT_MASK0(MCPCIA_HOSE2MID(hose)) = mask;
51 *(vuip)MCPCIA_INT_MASK0(MCPCIA_HOSE2MID(hose));
60 unsigned int mask, hose; local
64 hose = irq / 24;
65 if (!hose_exists(hose)) /* if hose non-existent, exit */
68 irq -= hose * 24;
72 mask |= cached_irq_masks[hose];
73 cached_irq_masks[hose]
81 unsigned int mask, hose; local
102 unsigned int mask, mask1, hose; local
164 struct pci_controller *hose; local
237 struct pci_controller *hose = dev->sysdata; local
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/arch/powerpc/platforms/82xx/
H A Dpq2.c38 static int pq2_pci_exclude_device(struct pci_controller *hose, argument
49 struct pci_controller *hose; local
57 hose = pcibios_alloc_controller(np);
58 if (!hose)
61 hose->dn = np;
63 setup_indirect_pci(hose, r.start + 0x100, r.start + 0x104, 0);
64 pci_process_bridge_OF_ranges(hose, np, 1);
/arch/powerpc/platforms/embedded6xx/
H A Dstorcenter.c44 struct pci_controller *hose; local
49 hose = pcibios_alloc_controller(dev);
50 if (hose == NULL)
54 hose->first_busno = bus_range ? bus_range[0] : 0;
55 hose->last_busno = bus_range ? bus_range[1] : 0xff;
57 setup_indirect_pci(hose, MPC10X_MAPB_CNFG_ADDR, MPC10X_MAPB_CNFG_DATA, 0);
61 pci_process_bridge_OF_ranges(hose, dev, 1);
H A Dlinkstation.c41 struct pci_controller *hose; local
51 hose = pcibios_alloc_controller(dev);
52 if (hose == NULL)
54 hose->first_busno = bus_range ? bus_range[0] : 0;
55 hose->last_busno = bus_range ? bus_range[1] : 0xff;
56 setup_indirect_pci(hose, 0xfec00000, 0xfee00000, 0);
60 pci_process_bridge_OF_ranges(hose, dev, 1);
H A Dmpc7448_hpc2.c56 int mpc7448_hpc2_exclude_device(struct pci_controller *hose, argument
/arch/microblaze/pci/
H A Dindirect_pci.c26 struct pci_controller *hose = pci_bus_to_host(bus); local
31 if (hose->indirect_type & INDIRECT_TYPE_NO_PCIE_LINK) {
32 if (bus->number != hose->first_busno)
38 if (hose->indirect_type & INDIRECT_TYPE_SET_CFG_TYPE)
39 if (bus->number != hose->first_busno)
42 bus_no = (bus->number == hose->first_busno) ?
43 hose->self_busno : bus->number;
45 if (hose->indirect_type & INDIRECT_TYPE_EXT_REG)
50 if (hose->indirect_type & INDIRECT_TYPE_BIG_ENDIAN)
51 out_be32(hose
80 struct pci_controller *hose = pci_bus_to_host(bus); local
149 setup_indirect_pci(struct pci_controller *hose, resource_size_t cfg_addr, resource_size_t cfg_data, u32 flags) argument
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H A Dxilinx_pci.c40 struct pci_controller *hose; local
46 hose = pci_bus_to_host(dev->bus);
47 if (!hose)
50 if (!of_match_node(xilinx_pci_match, hose->dn))
75 xilinx_pci_exclude_device(struct pci_controller *hose, u_char bus, u8 devfn) argument
85 static void __init xilinx_early_pci_scan(struct pci_controller *hose) argument
98 early_read_config_dword(hose, bus,
114 static void __init xilinx_early_pci_scan(struct pci_controller *hose) argument
124 struct pci_controller *hose; local
138 hose
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/arch/powerpc/kernel/
H A Ddma-swiotlb.c68 struct pci_controller *hose; local
71 hose = pci_bus_to_host(pdev->bus);
74 hose->dma_window_base_cur + hose->dma_window_size;
/arch/powerpc/platforms/86xx/
H A Dmpc86xx_hpcn.c47 extern int uli_exclude_device(struct pci_controller *hose,
50 static int mpc86xx_exclude_device(struct pci_controller *hose, argument
53 if (hose->dn == fsl_pci_primary)
54 return uli_exclude_device(hose, bus, devfn);
/arch/sh/drivers/pci/
H A Dcommon.c10 static struct pci_dev *fake_pci_dev(struct pci_channel *hose, argument
17 dev.sysdata = hose;
20 bus.sysdata = hose;
21 bus.ops = hose->pci_ops;
33 int __init early_##rw##_config_##size(struct pci_channel *hose, \
37 fake_pci_dev(hose, top_bus, bus, devfn), \
48 int __init pci_is_66mhz_capable(struct pci_channel *hose,
61 if (early_read_config_word(hose, top_bus, current_bus,
72 early_read_config_word(hose, top_bus, current_bus,
89 struct pci_channel *hose local
98 struct pci_channel *hose = (struct pci_channel *)__data; local
105 pcibios_enable_timers(struct pci_channel *hose) argument
124 pcibios_handle_status_errors(unsigned long addr, unsigned int status, struct pci_channel *hose) argument
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/arch/powerpc/platforms/85xx/
H A Dmpc85xx_ads.c40 static int mpc85xx_exclude_device(struct pci_controller *hose, argument
H A Dmpc85xx_ds.c116 extern int uli_exclude_device(struct pci_controller *hose,
121 static int mpc85xx_exclude_device(struct pci_controller *hose, argument
124 if (hose->dn == pci_with_uli)
125 return uli_exclude_device(hose, bus, devfn);
/arch/powerpc/platforms/amigaone/
H A Dsetup.c41 struct pci_controller *hose; local
55 hose = pcibios_alloc_controller(dev);
56 if (hose == NULL)
59 hose->first_busno = bus_range ? bus_range[0] : 0;
60 hose->last_busno = bus_range ? bus_range[1] : 0xff;
62 setup_indirect_pci(hose, cfg_addr[0], cfg_data[0], 0);
66 pci_process_bridge_OF_ranges(hose, dev, 1);
/arch/powerpc/platforms/cell/
H A Dcelleb_scc_epci.c45 struct pci_controller *hose)
53 return hose->cfg_addr;
57 struct pci_controller *hose)
65 return hose->cfg_data;
69 struct pci_controller *hose)
73 epci_base = celleb_epci_get_epci_base(hose);
78 static int celleb_epci_check_abort(struct pci_controller *hose, argument
86 epci_base = celleb_epci_get_epci_base(hose);
113 struct pci_controller *hose, unsigned int devfn, int where)
117 if (bus != hose
44 celleb_epci_get_epci_base( struct pci_controller *hose) argument
56 celleb_epci_get_epci_cfg( struct pci_controller *hose) argument
68 clear_and_disable_master_abort_interrupt( struct pci_controller *hose) argument
112 celleb_epci_make_config_addr(struct pci_bus *bus, struct pci_controller *hose, unsigned int devfn, int where) argument
137 struct pci_controller *hose = pci_bus_to_host(bus); local
197 struct pci_controller *hose = pci_bus_to_host(bus); local
254 celleb_epci_init(struct pci_controller *hose) argument
375 celleb_setup_epci(struct device_node *node, struct pci_controller *hose) argument
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/arch/powerpc/platforms/pasemi/
H A Dpci.c48 static void volatile __iomem *pa_pxp_cfg_addr(struct pci_controller *hose, argument
51 return hose->cfg_data + PA_PXP_CFA(bus, devfn, offset);
69 struct pci_controller *hose; local
77 hose = pci_bus_to_host(bus);
79 addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset & ~0x3);
86 dummy = pa_pxp_cfg_addr(hose, bus->number, devfn, 0x10);
112 struct pci_controller *hose; local
115 hose = pci_bus_to_host(bus);
116 if (!hose)
125 addr = pa_pxp_cfg_addr(hose, bu
149 struct pci_controller *hose; local
184 setup_pa_pxp(struct pci_controller *hose) argument
192 struct pci_controller *hose; local
236 struct pci_controller *hose; local
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/arch/alpha/include/asm/
H A Dagp_backend.h20 struct pci_controller *hose; member in struct:_alpha_agp_info

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