/arch/mips/bcm63xx/ |
H A D | prom.c | 24 u32 reg, mask; local 34 mask = CKCTL_3368_ALL_SAFE_EN; 36 mask = CKCTL_6328_ALL_SAFE_EN; 38 mask = CKCTL_6338_ALL_SAFE_EN; 40 mask = CKCTL_6345_ALL_SAFE_EN; 42 mask = CKCTL_6348_ALL_SAFE_EN; 44 mask = CKCTL_6358_ALL_SAFE_EN; 46 mask = CKCTL_6362_ALL_SAFE_EN; 48 mask = CKCTL_6368_ALL_SAFE_EN; 50 mask [all...] |
/arch/powerpc/lib/ |
H A D | alloc.c | 9 void * __init_refok zalloc_maybe_bootmem(size_t size, gfp_t mask) argument 14 p = kzalloc(size, mask);
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/arch/powerpc/math-emu/ |
H A D | mtfsfi.c | 11 u32 mask = 0xf; local 14 mask = 9; 16 __FPU_FPSCR &= ~(mask << ((7 - crfD) << 2));
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H A D | mtfsf.c | 11 u32 mask; local 15 mask = 0x0f; 17 mask = ~0; 19 mask = ((FM & 1) | 29 fpscr = ((__FPU_FPSCR & ~mask) | (frB[1] & mask)) & 38 * is the same. Simply shift and mask to check for enabled
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/arch/powerpc/sysdev/ |
H A D | mpc8xx_pic.h | 11 * Some internal interrupt registers use an 8-bit mask for the interrupt 14 static inline uint mk_int_int_mask(uint mask) argument 16 return (1 << (7 - (mask/2)));
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/arch/arm/mach-omap1/ |
H A D | board-nand.c | 26 unsigned long mask; local 31 mask = (ctrl & NAND_CLE) ? 0x02 : 0; 33 mask |= 0x04; 35 writeb(cmd, this->IO_ADDR_W + mask);
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/arch/arm/mach-pxa/ |
H A D | generic.h | 43 static inline void pxa2xx_clear_reset_status(unsigned int mask) {} argument
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H A D | generic.c | 36 void clear_reset_status(unsigned int mask) argument 39 pxa2xx_clear_reset_status(mask); 42 ARSR = mask;
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H A D | pxa2xx.c | 24 void pxa2xx_clear_reset_status(unsigned int mask) argument 27 RCSR = mask;
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/arch/arm/plat-samsung/ |
H A D | wakeup-mask.c | 1 /* arch/arm/plat-samsung/wakeup-mask.c 5 * Support for wakeup mask interrupts on newer SoCs 19 #include <plat/wakeup-mask.h> 23 struct samsung_wakeup_mask *mask, int nr_mask) 30 for (; nr_mask > 0; nr_mask--, mask++) { 31 if (mask->irq == NO_WAKEUP_IRQ) { 32 val |= mask->bit; 36 data = irq_get_irq_data(mask->irq); 40 val &= ~mask->bit; 42 val |= mask 22 samsung_sync_wakemask(void __iomem *reg, struct samsung_wakeup_mask *mask, int nr_mask) argument [all...] |
/arch/arm64/include/asm/ |
H A D | smp_plat.h | 25 u64 mask; member in struct:mpidr_hash
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/arch/arm/kernel/ |
H A D | perf_regs.c | 19 int perf_reg_validate(u64 mask) argument 21 if (!mask || mask & REG_RESERVED)
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/arch/arm/mach-mv78xx0/include/mach/ |
H A D | uncompress.h | 31 unsigned char mask; local 34 mask = UART_LSR_TEMT | UART_LSR_THRE; 37 if ((base[UART_LSR << 2] & mask) == mask)
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/arch/arm/mach-orion5x/include/mach/ |
H A D | uncompress.h | 33 unsigned char mask; local 36 mask = UART_LSR_TEMT | UART_LSR_THRE; 39 if ((base[UART_LSR << 2] & mask) == mask)
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/arch/arm/mach-sa1100/include/mach/ |
H A D | reset.h | 13 static inline void clear_reset_status(unsigned int mask) argument 15 RCSR = mask;
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/arch/arm64/kernel/ |
H A D | perf_regs.c | 38 int perf_reg_validate(u64 mask) argument 40 if (!mask || mask & REG_RESERVED)
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/arch/avr32/mach-at32ap/ |
H A D | hmatrix.c | 59 * @mask: mask of bits to be set in the SFR 61 void hmatrix_sfr_set_bits(unsigned int slave_id, u32 mask) argument 67 value |= mask; 76 * @mask: mask of bits to be cleared in the SFR 78 void hmatrix_sfr_clear_bits(unsigned int slave_id, u32 mask) argument 84 value &= ~mask;
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/arch/ia64/include/asm/sn/ |
H A D | leds.h | 26 set_led_bits(u8 value, u8 mask) argument 28 pda->led_state = (pda->led_state & ~mask) | (value & mask);
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/arch/ia64/kernel/ |
H A D | pci-dma.c | 60 int iommu_dma_supported(struct device *dev, u64 mask) argument 65 if (mask < DMA_BIT_MASK(24)) 80 if (iommu_sac_force && (mask >= DMA_BIT_MASK(40))) { 81 dev_info(dev, "Force SAC with mask %llx\n", mask);
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/arch/ia64/lib/ |
H A D | strlen.S | 31 // quantity which includes the start of the string and mask the unused 76 #define mask r20 define 99 mov mask=-1 // our mask 103 sub tmp=64,tmp // how many bits to shift our mask on the right 105 shr.u mask=mask,tmp // zero enough bits to hold v[1] valuable part 109 or v[1]=v[1],mask // now we have a safe initial byte pattern 118 cmp.eq.and p6,p0=8,val2 // p6 = p6 and mask==8 171 or val=val,mask // remas [all...] |
H A D | strlen_user.S | 35 // quantity which includes the start of the string and mask the unused 78 #define mask r20 define 101 mov mask=-1 // our mask 105 sub tmp=64,tmp // how many bits to shift our mask on the right 107 shr.u mask=mask,tmp // zero enough bits to hold v[1] valuable part 112 or v[1]=v[1],mask // now we have a safe initial byte pattern 121 cmp.eq.and p6,p0=8,val2 // p6 = p6 and mask==8 168 or val=val,mask // remas [all...] |
/arch/mips/kernel/ |
H A D | smp-gic.c | 58 void gic_send_ipi_mask(const struct cpumask *mask, unsigned int action) argument 62 for_each_cpu(i, mask)
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/arch/powerpc/platforms/cell/ |
H A D | celleb_scc_uhc.c | 34 const u32 mask = SCC_UHC_USBCEN | SCC_UHC_USBCEN; local 35 return((val & mask) == mask);
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/arch/sh/include/asm/ |
H A D | atomic-grb.h | 55 static inline void atomic_clear_mask(unsigned int mask, atomic_t *v) argument 58 unsigned int _mask = ~mask; 75 static inline void atomic_set_mask(unsigned int mask, atomic_t *v) argument 90 : "r" (mask)
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H A D | atomic-irq.h | 45 static inline void atomic_clear_mask(unsigned int mask, atomic_t *v) argument 50 v->counter &= ~mask; 54 static inline void atomic_set_mask(unsigned int mask, atomic_t *v) argument 59 v->counter |= mask;
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