| /arch/parisc/include/asm/ |
| H A D | prefetch.h | 2 * include/asm-parisc/prefetch.h
4 * PA 2.0 defines data prefetch instructions on page 6-11 of the Kane book.
22 static inline void prefetch(const void *addr) function
26 /* Need to avoid prefetch of NULL on PA7300LC */
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| /arch/alpha/include/asm/ |
| H A D | processor.h | 67 /* Nothing to prefetch. */
71 extern inline void prefetch(const void *ptr) function
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| /arch/arm/include/asm/ |
| H A D | processor.h | 110 static inline void prefetch(const void *ptr) function
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| /arch/frv/include/asm/ |
| H A D | processor.h | 119 /* data cache prefetch */
121 static inline void prefetch(const void *x) function
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| /arch/sparc/include/asm/ |
| H A D | processor_64.h | 223 * a shallower prefetch queue than later chips.
229 static inline void prefetch(const void *x) function
231 /* We do not use the read prefetch mnemonic because that
232 * prefetches into the prefetch-cache which only is accessible
237 __asm__ __volatile__("prefetch [%0], #one_write"
244 /* The most optimal prefetch to use for writes is
248 __asm__ __volatile__("prefetch [%0], #n_writes"
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| /arch/tile/lib/ |
| H A D | memcpy_64.c | 30 /* How many cache lines ahead should we prefetch? */
64 const char *__restrict prefetch; local
77 * prefetch past this.
82 prefetch = src1;
84 __insn_prefetch(prefetch);
85 prefetch += CHIP_L2_LINE_SIZE();
86 prefetch = (prefetch < src1_end) ? prefetch : src1;
166 prefetch
[all...] |
| /arch/arm64/include/asm/ |
| H A D | processor.h | 148 static inline void prefetch(const void *ptr) function
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| /arch/mn10300/include/asm/ |
| H A D | processor.h | 156 static inline void prefetch(const void *x) function
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| /arch/sh/include/asm/ |
| H A D | processor_32.h | 204 static inline void prefetch(const void *x) function
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| /arch/avr32/include/asm/ |
| H A D | processor.h | 158 static inline void prefetch(const void *x) function
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| /arch/ia64/include/asm/sn/ |
| H A D | pic.h | 160 u64 prefetch; /* 0x000{418,,,5D8} */ member in struct:pic::__anon1583
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| H A D | tiocp.h | 108 u64 prefetch; /* 0x000{418,,,5D8} */ member in struct:tiocp::__anon1698
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| /arch/mips/include/asm/ |
| H A D | processor.h | 21 #include <asm/prefetch.h>
395 #define prefetch(x) __builtin_prefetch((x), 0, 1) macro
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| /arch/tile/include/asm/ |
| H A D | processor.h | 125 /* Data stream prefetch control */
296 #define prefetch(x) __builtin_prefetch(x) macro
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| /arch/x86/mm/ |
| H A D | fault.c | 14 #include <linux/prefetch.h> /* prefetchw */
77 * Sometimes AMD Athlon/Opteron CPUs report invalid exceptions on prefetch.
82 * Sometimes the CPU reports invalid exceptions on prefetch.
89 unsigned char opcode, int *prefetch)
126 *prefetch = (instr_lo == 0xF) &&
139 int prefetch = 0; local
162 if (!check_prefetch_opcode(regs, instr, opcode, &prefetch))
165 return prefetch;
1112 * Don't take the mm semaphore here. If we fixup a prefetch
88 check_prefetch_opcode(struct pt_regs *regs, unsigned char *instr, unsigned char opcode, int *prefetch) argument
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| /arch/arm/mm/ |
| H A D | cache-l2x0.c | 703 u32 prefetch = readl_relaxed(base + L310_PREFETCH_CTRL); local
705 pr_info("L2C-310 %s%s prefetch enabled, offset %u lines\n",
708 1 + (prefetch & L310_PREFETCH_CTRL_OFFSET_MASK));
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| /arch/powerpc/include/asm/ |
| H A D | processor.h | 416 static inline void prefetch(const void *x) function
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| /arch/ia64/include/asm/ |
| H A D | processor.h | 687 prefetch (const void *x) function
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| /arch/x86/include/asm/ |
| H A D | processor.h | 808 static inline void prefetch(const void *x) function
817 * 3dnow prefetch to get an exclusive cache line.
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| /arch/mips/include/asm/octeon/ |
| H A D | cvmx-pci-defs.h | 2181 uint32_t prefetch:3; member in struct:cvmx_pci_read_cmd_6::cvmx_pci_read_cmd_6_s
2183 uint32_t prefetch:3;
2203 uint32_t prefetch:3; member in struct:cvmx_pci_read_cmd_c::cvmx_pci_read_cmd_c_s
2205 uint32_t prefetch:3;
2225 uint32_t prefetch:3; member in struct:cvmx_pci_read_cmd_e::cvmx_pci_read_cmd_e_s
2227 uint32_t prefetch:3;
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| /arch/mips/include/asm/pci/ |
| H A D | bridge.h | 810 u64 prefetch:1; member in struct:ate_u::ate_s
|