/drivers/net/ethernet/apple/ |
H A D | bmac.c | 905 unsigned short rx_cfg; local 907 rx_cfg = bmread(dev, RXCFG); 908 rx_cfg &= ~RxMACEnable; 909 bmwrite(dev, RXCFG, rx_cfg); 911 rx_cfg = bmread(dev, RXCFG); 912 } while (rx_cfg & RxMACEnable); 918 unsigned short rx_cfg; local 920 rx_cfg = bmread(dev, RXCFG); 921 rx_cfg |= RxMACEnable; 922 if (hash_enable) rx_cfg | 977 unsigned short rx_cfg; local 1019 unsigned short rx_cfg; local [all...] |
/drivers/usb/gadget/udc/ |
H A D | bcm63xx_udc.c | 458 const struct iudma_ch_cfg *rx_cfg = &iudma_defaults[i]; local 464 ((rx_fifo_slot + rx_cfg->n_fifo_slots - 1) << 466 rx_fifo_slot += rx_cfg->n_fifo_slots; 469 is_hs ? rx_cfg->max_pkt_hs : rx_cfg->max_pkt_fs,
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/drivers/net/ethernet/brocade/bna/ |
H A D | bna_tx_rx.c | 1814 cfg_req->rx_cfg.frame_size = bna_enet_mtu_get(&rx->bna->enet); 1842 cfg_req->rx_cfg.multi_buffer = 1881 cfg_req->rx_cfg.rxq_type = BFI_ENET_RXQ_LARGE_SMALL; 1885 cfg_req->rx_cfg.rxq_type = BFI_ENET_RXQ_HDS; 1886 cfg_req->rx_cfg.hds.type = rx->hds_cfg.hdr_type; 1887 cfg_req->rx_cfg.hds.force_offset = rx->hds_cfg.forced_offset; 1888 cfg_req->rx_cfg.hds.max_header_size = rx->hds_cfg.forced_offset; 1892 cfg_req->rx_cfg.rxq_type = BFI_ENET_RXQ_SINGLE; 1898 cfg_req->rx_cfg.strip_vlan = rx->rxf.vlan_strip_status; 1935 bna_rx_res_check(struct bna_rx_mod *rx_mod, struct bna_rx_config *rx_cfg) argument 2502 bna_rx_create(struct bna *bna, struct bnad *bnad, struct bna_rx_config *rx_cfg, const struct bna_rx_event_cbfn *rx_cbfn, struct bna_res_info *res_info, void *priv) argument [all...] |
H A D | bfi_enet.h | 510 struct bfi_enet_rx_cfg rx_cfg; member in struct:bfi_enet_rx_cfg_req
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/drivers/net/ethernet/chelsio/cxgb3/ |
H A D | t3_hw.c | 1164 static void t3_gate_rx_traffic(struct cmac *mac, u32 *rx_cfg, argument 1171 *rx_cfg = t3_read_reg(mac->adapter, A_XGM_RX_CFG); 1186 static void t3_open_rx_traffic(struct cmac *mac, u32 rx_cfg, argument 1192 rx_cfg); 1217 u32 rx_cfg, rx_hash_high, rx_hash_low; local 1221 t3_gate_rx_traffic(mac, &rx_cfg, &rx_hash_high, &rx_hash_low); 1230 t3_open_rx_traffic(mac, rx_cfg, rx_hash_high, rx_hash_low); 1270 u32 rx_cfg, rx_hash_high, rx_hash_low; local 1272 t3_gate_rx_traffic(mac, &rx_cfg, &rx_hash_high, &rx_hash_low); 1280 t3_open_rx_traffic(mac, rx_cfg, rx_hash_hig [all...] |
/drivers/net/ethernet/neterion/ |
H A D | s2io.c | 705 struct rx_ring_config *rx_cfg = &config->rx_cfg[i]; local 708 if (rx_cfg->num_rxd % (rxd_count[nic->rxd_mode] + 1)) { 714 size += rx_cfg->num_rxd; 715 ring->block_count = rx_cfg->num_rxd / 717 ring->pkt_cnt = rx_cfg->num_rxd - ring->block_count; 725 struct rx_ring_config *rx_cfg = &config->rx_cfg[i]; local 730 ring->rx_curr_get_info.ring_len = rx_cfg->num_rxd - 1; 733 ring->rx_curr_put_info.ring_len = rx_cfg 798 struct rx_ring_config *rx_cfg = &config->rx_cfg[i]; local 963 struct rx_ring_config *rx_cfg = &config->rx_cfg[i]; local 1349 struct rx_ring_config *rx_cfg = &config->rx_cfg[i]; local 6934 struct rx_ring_config *rx_cfg = &config->rx_cfg[i]; local 7858 struct rx_ring_config *rx_cfg = &config->rx_cfg[i]; local 7871 struct rx_ring_config *rx_cfg = &config->rx_cfg[i]; local [all...] |
H A D | s2io.h | 449 struct rx_ring_config rx_cfg[MAX_RX_RINGS]; /*Per-Rx Ring config */ member in struct:config_param
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/drivers/net/ethernet/sun/ |
H A D | niu.c | 392 u32 tx_cfg, rx_cfg; local 396 rx_cfg = (PLL_RX_CFG_ENRX | PLL_RX_CFG_TERM_0P8VDDT | 407 rx_cfg |= PLL_RX_CFG_ENTEST; 418 int err = esr2_set_rx_cfg(np, i, rx_cfg); 432 u32 tx_cfg, rx_cfg; local 438 rx_cfg = (PLL_RX_CFG_ENRX | PLL_RX_CFG_TERM_0P8VDDT | 443 rx_cfg |= PLL_RX_CFG_EQ_LP_ADAPTIVE; 452 rx_cfg |= PLL_RX_CFG_ENTEST; 486 err = esr2_set_rx_cfg(np, i, rx_cfg); 526 u32 tx_cfg, rx_cfg, pll_cf local [all...] |
/drivers/net/ethernet/micrel/ |
H A D | ksz884x.c | 1243 * @rx_cfg: Cached receive control settings. 1282 u32 rx_cfg; member in struct:ksz_hw 3220 u32 rx_cfg; local 3223 rx_cfg = hw->rx_cfg; 3226 hw->rx_cfg |= DMA_RX_FLOW_ENABLE; 3228 hw->rx_cfg &= ~DMA_RX_FLOW_ENABLE; 3234 if (rx_cfg != hw->rx_cfg) 3235 writel(hw->rx_cfg, h [all...] |