Searched defs:shadow (Results 1 - 25 of 27) sorted by relevance

12

/drivers/gpio/
H A Dgpio-mm-lantiq.c33 u16 shadow; /* shadow the latches state */ member in struct:ltq_mm
37 * ltq_mm_apply() - write the shadow value to the ebu address.
40 * Write the shadow value to the EBU to set the gpios. We need to set the
49 __raw_writew(chip->shadow, chip->mmchip.regs);
60 * Set the shadow value and call ltq_mm_apply.
69 chip->shadow |= (1 << offset);
71 chip->shadow &= ~(1 << offset);
109 const __be32 *shadow; local
127 /* store the shadow valu
[all...]
H A Dgpio-janz-ttl.c63 u8 *shadow; local
67 shadow = &mod->porta_shadow;
69 shadow = &mod->portb_shadow;
72 shadow = &mod->portc_shadow;
77 ret = *shadow & (1 << offset);
86 u8 *shadow; local
90 shadow = &mod->porta_shadow;
93 shadow = &mod->portb_shadow;
97 shadow = &mod->portc_shadow;
103 *shadow |
[all...]
H A Dgpio-stp-xway.c85 u32 shadow; /* shadow the shift registers state */ member in struct:xway_stp
99 * Set the shadow value and call ltq_ebu_apply.
107 chip->shadow |= BIT(gpio);
109 chip->shadow &= ~BIT(gpio);
110 xway_stp_w32(chip->virt, chip->shadow, XWAY_STP_CPU0);
203 const __be32 *shadow, *groups, *dsl, *phy; local
229 /* store the shadow value if one was passed by the devicetree */
230 shadow = of_get_property(pdev->dev.of_node, "lantiq,shadow", NUL
[all...]
/drivers/mmc/host/
H A Dsdhci-bcm2835.c54 u32 shadow; member in struct:bcm2835_sdhci
78 u32 oldval = (reg == SDHCI_COMMAND) ? bcm2835_host->shadow :
86 bcm2835_host->shadow = newval;
/drivers/gpu/drm/nouveau/core/subdev/bios/
H A Dbase.c321 void (*shadow)(struct nouveau_bios *); member in struct:methods
358 mthd->shadow(bios);
364 } while ((++mthd)->shadow);
390 mthd->shadow(bios);
395 } while (mthd->score != 3 && (++mthd)->shadow);
404 } while ((++mthd)->shadow);
/drivers/gpu/drm/nouveau/core/subdev/mxm/
H A Dbase.c214 struct mxm_shadow_h *shadow = _mxm_shadow; local
216 nv_debug(mxm, "checking %s\n", shadow->name);
217 if (shadow->exec(mxm, version)) {
223 } while ((++shadow)->name);
/drivers/infiniband/hw/qib/
H A Dqib_tx.c218 * update_send_bufs - update shadow copy of the PIO availability map
240 * to avoid conflicting updates; all we change is the shadow, and
290 unsigned long *shadow = dd->pioavailshadow; local
322 if (__test_and_set_bit((2 * i) + 1, shadow))
325 __change_bit(2 * i, shadow);
337 * First time through; shadow exhausted, but may be
396 /* Set or clear the busy bit in the shadow. */
406 * bit is set correctly in shadow, since it could
/drivers/media/dvb-frontends/
H A Ditd1000_priv.h34 u8 shadow[256]; member in struct:itd1000_state
H A Ds5h1420.c62 u8 shadow[256]; member in struct:s5h1420_state
90 b[1] = state->shadow[(reg - 1) & 0xff];
122 state->shadow[reg] = data;
898 memset(state->shadow, 0xff, sizeof(state->shadow));
901 state->shadow[i] = s5h1420_readreg(state, i);
/drivers/pinctrl/sh-pfc/
H A Dgpio.c24 unsigned long shadow; member in struct:sh_pfc_gpio_data_reg
120 chip->regs[i].shadow = gpio_read_data_reg(chip, dreg);
165 set_bit(pos, &reg->shadow);
167 clear_bit(pos, &reg->shadow);
169 gpio_write_data_reg(chip, reg->info, reg->shadow);
/drivers/gpu/drm/qxl/
H A Dqxl_fb.c63 void *shadow; member in struct:qxl_fbdev
118 * we are using a shadow draw buffer, at qdev->surface0_shadow
135 image->data = qfbdev->shadow + (x1 * 4) + (stride * y1);
515 void *shadow; local
528 shadow = vmalloc(mode_cmd.pitches[0] * mode_cmd.height);
530 BUG_ON(!shadow);
532 "surface0 at gpu offset %lld, mmap_offset %lld (virt %p, shadow %p)\n",
536 shadow);
554 qfbdev->shadow = shadow;
[all...]
/drivers/gpu/drm/exynos/
H A Dexynos_mixer.c712 u32 val, base, shadow; local
721 /* interlace scan need to check shadow register */
724 shadow = mixer_reg_read(res, MXR_GRAPHIC_BASE_S(0));
725 if (base != shadow)
729 shadow = mixer_reg_read(res, MXR_GRAPHIC_BASE_S(1));
730 if (base != shadow)
/drivers/ps3/
H A Dps3-lpm.c78 * struct ps3_lpm_shadow_regs - Performance monitor shadow registers.
86 * these processor registers. These shadow variables cache the processor
89 * The initial value of the shadow registers at lpm creation is
121 * @shadow: Processor register shadow of type struct ps3_lpm_shadow_regs.
140 struct ps3_lpm_shadow_regs shadow; member in struct:ps3_lpm_priv
406 return lpm_priv->shadow.pm_control;
410 return lpm_priv->shadow.pm_start_stop;
421 return lpm_priv->shadow.group_control;
423 return lpm_priv->shadow
[all...]
/drivers/scsi/
H A Dxen-scsifront.c114 struct vscsifrnt_shadow *shadow[VSCSIIF_MAX_REQS]; member in struct:vscsifrnt_info
151 info->shadow[id] = NULL;
200 struct vscsifrnt_shadow *s = info->shadow[id];
226 sc = info->shadow[id]->sc;
250 struct vscsifrnt_shadow *shadow = info->shadow[id]; local
254 shadow->wait_reset = 1;
255 switch (shadow->rslt_reset) {
257 shadow->rslt_reset = ring_rsp->rslt;
262 kfree(shadow);
331 map_data_for_request(struct vscsifrnt_info *info, struct scsi_cmnd *sc, struct vscsiif_request *ring_req, struct vscsifrnt_shadow *shadow) argument
448 scsifront_command2ring( struct vscsifrnt_info *info, struct scsi_cmnd *sc, struct vscsifrnt_shadow *shadow) argument
483 struct vscsifrnt_shadow *shadow = scsi_cmd_priv(sc); local
536 struct vscsifrnt_shadow *shadow, *s = scsi_cmd_priv(sc); local
[all...]
/drivers/block/
H A Dxen-blkfront.c123 struct blk_shadow shadow[BLK_RING_SIZE]; member in struct:blkfront_info
175 info->shadow_free = info->shadow[free].req.u.rw.id;
176 info->shadow[free].req.u.rw.id = 0x0fffffee; /* debug */
183 if (info->shadow[id].req.u.rw.id != id)
185 if (info->shadow[id].request == NULL)
187 info->shadow[id].req.u.rw.id = info->shadow_free;
188 info->shadow[id].request = NULL;
439 info->shadow[id].request = req;
455 nseg = blk_rq_map_sg(req->q, req, info->shadow[id].sg);
486 for_each_sg(info->shadow[i
[all...]
/drivers/infiniband/hw/ipath/
H A Dipath_driver.c707 ipath_cdbg(VERBOSE, "Free shadow page tid array at %p\n",
1318 * ipath_update_pio_bufs - update shadow copy of the PIO availability map
1342 * to avoid conflicting updates; all we change is the shadow, and
1350 ipath_dbg("Update shadow pioavail, but regs_dma NULL!\n");
1356 unsigned long *shadow = dd->ipath_pioavailshadow; local
1362 shadow[0],
1364 shadow[1],
1366 shadow[2],
1368 shadow[3]);
1375 shadow[
1484 unsigned long *shadow = dd->ipath_pioavailshadow; local
1538 unsigned long *shadow = dd->ipath_pioavailshadow; local
[all...]
/drivers/media/platform/omap3isp/
H A Disppreview.c675 preview_params_lock(struct isp_prev_device *prev, u32 update, bool shadow) argument
679 if (shadow) {
680 /* Mark all shadow parameters we are going to touch as busy. */
696 preview_params_unlock(struct isp_prev_device *prev, u32 update, bool shadow) argument
700 if (shadow) {
701 /* Set the update flag for shadow parameters that have been
702 * updated and clear the busy flag for all shadow parameters.
723 /* Switch active parameters with updated shadow parameters when the
724 * shadow parameter has been updated and neither the active not the
725 * shadow paramete
[all...]
/drivers/staging/lustre/lustre/obdclass/
H A Dlu_object.c627 struct lu_object *shadow; local
676 shadow = htable_lookup(s, &bd, f, waiter, &version);
677 if (likely(IS_ERR(shadow) && PTR_ERR(shadow) == -ENOENT)) {
690 return shadow;
2081 struct lu_object *shadow; local
2091 shadow = htable_lookup(s, &bd, fid, &waiter, &version);
2093 LASSERT(IS_ERR(shadow) && PTR_ERR(shadow) == -ENOENT);
/drivers/tty/serial/
H A Dioc3_serial.c439 writel(0, &port->ip_serial_regs->shadow);
823 * @mask2: shadow mask
829 uint32_t shadow; local
847 shadow = readl(&port->ip_serial_regs->shadow);
848 mcr = (shadow & 0xff000000) >> 24;
852 shadow |= mask2;
854 writel(shadow, &port->ip_serial_regs->shadow);
1473 uint32_t shadow; local
1770 uint32_t shadow; local
[all...]
H A Dcrisv10.c849 unsigned char *shadow; member in struct:control_pins
858 #define dtr_shadow shadow
860 #define ri_shadow shadow
862 #define dsr_shadow shadow
864 #define cd_shadow shadow
1040 printk("ser%i shadow before 0x%02X get: %i\n",
1056 printk("ser%i shadow after 0x%02X get: %i\n",
H A Dmpsc.c111 u16 shadow; member in struct:mpsc_tx_desc
1100 txre->shadow = txre->bytecnt;
/drivers/video/fbdev/
H A Dudlfb.c74 static bool shadow = 1; /* Optionally disable shadow framebuffer */ variable
516 * our shadow copy that tracks what's been sent to that hardware buffer.
1201 if (shadow)
1204 pr_info("No shadow/backing buffer allocated\n");
1614 pr_info("shadow enable=%d\n", shadow);
1971 module_param(shadow, bool, S_IWUSR | S_IRUSR | S_IWGRP | S_IRGRP);
1972 MODULE_PARM_DESC(shadow, "Shadow vid mem. Disable to save mem but lose perf");
/drivers/media/pci/cx88/
H A Dcx88.h70 /* need "shadow" registers for some write-only ones ... */
348 u32 shadow[SHADOW_MAX]; member in struct:cx88_core
613 /* shadow registers */
614 #define cx_sread(sreg) (core->shadow[sreg])
616 (core->shadow[sreg] = value, \
617 writel(core->shadow[sreg], core->lmmio + ((reg)>>2)))
619 (core->shadow[sreg] = (core->shadow[sreg] & ~(mask)) | ((value) & (mask)), \
620 writel(core->shadow[sreg], core->lmmio + ((reg)>>2)))
/drivers/media/i2c/
H A Dtvaudio.c127 /* shadow register set */
128 audiocmd shadow; member in struct:CHIPSTATE
164 chip->shadow.bytes[1] = val;
171 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
180 chip->shadow.bytes[subaddr+1] = val;
199 val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
201 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
208 val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
268 if (cmd->count + cmd->bytes[0] - 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
275 /* FIXME: it seems that the shadow byte
[all...]
/drivers/net/ethernet/myricom/myri10ge/
H A Dmyri10ge.c131 struct mcp_kreq_ether_recv *shadow; /* host shadow of recv ring */ member in struct:myri10ge_rx_buf
147 struct mcp_kreq_ether_send *req_list; /* host shadow of sendq */
1347 rx->shadow[idx].addr_low =
1349 rx->shadow[idx].addr_high =
1366 &rx->shadow[idx - 7]);
2151 /* allocate the host shadow rings */
2164 bytes = rx_ring_entries * sizeof(*ss->rx_small.shadow);
2165 ss->rx_small.shadow = kzalloc(bytes, GFP_KERNEL);
2166 if (ss->rx_small.shadow
[all...]

Completed in 575 milliseconds

12