Searched defs:wp (Results 1 - 20 of 20) sorted by relevance

/drivers/block/drbd/
H A Ddrbd_proc.c245 char wp; local
294 wp = nc ? nc->wire_protocol - DRBD_PROT_A + 'A' : ' ';
304 wp,
/drivers/video/fbdev/omap2/dss/
H A Dhdmi_pll.c184 int hdmi_pll_enable(struct hdmi_pll_data *pll, struct hdmi_wp_data *wp) argument
188 r = hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF);
192 r = hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_BOTHON_ALLCLKS);
207 void hdmi_pll_disable(struct hdmi_pll_data *pll, struct hdmi_wp_data *wp) argument
209 hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF);
H A Dhdmi_wp.c22 void hdmi_wp_dump(struct hdmi_wp_data *wp, struct seq_file *s) argument
24 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, hdmi_read_reg(wp->base, r))
46 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp) argument
48 return hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS);
51 void hdmi_wp_set_irqstatus(struct hdmi_wp_data *wp, u32 irqstatus) argument
53 hdmi_write_reg(wp->base, HDMI_WP_IRQSTATUS, irqstatus);
55 hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS);
58 void hdmi_wp_set_irqenable(struct hdmi_wp_data *wp, u32 mask) argument
60 hdmi_write_reg(wp->base, HDMI_WP_IRQENABLE_SET, mask);
63 void hdmi_wp_clear_irqenable(struct hdmi_wp_data *wp, u3 argument
69 hdmi_wp_set_phy_pwr(struct hdmi_wp_data *wp, enum hdmi_phy_pwr val) argument
89 hdmi_wp_set_pll_pwr(struct hdmi_wp_data *wp, enum hdmi_pll_pwr val) argument
104 hdmi_wp_video_start(struct hdmi_wp_data *wp) argument
111 hdmi_wp_video_stop(struct hdmi_wp_data *wp) argument
116 hdmi_wp_video_config_format(struct hdmi_wp_data *wp, struct hdmi_video_format *video_fmt) argument
129 hdmi_wp_video_config_interface(struct hdmi_wp_data *wp, struct omap_video_timings *timings) argument
147 hdmi_wp_video_config_timing(struct hdmi_wp_data *wp, struct omap_video_timings *timings) argument
189 hdmi_wp_audio_config_format(struct hdmi_wp_data *wp, struct hdmi_audio_format *aud_fmt) argument
208 hdmi_wp_audio_config_dma(struct hdmi_wp_data *wp, struct hdmi_audio_dma *aud_dma) argument
226 hdmi_wp_audio_enable(struct hdmi_wp_data *wp, bool enable) argument
233 hdmi_wp_audio_core_req_enable(struct hdmi_wp_data *wp, bool enable) argument
241 hdmi_wp_init(struct platform_device *pdev, struct hdmi_wp_data *wp) argument
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H A Dhdmi4.c45 struct hdmi_wp_data wp; member in struct:__anon7185
86 struct hdmi_wp_data *wp = data; local
89 irqstatus = hdmi_wp_get_irqstatus(wp);
90 hdmi_wp_set_irqstatus(wp, irqstatus);
100 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
102 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
105 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
107 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
109 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
184 struct hdmi_wp_data *wp local
[all...]
H A Dhdmi4_core.c312 struct hdmi_wp_data *wp, struct hdmi_config *cfg)
325 hdmi_wp_video_config_timing(wp, &video_timing);
330 hdmi_wp_video_config_format(wp, &video_format);
332 hdmi_wp_video_config_interface(wp, &video_timing);
683 int hdmi4_audio_config(struct hdmi_core_data *core, struct hdmi_wp_data *wp, argument
850 hdmi_wp_audio_config_dma(wp, &audio_dma);
851 hdmi_wp_audio_config_format(wp, &audio_format);
862 int hdmi4_audio_start(struct hdmi_core_data *core, struct hdmi_wp_data *wp) argument
867 hdmi_wp_audio_core_req_enable(wp, true);
872 void hdmi4_audio_stop(struct hdmi_core_data *core, struct hdmi_wp_data *wp) argument
311 hdmi4_configure(struct hdmi_core_data *core, struct hdmi_wp_data *wp, struct hdmi_config *cfg) argument
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H A Dhdmi5.c50 struct hdmi_wp_data wp; member in struct:__anon7186
91 struct hdmi_wp_data *wp = data; local
94 irqstatus = hdmi_wp_get_irqstatus(wp);
95 hdmi_wp_set_irqstatus(wp, irqstatus);
107 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
119 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
122 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
127 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
129 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
217 hdmi_wp_clear_irqenable(&hdmi.wp,
[all...]
H A Dhdmi5_core.c602 void hdmi5_configure(struct hdmi_core_data *core, struct hdmi_wp_data *wp, argument
615 hdmi_wp_video_config_timing(wp, &video_timing);
620 hdmi_wp_video_config_format(wp, &video_format);
622 hdmi_wp_video_config_interface(wp, &video_timing);
801 int hdmi5_audio_config(struct hdmi_core_data *core, struct hdmi_wp_data *wp, argument
886 hdmi_wp_audio_config_dma(wp, &audio_dma);
887 hdmi_wp_audio_config_format(wp, &audio_format);
/drivers/media/pci/saa7164/
H A Dsaa7164-core.c367 u32 wp, mcb, rp, cnt = 0; local
385 "%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n",
394 wp = saa7164_readl(port->bufcounter);
395 if (wp > (port->hwcfg.buffercount - 1)) {
396 printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp);
401 if (wp == 0)
404 mcb = wp - 1;
444 u32 wp, mcb, rp, cnt = 0; local
461 "%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n",
470 wp
586 int wp, i = 0, rp; local
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/drivers/atm/
H A Dfirestream.c596 u32 wp; local
602 while ((wp = read_fs (dev, Q_WP (q->offset))) & Q_FULL) {
608 wp &= ~0xf;
609 cqe = bus_to_virt (wp);
620 int rp, wp; local
622 wp = read_fs (dev, Q_WP(q->offset));
624 q->offset, rp, wp, wp-rp);
/drivers/media/pci/ttpci/
H A Dav7110_av.c885 int wp; local
889 wp = (events->eventw + 1) % MAX_VIDEO_EVENT;
890 if (wp == events->eventr) {
897 events->eventw = wp;
/drivers/block/
H A Dpktcdvd.c1685 write_param_page *wp; local
1694 init_cdrom_command(&cgc, buffer, sizeof(*wp), CGC_DATA_READ);
1719 wp = (write_param_page *) &buffer[sizeof(struct mode_page_header) + pd->mode_offset];
1721 wp->fp = pd->settings.fp;
1722 wp->track_mode = pd->settings.track_mode;
1723 wp->write_type = pd->settings.write_type;
1724 wp->data_block_type = pd->settings.block_mode;
1726 wp->multi_session = 0;
1729 wp->link_size = 7;
1730 wp
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/drivers/bus/
H A Darm-ccn.c877 unsigned long wp = hw->config_base; local
884 hw->event_base = CCN_XP_DT_CONFIG__DT_CFG__WATCHPOINT(wp);
889 CCN_XP_DT_INTERFACE_SEL__DT_IO_SEL__SHIFT(wp));
891 CCN_XP_DT_INTERFACE_SEL__DT_IO_SEL__SHIFT(wp);
893 CCN_XP_DT_INTERFACE_SEL__DT_DEV_SEL__SHIFT(wp));
895 CCN_XP_DT_INTERFACE_SEL__DT_DEV_SEL__SHIFT(wp);
897 CCN_XP_DT_INTERFACE_SEL__DT_VC_SEL__SHIFT(wp));
899 CCN_XP_DT_INTERFACE_SEL__DT_VC_SEL__SHIFT(wp);
903 writel(cmp_l & 0xffffffff, source->base + CCN_XP_DT_CMP_VAL_L(wp));
905 source->base + CCN_XP_DT_CMP_VAL_L(wp)
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/drivers/media/dvb-core/
H A Ddvb_frontend.c201 int wp; local
210 wp = (events->eventw + 1) % MAX_EVENT;
211 if (wp == events->eventr) {
220 events->eventw = wp;
/drivers/net/hamradio/
H A Dbaycom_epp.c372 unsigned char *wp, *bp; local
385 wp = bc->hdlctx.buf;
390 *wp++ = 0x7e;
411 *wp++ = bitbuf;
419 *wp++ = bitbuf;
424 bc->hdlctx.bufcnt = wp - bc->hdlctx.buf;
/drivers/scsi/fcoe/
H A Dfcoe_ctlr.c1319 struct fip_wwn_desc *wp; local
1353 * Actually need to subtract 'sizeof(*mp) - sizeof(*wp)' from 'rlen'
1387 wp = (struct fip_wwn_desc *)desc;
1388 if (dlen < sizeof(*wp))
1390 if (get_unaligned_be64(&wp->fd_wwn) != fcf->switch_name)
/drivers/staging/slicoss/
H A Dslicoss.c1146 u16 *wp = eeprom; local
1150 checksum += *(wp++);
1155 checksum += *(u8 *) wp;
/drivers/usb/gadget/udc/
H A Domap_udc.c335 u16 *wp; local
342 wp = (u16 *)buf;
344 omap_writew(*wp++, UDC_DATA);
347 buf = (u8 *)wp;
400 u16 *wp; local
407 wp = (u16 *)buf;
409 *wp++ = omap_readw(UDC_DATA);
412 buf = (u8 *)wp;
/drivers/mtd/nand/
H A Dnandsim.c201 #define NS_STATUS_OK(ns) (NAND_STATUS_READY | (NAND_STATUS_WP * ((ns)->lines.wp == 0)))
360 int wp; /* write Protect */ member in struct:nandsim::__anon2634
898 struct weak_page *wp; local
917 wp = kzalloc(sizeof(*wp), GFP_KERNEL);
918 if (!wp) {
922 wp->page_no = page_no;
923 wp->max_writes = max_writes;
924 list_add(&wp->list, &weak_pages);
931 struct weak_page *wp; local
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/drivers/net/ethernet/chelsio/cxgb3/
H A Dsge.c1078 struct work_request_hdr *wp = wrp; local
1118 wp->wr_lo = htonl(V_WR_LEN(WR_FLITS) | V_WR_GEN(ogen)) | wr_lo;
1119 wr_gen2((struct tx_desc *)wp, ogen);
/drivers/net/ethernet/smsc/
H A Dsmc91x.h242 u16 *wp = (u16 *) p; local
244 *wp++ = readw(a);
249 u16 *wp = (u16 *) p; local
251 writew(*wp++, a);

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