/arch/blackfin/include/asm/ |
H A D | irq_handler.h | 12 #include <mach/irq.h> 53 extern asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs); 54 extern int bfin_internal_set_wake(unsigned int irq, unsigned int state); 57 extern void bfin_handle_irq(unsigned irq); 59 extern void bfin_internal_mask_irq(unsigned int irq); 60 extern void bfin_internal_unmask_irq(unsigned int irq);
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H A D | ipipe.h | 30 #include <linux/irq.h> 33 #include <asm/irq.h> 108 unsigned irq); 111 unsigned irq); 113 #define __ipipe_enable_irq(irq) \ 115 struct irq_desc *desc = irq_to_desc(irq); \ 120 #define __ipipe_disable_irq(irq) \ 122 struct irq_desc *desc = irq_to_desc(irq); \ 138 void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs); 140 int __ipipe_get_irq_priority(unsigned int irq); [all...] |
/arch/m68k/mac/ |
H A D | baboon.c | 11 #include <linux/irq.h> 48 static void baboon_irq(unsigned int irq, struct irq_desc *desc) argument 98 void baboon_irq_enable(int irq) argument 101 printk("baboon_irq_enable(%d)\n", irq); 107 void baboon_irq_disable(int irq) argument 110 printk("baboon_irq_disable(%d)\n", irq);
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/arch/mips/sgi-ip22/ |
H A D | ip22-int.c | 38 if (d->irq != SGI_MAP_0_IRQ) 39 sgint->imask0 |= (1 << (d->irq - SGINT_LOCAL0)); 44 sgint->imask0 &= ~(1 << (d->irq - SGINT_LOCAL0)); 57 if (d->irq != SGI_MAP_1_IRQ) 58 sgint->imask1 |= (1 << (d->irq - SGINT_LOCAL1)); 63 sgint->imask1 &= ~(1 << (d->irq - SGINT_LOCAL1)); 75 sgint->cmeimask0 |= (1 << (d->irq - SGINT_LOCAL2)); 80 sgint->cmeimask0 &= ~(1 << (d->irq - SGINT_LOCAL2)); 94 sgint->cmeimask1 |= (1 << (d->irq - SGINT_LOCAL3)); 99 sgint->cmeimask1 &= ~(1 << (d->irq 114 int irq; local 136 int irq; local 153 int irq = SGI_BUSERR_IRQ; local [all...] |
/arch/sparc/include/asm/ |
H A D | irq_64.h | 0 /* irq.h: IRQ registers on the 64-bit Sparc. 36 * the type of ino_bucket->irq as appropriate. 38 * ino_bucket->irq allocation is made during {sun4v_,}build_irq(). 42 void irq_install_pre_handler(int irq, 45 #define irq_canonicalize(irq) (irq) 52 void sun4v_destroy_msi(unsigned int irq); 58 void sun4u_destroy_msi(unsigned int irq); 61 void irq_free(unsigned int irq);
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/arch/sparc/kernel/ |
H A D | power.c | 18 static irqreturn_t power_handler(int irq, void *dev_id) argument 26 static int has_button_interrupt(unsigned int irq, struct device_node *dp) argument 28 if (irq == 0xffffffff) 39 unsigned int irq = op->archdata.irqs[0]; local 46 if (has_button_interrupt(irq, op->dev.of_node)) { 47 if (request_irq(irq,
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H A D | irq_64.c | 0 /* irq.c: UltraSparc IRQ handling/init/registry. 23 #include <linux/irq.h> 29 #include <asm/irq.h> 95 static void bucket_set_irq(unsigned long bucket_pa, unsigned int irq) argument 99 : "r" (irq), 232 void irq_free(unsigned int irq) argument 234 void *data = irq_get_handler_data(irq); 237 irq_set_handler_data(irq, NULL); 238 irq_free_descs(irq, 1); 243 int irq; local 258 unsigned int irq = 0U; local 279 unsigned int irq; local 287 ack_bad_irq(unsigned int irq) argument 292 irq_install_pre_handler(int irq, void (*func)(unsigned int, void *, void *), void *arg1, void *arg2) argument 349 irq_choose_cpu(unsigned int irq, const struct cpumask *affinity) argument 611 unsigned int irq; local 621 bucket_set_irq(__pa(bucket), irq); local 650 unsigned int irq; local 673 cookie_assign(unsigned int irq, u32 devhandle, unsigned int devino) argument 703 unsigned int irq; local 718 unsigned int irq; local 730 sysino_set_bucket(unsigned int irq) argument 739 bucket_set_irq(__pa(bucket), irq); local 754 unsigned int irq; local 767 int irq; local 780 unsigned int irq; local 792 int irq; local 835 unsigned int irq; local 870 unsigned int irq; local [all...] |
/arch/m32r/platforms/m32700ut/ |
H A D | setup.c | 14 #include <linux/irq.h> 29 static void disable_m32700ut_irq(unsigned int irq) argument 33 port = irq2port(irq); 34 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7; 38 static void enable_m32700ut_irq(unsigned int irq) argument 42 port = irq2port(irq); 43 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6; 49 disable_m32700ut_irq(data->irq); 54 enable_m32700ut_irq(data->irq); 61 port = irq2port(data->irq); 86 disable_m32700ut_pld_irq(unsigned int irq) argument 97 enable_m32700ut_pld_irq(unsigned int irq) argument 146 disable_m32700ut_lanpld_irq(unsigned int irq) argument 157 enable_m32700ut_lanpld_irq(unsigned int irq) argument 206 disable_m32700ut_lcdpld_irq(unsigned int irq) argument 217 enable_m32700ut_lcdpld_irq(unsigned int irq) argument [all...] |
/arch/m32r/platforms/opsput/ |
H A D | setup.c | 15 #include <linux/irq.h> 30 static void disable_opsput_irq(unsigned int irq) argument 34 port = irq2port(irq); 35 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7; 39 static void enable_opsput_irq(unsigned int irq) argument 43 port = irq2port(irq); 44 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6; 50 disable_opsput_irq(data->irq); 55 enable_opsput_irq(data->irq); 62 port = irq2port(data->irq); 87 disable_opsput_pld_irq(unsigned int irq) argument 98 enable_opsput_pld_irq(unsigned int irq) argument 147 disable_opsput_lanpld_irq(unsigned int irq) argument 158 enable_opsput_lanpld_irq(unsigned int irq) argument 207 disable_opsput_lcdpld_irq(unsigned int irq) argument 218 enable_opsput_lcdpld_irq(unsigned int irq) argument [all...] |
/arch/m68k/amiga/ |
H A D | cia.c | 21 #include <linux/irq.h> 23 #include <asm/irq.h> 86 static irqreturn_t cia_handler(int irq, void *dev_id) argument 104 unsigned int irq = data->irq; local 107 if (irq >= IRQ_AMIGA_CIAB) { 108 mask = 1 << (irq - IRQ_AMIGA_CIAB); 112 mask = 1 << (irq - IRQ_AMIGA_CIAA); 120 unsigned int irq = data->irq; local [all...] |
/arch/powerpc/sysdev/ |
H A D | i8259.c | 19 static volatile void __iomem *pci_intack; /* RO, gives us the irq vector */ 37 int irq; local 42 irq = readb(pci_intack); 49 irq = inb(0x20) & 7; 50 if (irq == 2 ) { 56 irq = (inb(0xA0) & 7) + 8; 60 if (irq == 7) { 71 irq = NO_IRQ; 72 } else if (irq == 0xff) 73 irq [all...] |
/arch/arm/mach-imx/ |
H A D | gpc.c | 14 #include <linux/irq.h> 59 unsigned int idx = d->irq / 32 - 1; 62 /* Sanity check for SPI irq */ 63 if (d->irq < 32) 66 mask = 1 << d->irq % 32; 99 /* Sanity check for SPI irq */ 100 if (d->irq < 32) 103 reg = gpc_base + GPC_IMR1 + (d->irq / 32 - 1) * 4; 105 val &= ~(1 << d->irq % 32); 114 /* Sanity check for SPI irq */ [all...] |
/arch/m32r/platforms/mappi/ |
H A D | setup.c | 10 #include <linux/irq.h> 22 static void disable_mappi_irq(unsigned int irq) argument 26 port = irq2port(irq); 27 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7; 31 static void enable_mappi_irq(unsigned int irq) argument 35 port = irq2port(irq); 36 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6; 42 disable_mappi_irq(data->irq); 47 enable_mappi_irq(data->irq); 54 port = irq2port(data->irq); [all...] |
/arch/mn10300/kernel/ |
H A D | cevt-mn10300.c | 53 static irqreturn_t timer_interrupt(int irq, void *dev_id) argument 73 static inline void setup_jiffies_interrupt(int irq, argument 77 setup_irq(irq, action); 78 set_intr_level(irq, NUM2GxICR_LEVEL(CONFIG_TIMER_IRQ_LEVEL)); 79 GxICR(irq) |= GxICR_ENABLE | GxICR_DETECT | GxICR_REQUEST; 80 tmp = GxICR(irq); 93 cd->irq = TMJCIRQ; 96 cd->irq = TMJC1IRQ; 122 /* setup timer irq affinity so it only runs on this cpu */ 125 data = irq_get_irq_data(cd->irq); [all...] |
/arch/powerpc/include/asm/ |
H A D | qe_ic.h | 18 #include <linux/irq.h> 62 void (*low_handler)(unsigned int irq, struct irq_desc *desc), 63 void (*high_handler)(unsigned int irq, struct irq_desc *desc)); 68 void (*low_handler)(unsigned int irq, struct irq_desc *desc), 69 void (*high_handler)(unsigned int irq, struct irq_desc *desc)) 81 static inline void qe_ic_cascade_low_ipic(unsigned int irq, argument 91 static inline void qe_ic_cascade_high_ipic(unsigned int irq, argument 101 static inline void qe_ic_cascade_low_mpic(unsigned int irq, argument 114 static inline void qe_ic_cascade_high_mpic(unsigned int irq, argument 127 static inline void qe_ic_cascade_muxed_mpic(unsigned int irq, argument 67 qe_ic_init(struct device_node *node, unsigned int flags, void (*low_handler)(unsigned int irq, struct irq_desc *desc), void (*high_handler)(unsigned int irq, struct irq_desc *desc)) argument [all...] |
/arch/x86/pci/ |
H A D | xen.c | 54 dev->irq = rc; 55 dev_info(&dev->dev, "Xen PCI mapped GSI%d to IRQ%d\n", gsi, dev->irq); 63 int rc, pirq = -1, irq = -1; local 68 irq = xen_irq_from_gsi(gsi); 69 if (irq > 0) 70 return irq; 82 printk(KERN_WARNING "xen map irq failed %d\n", rc); 97 irq = xen_bind_pirq_gsi_to_irq(gsi, map_irq.pirq, shareable, name); 98 if (irq < 0) 101 printk(KERN_DEBUG "xen: --> pirq=%d -> irq 119 int rc, irq; local 162 int irq, ret, i; local 224 int irq, pirq; local 393 xen_teardown_msi_irq(unsigned int irq) argument 460 int irq = -1; local 503 int irq; local [all...] |
/arch/x86/kvm/ |
H A D | i8259.c | 32 #include "irq.h" 75 static void pic_clear_isr(struct kvm_kpic_state *s, int irq) argument 77 s->isr &= ~(1 << irq); 79 irq += 8; 87 kvm_notify_acked_irq(s->pics_state->kvm, SELECT_PIC(irq), irq); 92 * set irq level. If an edge is detected, then the IRR is set to 1 94 static inline int pic_set_irq1(struct kvm_kpic_state *s, int irq, int level) argument 97 mask = 1 << irq; 122 * number). Return 8 if no irq 170 int irq2, irq; local 191 kvm_pic_set_irq(struct kvm_pic *s, int irq, int irq_source_id, int level) argument 222 pic_intack(struct kvm_kpic_state *s, int irq) argument 241 int irq, irq2, intno; local 278 int irq, i; local 313 int priority, cmd, irq; local [all...] |
/arch/m68k/68000/ |
H A D | ints.c | 16 #include <linux/irq.h> 79 int irq; local 89 irq = 0; 92 irq = 4; 97 irq = 8; 100 irq = 12; 107 irq = 16; 110 irq = 20; 115 irq = 24; 118 irq [all...] |
/arch/powerpc/platforms/82xx/ |
H A D | pq2ads-pci-pic.c | 17 #include <linux/irq.h> 44 int irq = NUM_IRQS - irqd_to_hwirq(d) - 1; local 46 if (irq != -1) { 50 setbits32(&priv->regs->mask, 1 << irq); 60 int irq = NUM_IRQS - irqd_to_hwirq(d) - 1; local 62 if (irq != -1) { 66 clrbits32(&priv->regs->mask, 1 << irq); 81 static void pq2ads_pci_irq_demux(unsigned int irq, struct irq_desc *desc) argument 124 int irq; local 133 irq [all...] |
/arch/mips/lasat/ |
H A D | interrupt.c | 23 #include <linux/irq.h> 29 #include <irq.h> 37 unsigned int irq_nr = d->irq - LASAT_IRQ_BASE; 44 unsigned int irq_nr = d->irq - LASAT_IRQ_BASE; 88 int irq; local 99 irq = LASAT_IRQ_BASE + ls1bit32(int_status); 101 do_IRQ(irq);
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/arch/alpha/kernel/ |
H A D | sys_marvel.c | 17 #include <asm/irq.h> 45 unsigned int irq; 54 * PE | 0 | irq | 0 56 * where (irq) is 62 irq = ((vector & 0xffff) - 0x800) >> 4; 64 irq += 16; /* offset for legacy */ 65 irq &= MARVEL_IRQ_VEC_IRQ_MASK; /* not too many bits */ 66 irq |= pid << MARVEL_IRQ_VEC_PE_SHIFT; /* merge the pid */ 68 handle_irq(irq); 72 io7_get_irq_ctl(unsigned int irq, struc 44 unsigned int irq; local 71 io7_get_irq_ctl(unsigned int irq, struct io7 **pio7) argument 108 unsigned int irq = d->irq; local 129 unsigned int irq = d->irq; local 329 int irq; local [all...] |
H A D | sys_noritake.c | 23 #include <asm/irq.h> 40 noritake_update_irq_hw(int irq, int mask) argument 43 if (irq >= 32) { 53 noritake_update_irq_hw(d->irq, cached_irq_mask |= 1 << (d->irq - 16)); 59 noritake_update_irq_hw(d->irq, cached_irq_mask &= ~(1 << (d->irq - 16))); 99 int irq; local 101 irq = (vector - 0x800) >> 4; 112 if (irq > [all...] |
/arch/mips/loongson1/common/ |
H A D | irq.c | 11 #include <linux/irq.h> 15 #include <irq.h> 29 unsigned int bit = (d->irq - LS1X_IRQ_BASE) & 0x1f; 30 unsigned int n = (d->irq - LS1X_IRQ_BASE) >> 5; 38 unsigned int bit = (d->irq - LS1X_IRQ_BASE) & 0x1f; 39 unsigned int n = (d->irq - LS1X_IRQ_BASE) >> 5; 47 unsigned int bit = (d->irq - LS1X_IRQ_BASE) & 0x1f; 48 unsigned int n = (d->irq - LS1X_IRQ_BASE) >> 5; 58 unsigned int bit = (d->irq - LS1X_IRQ_BASE) & 0x1f; 59 unsigned int n = (d->irq 75 u32 int_status, irq; local [all...] |
/arch/arm/mach-iop33x/ |
H A D | iq80331.c | 26 #include <asm/irq.h> 55 int irq; local 59 irq = IRQ_IOP33X_XINT1; 62 irq = IRQ_IOP33X_XINT2; 65 irq = IRQ_IOP33X_XINT3; 68 irq = IRQ_IOP33X_XINT0; 71 irq = IRQ_IOP33X_XINT2; 76 irq = -1; 79 return irq;
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H A D | iq80332.c | 26 #include <asm/irq.h> 55 int irq; local 59 irq = IRQ_IOP33X_XINT0; 62 irq = IRQ_IOP33X_XINT1; 65 irq = IRQ_IOP33X_XINT2; 68 irq = IRQ_IOP33X_XINT3; 71 irq = IRQ_IOP33X_XINT2; 76 irq = -1; 79 return irq;
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