Searched refs:offset (Results 101 - 125 of 1060) sorted by relevance

1234567891011>>

/arch/sh/mm/
H A Dioremap.c34 * have to convert them into an offset in a page-aligned mapping, but the
42 unsigned long offset, last_addr, addr, orig_addr; local
67 offset = phys_addr & ~PAGE_MASK;
85 return (void __iomem *)(offset + (char *)orig_addr);
92 static inline int iomapping_nontranslatable(unsigned long offset) argument
99 if (PXSEG(offset) < P3SEG || offset >= P3_ADDR_MAX)
/arch/blackfin/kernel/
H A Dtime.c90 unsigned long offset; local
95 offset = bfin_read_TIMER0_COUNTER() / \
98 if ((get_gptimer_status(0) & TIMER_STATUS_TIMIL0) && offset < (100000 / HZ / 2))
99 offset += (USEC_PER_SEC / HZ);
102 offset = (clocks_per_jiffy - bfin_read_TCOUNT()) / \
107 && (offset < (100000 / HZ / 2)))
108 offset += (USEC_PER_SEC / HZ);
110 return offset;
/arch/microblaze/pci/
H A Dxilinx_pci.c88 u32 val, dev, func, offset; local
97 for (offset = 0; offset < 64; offset += 4) {
99 PCI_DEVFN(dev, func), offset, &val);
100 if (offset == 0 && val == 0xFFFFFFFF) {
104 if (!(offset % 0x10))
105 pr_cont("\n%04x: ", offset);
/arch/mips/include/asm/mach-loongson/cs5536/
H A Dcs5536.h29 #define SB_MSR_REG(offset) (CS5536_SB_MSR_BASE | (offset))
30 #define GLIU_MSR_REG(offset) (CS5536_GLIU_MSR_BASE | (offset))
31 #define ILLEGAL_MSR_REG(offset) (CS5536_ILLEGAL_MSR_BASE | (offset))
32 #define USB_MSR_REG(offset) (CS5536_USB_MSR_BASE | (offset))
33 #define IDE_MSR_REG(offset) (CS5536_IDE_MSR_BASE | (offset))
[all...]
/arch/mips/mti-sead3/
H A Dsead3-mtd.c15 .offset = 0x00000000,
19 .offset = 0x01fc0000,
/arch/powerpc/include/asm/
H A Dkvm_asm.h25 #define PPC_STD(sreg, offset, areg) std sreg, (offset)(areg)
26 #define PPC_LD(treg, offset, areg) ld treg, (offset)(areg)
28 #define PPC_STD(sreg, offset, areg) stw sreg, (offset+4)(areg)
29 #define PPC_LD(treg, offset, areg) lwz treg, (offset+4)(areg)
H A Dpmac_pfunc.h66 int (*write_reg32)(PMF_STD_ARGS, u32 offset, u32 value, u32 mask);
67 int (*read_reg32)(PMF_STD_ARGS, u32 offset);
68 int (*write_reg16)(PMF_STD_ARGS, u32 offset, u16 value, u16 mask);
69 int (*read_reg16)(PMF_STD_ARGS, u32 offset);
70 int (*write_reg8)(PMF_STD_ARGS, u32 offset, u8 value, u8 mask);
71 int (*read_reg8)(PMF_STD_ARGS, u32 offset);
75 int (*wait_reg32)(PMF_STD_ARGS, u32 offset, u32 value, u32 mask);
76 int (*wait_reg16)(PMF_STD_ARGS, u32 offset, u16 value, u16 mask);
77 int (*wait_reg8)(PMF_STD_ARGS, u32 offset, u8 value, u8 mask);
84 int (*read_cfg)(PMF_STD_ARGS, u32 offset, u3
[all...]
/arch/powerpc/lib/
H A Ddevres.c18 * @offset: BUS offset to map
25 void __iomem *devm_ioremap_prot(struct device *dev, resource_size_t offset, argument
34 addr = ioremap_prot(offset, size, flags);
/arch/sparc/lib/
H A Dmemset.S38 #define ZERO_BIG_BLOCK(base, offset, source) \
39 std source, [base + offset + 0x00]; \
40 std source, [base + offset + 0x08]; \
41 std source, [base + offset + 0x10]; \
42 std source, [base + offset + 0x18]; \
43 std source, [base + offset + 0x20]; \
44 std source, [base + offset + 0x28]; \
45 std source, [base + offset + 0x30]; \
46 std source, [base + offset + 0x38];
48 #define ZERO_LAST_BLOCKS(base, offset, sourc
[all...]
/arch/um/drivers/
H A Dcow_sys.h25 static inline int cow_seek_file(int fd, __u64 offset) argument
27 return os_seek_file(fd, offset);
/arch/arm/mach-w90x900/
H A Dgpio.c54 static int nuc900_gpio_get(struct gpio_chip *chip, unsigned offset) argument
61 regval &= GPIO_GPIO(offset);
66 static void nuc900_gpio_set(struct gpio_chip *chip, unsigned offset, int val) argument
78 regval |= GPIO_GPIO(offset);
80 regval &= ~GPIO_GPIO(offset);
87 static int nuc900_dir_input(struct gpio_chip *chip, unsigned offset) argument
97 regval &= ~GPIO_GPIO(offset);
105 static int nuc900_dir_output(struct gpio_chip *chip, unsigned offset, int val) argument
116 regval |= GPIO_GPIO(offset);
122 regval |= GPIO_GPIO(offset);
[all...]
/arch/arm/xen/
H A Dmm32.c75 static void dma_cache_maint(dma_addr_t handle, unsigned long offset, argument
82 pfn = (handle >> PAGE_SHIFT) + offset / PAGE_SIZE;
83 offset %= PAGE_SIZE;
95 vaddr = xen_mm32_remap_page(handle) + offset;
97 xen_mm32_unmap(vaddr - offset);
102 if (len + offset > PAGE_SIZE)
103 len = PAGE_SIZE - offset;
107 op(vaddr + offset, len, dir);
112 op(vaddr + offset, len, dir);
117 vaddr = page_address(page) + offset;
[all...]
/arch/mips/lib/
H A Dmemset.S57 .macro f_fill64 dst, offset, val, fixup, mode
58 EX(LONG_S, \val, (\offset + 0 * STORSIZE)(\dst), \fixup)
59 EX(LONG_S, \val, (\offset + 1 * STORSIZE)(\dst), \fixup)
60 EX(LONG_S, \val, (\offset + 2 * STORSIZE)(\dst), \fixup)
61 EX(LONG_S, \val, (\offset + 3 * STORSIZE)(\dst), \fixup)
63 EX(LONG_S, \val, (\offset + 4 * STORSIZE)(\dst), \fixup)
64 EX(LONG_S, \val, (\offset + 5 * STORSIZE)(\dst), \fixup)
65 EX(LONG_S, \val, (\offset + 6 * STORSIZE)(\dst), \fixup)
66 EX(LONG_S, \val, (\offset + 7 * STORSIZE)(\dst), \fixup)
69 EX(LONG_S, \val, (\offset
[all...]
/arch/mips/include/asm/octeon/
H A Dcvmx-mixx-defs.h31 #define CVMX_MIXX_BIST(offset) (CVMX_ADD_IO_SEG(0x0001070000100078ull) + ((offset) & 1) * 2048)
32 #define CVMX_MIXX_CTL(offset) (CVMX_ADD_IO_SEG(0x0001070000100020ull) + ((offset) & 1) * 2048)
33 #define CVMX_MIXX_INTENA(offset) (CVMX_ADD_IO_SEG(0x0001070000100050ull) + ((offset) & 1) * 2048)
34 #define CVMX_MIXX_IRCNT(offset) (CVMX_ADD_IO_SEG(0x0001070000100030ull) + ((offset) & 1) * 2048)
35 #define CVMX_MIXX_IRHWM(offset) (CVMX_ADD_IO_SEG(0x0001070000100028ull) + ((offset)
[all...]
H A Dcvmx-gmxx-defs.h75 #define CVMX_GMXX_BPID_MAPX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000680ull) + (((offset) & 15) + ((block_id) & 7) * 0x200000ull) * 8)
158 static inline uint64_t CVMX_GMXX_PRTX_CBFC_CTL(unsigned long offset, unsigned long block_id) argument
175 static inline uint64_t CVMX_GMXX_PRTX_CFG(unsigned long offset, unsigned long block_id) argument
179 return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
182 return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
185 return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
191 return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
193 return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x0ull) * 2048;
195 return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset)
201 CVMX_GMXX_RXX_ADR_CAM0(unsigned long offset, unsigned long block_id) argument
225 CVMX_GMXX_RXX_ADR_CAM1(unsigned long offset, unsigned long block_id) argument
249 CVMX_GMXX_RXX_ADR_CAM2(unsigned long offset, unsigned long block_id) argument
273 CVMX_GMXX_RXX_ADR_CAM3(unsigned long offset, unsigned long block_id) argument
297 CVMX_GMXX_RXX_ADR_CAM4(unsigned long offset, unsigned long block_id) argument
321 CVMX_GMXX_RXX_ADR_CAM5(unsigned long offset, unsigned long block_id) argument
345 CVMX_GMXX_RXX_ADR_CAM_ALL_EN(unsigned long offset, unsigned long block_id) argument
359 CVMX_GMXX_RXX_ADR_CAM_EN(unsigned long offset, unsigned long block_id) argument
384 CVMX_GMXX_RXX_ADR_CTL(unsigned long offset, unsigned long block_id) argument
409 CVMX_GMXX_RXX_DECISION(unsigned long offset, unsigned long block_id) argument
434 CVMX_GMXX_RXX_FRM_CHK(unsigned long offset, unsigned long block_id) argument
459 CVMX_GMXX_RXX_FRM_CTL(unsigned long offset, unsigned long block_id) argument
486 CVMX_GMXX_RXX_IFG(unsigned long offset, unsigned long block_id) argument
511 CVMX_GMXX_RXX_INT_EN(unsigned long offset, unsigned long block_id) argument
536 CVMX_GMXX_RXX_INT_REG(unsigned long offset, unsigned long block_id) argument
561 CVMX_GMXX_RXX_JABBER(unsigned long offset, unsigned long block_id) argument
586 CVMX_GMXX_RXX_PAUSE_DROP_TIME(unsigned long offset, unsigned long block_id) argument
609 CVMX_GMXX_RXX_STATS_CTL(unsigned long offset, unsigned long block_id) argument
634 CVMX_GMXX_RXX_STATS_OCTS(unsigned long offset, unsigned long block_id) argument
659 CVMX_GMXX_RXX_STATS_OCTS_CTL(unsigned long offset, unsigned long block_id) argument
684 CVMX_GMXX_RXX_STATS_OCTS_DMAC(unsigned long offset, unsigned long block_id) argument
709 CVMX_GMXX_RXX_STATS_OCTS_DRP(unsigned long offset, unsigned long block_id) argument
734 CVMX_GMXX_RXX_STATS_PKTS(unsigned long offset, unsigned long block_id) argument
759 CVMX_GMXX_RXX_STATS_PKTS_BAD(unsigned long offset, unsigned long block_id) argument
784 CVMX_GMXX_RXX_STATS_PKTS_CTL(unsigned long offset, unsigned long block_id) argument
809 CVMX_GMXX_RXX_STATS_PKTS_DMAC(unsigned long offset, unsigned long block_id) argument
834 CVMX_GMXX_RXX_STATS_PKTS_DRP(unsigned long offset, unsigned long block_id) argument
859 CVMX_GMXX_RXX_UDD_SKP(unsigned long offset, unsigned long block_id) argument
884 CVMX_GMXX_RX_BP_DROPX(unsigned long offset, unsigned long block_id) argument
909 CVMX_GMXX_RX_BP_OFFX(unsigned long offset, unsigned long block_id) argument
934 CVMX_GMXX_RX_BP_ONX(unsigned long offset, unsigned long block_id) argument
1057 CVMX_GMXX_SMACX(unsigned long offset, unsigned long block_id) argument
1131 CVMX_GMXX_TXX_APPEND(unsigned long offset, unsigned long block_id) argument
1156 CVMX_GMXX_TXX_BURST(unsigned long offset, unsigned long block_id) argument
1181 CVMX_GMXX_TXX_CBFC_XOFF(unsigned long offset, unsigned long block_id) argument
1198 CVMX_GMXX_TXX_CBFC_XON(unsigned long offset, unsigned long block_id) argument
1216 CVMX_GMXX_TXX_CTL(unsigned long offset, unsigned long block_id) argument
1241 CVMX_GMXX_TXX_MIN_PKT(unsigned long offset, unsigned long block_id) argument
1266 CVMX_GMXX_TXX_PAUSE_PKT_INTERVAL(unsigned long offset, unsigned long block_id) argument
1291 CVMX_GMXX_TXX_PAUSE_PKT_TIME(unsigned long offset, unsigned long block_id) argument
1316 CVMX_GMXX_TXX_PAUSE_TOGO(unsigned long offset, unsigned long block_id) argument
1341 CVMX_GMXX_TXX_PAUSE_ZERO(unsigned long offset, unsigned long block_id) argument
1367 CVMX_GMXX_TXX_SGMII_CTL(unsigned long offset, unsigned long block_id) argument
1385 CVMX_GMXX_TXX_SLOT(unsigned long offset, unsigned long block_id) argument
1410 CVMX_GMXX_TXX_SOFT_PAUSE(unsigned long offset, unsigned long block_id) argument
1435 CVMX_GMXX_TXX_STAT0(unsigned long offset, unsigned long block_id) argument
1460 CVMX_GMXX_TXX_STAT1(unsigned long offset, unsigned long block_id) argument
1485 CVMX_GMXX_TXX_STAT2(unsigned long offset, unsigned long block_id) argument
1510 CVMX_GMXX_TXX_STAT3(unsigned long offset, unsigned long block_id) argument
1535 CVMX_GMXX_TXX_STAT4(unsigned long offset, unsigned long block_id) argument
1560 CVMX_GMXX_TXX_STAT5(unsigned long offset, unsigned long block_id) argument
1585 CVMX_GMXX_TXX_STAT6(unsigned long offset, unsigned long block_id) argument
1610 CVMX_GMXX_TXX_STAT7(unsigned long offset, unsigned long block_id) argument
1635 CVMX_GMXX_TXX_STAT8(unsigned long offset, unsigned long block_id) argument
1660 CVMX_GMXX_TXX_STAT9(unsigned long offset, unsigned long block_id) argument
1685 CVMX_GMXX_TXX_STATS_CTL(unsigned long offset, unsigned long block_id) argument
1710 CVMX_GMXX_TXX_THRESH(unsigned long offset, unsigned long block_id) argument
[all...]
/arch/microblaze/lib/
H A Duaccess_old.S106 #define COPY(offset) \
107 1: lwi r4 , r6, 0x0000 + offset; \
108 2: lwi r19, r6, 0x0004 + offset; \
109 3: lwi r20, r6, 0x0008 + offset; \
110 4: lwi r21, r6, 0x000C + offset; \
111 5: lwi r22, r6, 0x0010 + offset; \
112 6: lwi r23, r6, 0x0014 + offset; \
113 7: lwi r24, r6, 0x0018 + offset; \
114 8: lwi r25, r6, 0x001C + offset; \
115 9: swi r4 , r5, 0x0000 + offset; \
[all...]
/arch/powerpc/platforms/powermac/
H A Dpfunc_base.c119 unsigned long offset; local
122 offset = *reg;
124 * offset for now too even if it's a bit gross ...
126 if (offset < 0x50)
127 offset += 0x50;
128 offset += (unsigned long)macio->base;
129 pmf_register_driver(gp, &macio_gpio_handlers, (void *)offset);
144 static int macio_do_write_reg32(PMF_STD_ARGS, u32 offset, u32 value, u32 mask) argument
150 MACIO_OUT32(offset, (MACIO_IN32(offset)
155 macio_do_read_reg32(PMF_STD_ARGS, u32 offset) argument
167 macio_do_write_reg8(PMF_STD_ARGS, u32 offset, u8 value, u8 mask) argument
178 macio_do_read_reg8(PMF_STD_ARGS, u32 offset) argument
190 macio_do_read_reg32_msrx(PMF_STD_ARGS, u32 offset, u32 mask, u32 shift, u32 xor) argument
203 macio_do_read_reg8_msrx(PMF_STD_ARGS, u32 offset, u32 mask, u32 shift, u32 xor) argument
216 macio_do_write_reg32_slm(PMF_STD_ARGS, u32 offset, u32 shift, u32 mask) argument
236 macio_do_write_reg8_slm(PMF_STD_ARGS, u32 offset, u32 shift, u32 mask) argument
278 unin_do_write_reg32(PMF_STD_ARGS, u32 offset, u32 value, u32 mask) argument
[all...]
/arch/arm/mach-ebsa110/
H A Dio.c238 unsigned int offset; local
244 offset = port << 2;
246 offset = (port & ~1) << 1 | (port & 1);
248 return __raw_readb((void __iomem *)ISAIO_BASE + offset);
253 unsigned int offset; local
259 offset = port << 2;
261 offset = port << 1;
264 return __raw_readw((void __iomem *)ISAIO_BASE + offset);
309 unsigned int offset; local
315 offset
319 __raw_writeb(val, (void __iomem *)ISAIO_BASE + offset); local
324 unsigned int offset; local
335 __raw_writew(val, (void __iomem *)ISAIO_BASE + offset); local
[all...]
/arch/arm/mach-gemini/
H A Dgpio.c154 static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset, argument
157 void __iomem *base = GPIO_BASE(offset / 32);
162 reg |= 1 << (offset % 32);
164 reg &= ~(1 << (offset % 32));
168 static void gemini_gpio_set(struct gpio_chip *chip, unsigned offset, int value) argument
170 void __iomem *base = GPIO_BASE(offset / 32);
173 __raw_writel(1 << (offset % 32), base + GPIO_DATA_SET);
175 __raw_writel(1 << (offset % 32), base + GPIO_DATA_CLR);
178 static int gemini_gpio_get(struct gpio_chip *chip, unsigned offset) argument
180 void __iomem *base = GPIO_BASE(offset / 3
185 gemini_gpio_direction_input(struct gpio_chip *chip, unsigned offset) argument
191 gemini_gpio_direction_output(struct gpio_chip *chip, unsigned offset, int value) argument
[all...]
/arch/arm/mach-sa1100/
H A Dsimpad.c88 static void cs3_gpio_set(struct gpio_chip *chip, unsigned offset, int value) argument
90 if (offset > 15)
93 simpad_set_cs3_bit(1 << offset);
95 simpad_clear_cs3_bit(1 << offset);
98 static int cs3_gpio_get(struct gpio_chip *chip, unsigned offset) argument
100 if (offset > 15)
101 return simpad_get_cs3_ro() & (1 << (offset - 16));
102 return simpad_get_cs3_shadow() & (1 << offset);
105 static int cs3_gpio_direction_input(struct gpio_chip *chip, unsigned offset) argument
107 if (offset > 1
112 cs3_gpio_direction_output(struct gpio_chip *chip, unsigned offset, int value) argument
[all...]
/arch/hexagon/include/uapi/asm/
H A Dptrace.h33 extern const char *regs_query_register_name(unsigned int offset);
/arch/mips/include/asm/mach-generic/
H A Dioremap.h23 static inline void __iomem *plat_ioremap(phys_t offset, unsigned long size, argument
/arch/powerpc/platforms/pasemi/
H A Dpasemi.h9 extern void __iomem *pasemi_pci_getcfgaddr(struct pci_dev *dev, int offset);
/arch/sparc/include/asm/
H A Dbitext.h24 void bit_map_clear(struct bit_map *t, int offset, int len);
/arch/tile/gxio/
H A Diorpc_globals.c73 unsigned long offset; member in struct:check_mmio_offset_param
77 int __iorpc_check_mmio_offset(int fd, unsigned long offset, unsigned long size) argument
82 params->offset = offset;

Completed in 578 milliseconds

1234567891011>>