/drivers/crypto/caam/ |
H A D | ctrl.c | 83 struct caam_ctrl __iomem *ctrl = ctrlpriv->ctrl; local 91 setbits32(&ctrl->deco_rsr, DECORSR_JR0); 93 while (!(rd_reg32(&ctrl->deco_rsr) & DECORSR_VALID) && 100 setbits32(&ctrl->deco_rq, DECORR_RQD0ENABLE); 102 while (!(rd_reg32(&ctrl->deco_rq) & DECORR_DEN0) && 108 clrbits32(&ctrl->deco_rq, DECORR_RQD0ENABLE); 143 clrbits32(&ctrl->deco_rsr, DECORSR_JR0); 146 clrbits32(&ctrl->deco_rq, DECORR_RQD0ENABLE); 177 struct caam_ctrl __iomem *ctrl; local 285 struct caam_ctrl __iomem *ctrl; local 323 struct caam_ctrl __iomem *ctrl; local 395 struct caam_ctrl __iomem *ctrl; local [all...] |
/drivers/net/ethernet/cisco/enic/ |
H A D | vnic_wq.c | 81 wq->ctrl = NULL; 92 wq->ctrl = vnic_dev_get_res(vdev, RES_TYPE_WQ, index); 93 if (!wq->ctrl) { 122 writeq(paddr, &wq->ctrl->ring_base); 123 iowrite32(count, &wq->ctrl->ring_size); 124 iowrite32(fetch_index, &wq->ctrl->fetch_index); 125 iowrite32(posted_index, &wq->ctrl->posted_index); 126 iowrite32(cq_index, &wq->ctrl->cq_index); 127 iowrite32(error_interrupt_enable, &wq->ctrl->error_interrupt_enable); 128 iowrite32(error_interrupt_offset, &wq->ctrl [all...] |
/drivers/pci/hotplug/ |
H A D | cpqphp_nvram.c | 245 struct controller *ctrl; local 265 ctrl = cpqhp_ctrl_list; 268 rc = add_byte(&pFill, 1 + ctrl->push_flag, &usedbytes, &available); 277 while (ctrl) { 283 rc = add_byte(&pFill, ctrl->bus, &usedbytes, &available); 288 rc = add_byte(&pFill, PCI_SLOT(ctrl->pci_dev->devfn), &usedbytes, &available); 293 rc = add_byte(&pFill, PCI_FUNC(ctrl->pci_dev->devfn), &usedbytes, &available); 304 resNode = ctrl->mem_head; 329 resNode = ctrl->p_mem_head; 354 resNode = ctrl 438 compaq_nvram_load(void __iomem *rom_start, struct controller *ctrl) argument [all...] |
H A D | shpchp_sysfs.c | 86 static DEVICE_ATTR (ctrl, S_IRUGO, show_ctrl, NULL); 88 int shpchp_create_ctrl_files (struct controller *ctrl) argument 90 return device_create_file (&ctrl->pci_dev->dev, &dev_attr_ctrl); 93 void shpchp_remove_ctrl_files(struct controller *ctrl) argument 95 device_remove_file(&ctrl->pci_dev->dev, &dev_attr_ctrl);
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H A D | cpqphp_pci.c | 84 int cpqhp_configure_device (struct controller *ctrl, struct pci_func *func) argument 98 num = pci_scan_slot(ctrl->pci_dev->bus, PCI_DEVFN(func->device, func->function)); 100 pci_bus_add_devices(ctrl->pci_dev->bus); 206 static int PCI_ScanBusForNonBridge(struct controller *ctrl, u8 bus_num, u8 *dev_num) argument 212 ctrl->pci_bus->number = bus_num; 216 if (PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work) == -1) 228 if (PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work) == -1) 233 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(tdevice, 0), PCI_SECONDARY_BUS, &tbus); 244 static int PCI_GetBusDevHelper(struct controller *ctrl, u8 *bus_num, u8 *dev_num, u8 slot, u8 nobridge) argument 259 ctrl 283 cpqhp_get_bus_dev(struct controller *ctrl, u8 *bus_num, u8 *dev_num, u8 slot) argument 304 cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug) argument 468 cpqhp_save_slot_config(struct controller *ctrl, struct pci_func *new_slot) argument 552 cpqhp_save_base_addr_length(struct controller *ctrl, struct pci_func *func) argument 689 cpqhp_save_used_resources(struct controller *ctrl, struct pci_func *func) argument 952 cpqhp_configure_board(struct controller *ctrl, struct pci_func *func) argument 1030 cpqhp_valid_replace(struct controller *ctrl, struct pci_func *func) argument 1172 cpqhp_find_available_resources(struct controller *ctrl, void __iomem *rom_start) argument [all...] |
/drivers/net/phy/ |
H A D | mdio-moxart.c | 40 u32 ctrl = 0; local 45 ctrl |= MIIRD | ((mii_id << 16) & PHYAD_MASK) | 48 writel(ctrl, data->base + REG_PHY_CTRL); 51 ctrl = readl(data->base + REG_PHY_CTRL); 53 if (!(ctrl & MIIRD)) 54 return ctrl & MIIRDATA_MASK; 69 u32 ctrl = 0; local 74 ctrl |= MIIWR | ((mii_id << 16) & PHYAD_MASK) | 80 writel(ctrl, data->base + REG_PHY_CTRL); 83 ctrl [all...] |
H A D | mdio-gpio.c | 34 struct mdiobb_ctrl ctrl; member in struct:mdio_gpio_info 72 static void mdio_dir(struct mdiobb_ctrl *ctrl, int dir) argument 75 container_of(ctrl, struct mdio_gpio_info, ctrl); 94 static int mdio_get(struct mdiobb_ctrl *ctrl) argument 97 container_of(ctrl, struct mdio_gpio_info, ctrl); 102 static void mdio_set(struct mdiobb_ctrl *ctrl, int what) argument 105 container_of(ctrl, struct mdio_gpio_info, ctrl); 113 mdc_set(struct mdiobb_ctrl *ctrl, int what) argument [all...] |
/drivers/rtc/ |
H A D | rtc-jz4740.c | 57 uint32_t ctrl; local 61 ctrl = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_CTRL); 62 } while (!(ctrl & JZ_RTC_CTRL_WRDY) && --timeout); 83 uint32_t ctrl; local 87 ctrl = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_CTRL); 90 ctrl |= JZ_RTC_CTRL_1HZ | JZ_RTC_CTRL_AF; 93 ctrl |= mask; 95 ctrl &= ~mask; 97 ret = jz4740_rtc_reg_write(rtc, JZ_REG_RTC_CTRL, ctrl); 141 uint32_t ctrl; local 188 uint32_t ctrl; local [all...] |
H A D | rtc-ds1305.c | 98 u8 ctrl[DS1305_CONTROL_LEN]; member in struct:ds1305 150 buf[1] = ds1305->ctrl[0]; 153 if (ds1305->ctrl[0] & DS1305_AEI0) 163 ds1305->ctrl[0] = buf[1]; 273 * Context: caller holds rtc->ops_lock (to protect ds1305->ctrl) 290 ds1305->ctrl, sizeof(ds1305->ctrl)); 294 alm->enabled = !!(ds1305->ctrl[0] & DS1305_AEI0); 295 alm->pending = !!(ds1305->ctrl[1] & DS1305_AEI0); 332 * Context: caller holds rtc->ops_lock (to protect ds1305->ctrl) [all...] |
/drivers/macintosh/ |
H A D | windfarm_smu_controls.c | 50 struct wf_control ctrl; member in struct:smu_fan_control 52 #define to_smu_fan(c) container_of(c, struct smu_fan_control, ctrl) 168 fct->ctrl.ops = &smu_fan_ops; 174 fct->ctrl.type = pwm_fan ? WF_CONTROL_PWM_FAN : WF_CONTROL_RPM_FAN; 185 fct->ctrl.name = NULL; 191 fct->ctrl.name = "cpu-rear-fan-0"; 194 fct->ctrl.name = "cpu-rear-fan-1"; 198 fct->ctrl.name = "cpu-front-fan-0"; 201 fct->ctrl.name = "cpu-front-fan-1"; 203 fct->ctrl [all...] |
H A D | macio-adb.c | 31 struct preg ctrl; member in struct:adb_regs 50 /* Bits in ctrl register */ 110 out_8(&adb->ctrl.r, 0); 153 out_8(&adb->ctrl.r, in_8(&adb->ctrl.r) | ADB_RST); 154 while ((in_8(&adb->ctrl.r) & ADB_RST) != 0) { 156 out_8(&adb->ctrl.r, in_8(&adb->ctrl.r) & ~ADB_RST); 189 out_8(&adb->ctrl.r, in_8(&adb->ctrl [all...] |
/drivers/media/platform/vivid/ |
H A D | vivid-ctrls.c | 99 static int vivid_user_gen_s_ctrl(struct v4l2_ctrl *ctrl) argument 101 struct vivid_dev *dev = container_of(ctrl->handler, struct vivid_dev, ctrl_hdl_user_gen); 103 switch (ctrl->id) { 242 static int vivid_user_vid_g_volatile_ctrl(struct v4l2_ctrl *ctrl) argument 244 struct vivid_dev *dev = container_of(ctrl->handler, struct vivid_dev, ctrl_hdl_user_vid); 246 switch (ctrl->id) { 254 static int vivid_user_vid_s_ctrl(struct v4l2_ctrl *ctrl) argument 256 struct vivid_dev *dev = container_of(ctrl->handler, struct vivid_dev, ctrl_hdl_user_vid); 258 switch (ctrl->id) { 260 dev->input_brightness[dev->input] = ctrl 295 vivid_vid_cap_s_ctrl(struct v4l2_ctrl *ctrl) argument 671 vivid_vbi_cap_s_ctrl(struct v4l2_ctrl *ctrl) argument 699 vivid_vid_out_s_ctrl(struct v4l2_ctrl *ctrl) argument 773 vivid_streaming_s_ctrl(struct v4l2_ctrl *ctrl) argument 892 vivid_sdtv_cap_s_ctrl(struct v4l2_ctrl *ctrl) argument 947 vivid_radio_rx_s_ctrl(struct v4l2_ctrl *ctrl) argument 1044 vivid_radio_tx_s_ctrl(struct v4l2_ctrl *ctrl) argument 1101 vivid_loop_out_s_ctrl(struct v4l2_ctrl *ctrl) argument [all...] |
/drivers/gpu/drm/nouveau/core/subdev/i2c/ |
H A D | nv94.c | 72 u32 ctrl, timeout; local 77 ctrl = nv_rd32(aux, 0x00e4e4 + (ch * 0x50)); 80 AUX_ERR("begin idle timeout 0x%08x\n", ctrl); 83 } while (ctrl & 0x03010000); 89 ctrl = nv_rd32(aux, 0x00e4e4 + (ch * 0x50)); 92 AUX_ERR("magic wait 0x%08x\n", ctrl); 96 } while ((ctrl & 0x03000000) != urep); 107 u32 ctrl, stat, timeout, retries; local 133 ctrl = nv_rd32(aux, 0x00e4e4 + (ch * 0x50)); 134 ctrl [all...] |
/drivers/media/i2c/ |
H A D | lm3646.c | 102 static int lm3646_get_ctrl(struct v4l2_ctrl *ctrl) argument 104 struct lm3646_flash *flash = to_lm3646_flash(ctrl); 108 if (ctrl->id != V4L2_CID_FLASH_FAULT) 115 ctrl->val = 0; 117 ctrl->val |= V4L2_FLASH_FAULT_TIMEOUT; 119 ctrl->val |= V4L2_FLASH_FAULT_SHORT_CIRCUIT; 121 ctrl->val |= V4L2_FLASH_FAULT_UNDER_VOLTAGE; 123 ctrl->val |= V4L2_FLASH_FAULT_INPUT_VOLTAGE; 125 ctrl->val |= V4L2_FLASH_FAULT_OVER_CURRENT; 127 ctrl 136 lm3646_set_ctrl(struct v4l2_ctrl *ctrl) argument [all...] |
/drivers/gpu/drm/nouveau/core/engine/disp/ |
H A D | hdminv84.c | 38 u32 ctrl; local 41 nv_ioctl(object, "disp sor hdmi ctrl size %d\n", size); 43 nv_ioctl(object, "disp sor hdmi ctrl vers %d state %d " 49 ctrl = 0x40000000 * !!args->v0.state; 50 ctrl |= args->v0.max_ac_packet << 16; 51 ctrl |= args->v0.rekey; 52 ctrl |= 0x1f000000; /* ??? */ 56 if (!(ctrl & 0x40000000)) { 89 nv_mask(priv, 0x6165a4 + hoff, 0x5f1f007f, ctrl);
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H A D | hdminva3.c | 38 u32 ctrl; local 41 nv_ioctl(object, "disp sor hdmi ctrl size %d\n", size); 43 nv_ioctl(object, "disp sor hdmi ctrl vers %d state %d " 49 ctrl = 0x40000000 * !!args->v0.state; 50 ctrl |= args->v0.max_ac_packet << 16; 51 ctrl |= args->v0.rekey; 52 ctrl |= 0x1f000000; /* ??? */ 56 if (!(ctrl & 0x40000000)) { 89 nv_mask(priv, 0x61c5a4 + soff, 0x5f1f007f, ctrl);
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/drivers/scsi/fnic/ |
H A D | vnic_intr.h | 65 struct vnic_intr_ctrl __iomem *ctrl; /* memory-mapped */ member in struct:vnic_intr 70 iowrite32(0, &intr->ctrl->mask); 75 iowrite32(1, &intr->ctrl->mask); 88 iowrite32(int_credit_return, &intr->ctrl->int_credit_return); 93 return ioread32(&intr->ctrl->int_credits);
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/drivers/net/ethernet/freescale/fs_enet/ |
H A D | mii-bitbang.c | 31 struct mdiobb_ctrl ctrl; member in struct:bb_info 58 static inline void mdio_dir(struct mdiobb_ctrl *ctrl, int dir) argument 60 struct bb_info *bitbang = container_of(ctrl, struct bb_info, ctrl); 71 static inline int mdio_read(struct mdiobb_ctrl *ctrl) argument 73 struct bb_info *bitbang = container_of(ctrl, struct bb_info, ctrl); 77 static inline void mdio(struct mdiobb_ctrl *ctrl, int what) argument 79 struct bb_info *bitbang = container_of(ctrl, struct bb_info, ctrl); 90 mdc(struct mdiobb_ctrl *ctrl, int what) argument [all...] |
/drivers/media/tuners/ |
H A D | tea5767.c | 29 struct tea5767_ctrl ctrl; member in struct:tea5767_priv 150 switch (priv->ctrl.xtal_freq) { 201 if (priv->ctrl.port1) 214 if (priv->ctrl.port2) 217 if (priv->ctrl.high_cut) 220 if (priv->ctrl.st_noise) 223 if (priv->ctrl.soft_mute) 226 if (priv->ctrl.japan_band) 231 if (priv->ctrl.deemph_75) 234 if (priv->ctrl [all...] |
/drivers/net/can/c_can/ |
H A D | c_can_platform.c | 87 u32 ctrl; local 91 ctrl = readl(priv->raminit_ctrlreg); 96 ctrl &= ~CAN_RAMINIT_START_MASK(priv->instance); 97 ctrl |= CAN_RAMINIT_DONE_MASK(priv->instance); 98 writel(ctrl, priv->raminit_ctrlreg); 99 ctrl &= ~CAN_RAMINIT_DONE_MASK(priv->instance); 100 c_can_hw_raminit_wait_ti(priv, mask, ctrl); 104 ctrl |= CAN_RAMINIT_START_MASK(priv->instance); 105 writel(ctrl, priv->raminit_ctrlreg); 106 ctrl | 148 u32 ctrl; local [all...] |
/drivers/dma/ |
H A D | moxart-dma.c | 190 u32 ctrl; local 199 ctrl = readl(ch->base + REG_OFF_CTRL); 200 ctrl &= ~(APB_DMA_ENABLE | APB_DMA_FIN_INT_EN | APB_DMA_ERR_INT_EN); 201 writel(ctrl, ch->base + REG_OFF_CTRL); 214 u32 ctrl; local 218 ctrl = readl(ch->base + REG_OFF_CTRL); 219 ctrl |= APB_DMA_BURST_MODE; 220 ctrl &= ~(APB_DMA_DEST_MASK | APB_DMA_SOURCE_MASK); 221 ctrl &= ~(APB_DMA_DEST_REQ_NO_MASK | APB_DMA_SOURCE_REQ_NO_MASK); 225 ctrl | 416 u32 ctrl; local 546 u32 ctrl; local 557 __func__, ch, ch->base, ctrl); local [all...] |
/drivers/media/common/ |
H A D | cx2341x.c | 279 struct v4l2_ext_control *ctrl) 281 switch (ctrl->id) { 283 ctrl->value = params->audio_sampling_freq; 286 ctrl->value = params->audio_encoding; 289 ctrl->value = params->audio_l2_bitrate; 292 ctrl->value = params->audio_ac3_bitrate; 295 ctrl->value = params->audio_mode; 298 ctrl->value = params->audio_mode_extension; 301 ctrl->value = params->audio_emphasis; 304 ctrl 278 cx2341x_get_ctrl(const struct cx2341x_mpeg_params *params, struct v4l2_ext_control *ctrl) argument 392 cx2341x_set_ctrl(struct cx2341x_mpeg_params *params, int busy, struct v4l2_ext_control *ctrl) argument 942 struct v4l2_ext_control *ctrl = ctrls->controls + i; local 953 struct v4l2_ext_control *ctrl = ctrls->controls + i; local 1139 struct v4l2_ext_control ctrl; local 1244 to_cxhdl(struct v4l2_ctrl *ctrl) argument 1265 cx2341x_neq(struct v4l2_ctrl *ctrl) argument 1270 cx2341x_try_ctrl(struct v4l2_ctrl *ctrl) argument 1310 cx2341x_s_ctrl(struct v4l2_ctrl *ctrl) argument [all...] |
/drivers/pwm/ |
H A D | pwm-jz4740.c | 90 uint32_t ctrl = jz4740_timer_get_ctrl(pwm->pwm); local 92 ctrl |= JZ_TIMER_CTRL_PWM_ENABLE; 93 jz4740_timer_set_ctrl(pwm->hwpwm, ctrl); 101 uint32_t ctrl = jz4740_timer_get_ctrl(pwm->hwpwm); local 103 ctrl &= ~JZ_TIMER_CTRL_PWM_ENABLE; 105 jz4740_timer_set_ctrl(pwm->hwpwm, ctrl); 115 uint16_t ctrl; local 145 ctrl = JZ_TIMER_CTRL_PRESCALER(prescaler) | JZ_TIMER_CTRL_SRC_EXT | 148 jz4740_timer_set_ctrl(pwm->hwpwm, ctrl);
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/drivers/net/ethernet/micrel/ |
H A D | ks8695net.c | 595 u32 ctrl; local 597 ctrl = readl(ksp->phyiface_regs + KS8695_WMC); 598 if (ctrl & WMC_WLS) { 604 (ctrl & WMC_WSS) ? "0" : "", 605 (ctrl & WMC_WDS) ? "Full" : "Half"); 666 u32 ctrl; local 670 ctrl = ks8695_readreg(ksp, KS8695_DTXC); 671 ks8695_writereg(ksp, KS8695_DTXC, ctrl & ~DTXC_TE); 674 ctrl = ks8695_readreg(ksp, KS8695_DRXC); 675 ks8695_writereg(ksp, KS8695_DRXC, ctrl 757 u32 ctrl; local 866 u32 ctrl; local 921 u32 ctrl; local 984 u32 ctrl; local 1007 u32 ctrl; local 1091 u32 ctrl; local 1279 u32 ctrl; local 1307 u32 ctrl; local [all...] |
/drivers/usb/early/ |
H A D | ehci-dbgp.c | 163 u32 ctrl; local 167 ctrl = readl(&ehci_debug->control); 169 if (ctrl & DBGP_DONE) 181 writel(ctrl | DBGP_DONE, &ehci_debug->control); 182 return (ctrl & DBGP_ERROR) ? -DBGP_ERRCODE(ctrl) : DBGP_LEN(ctrl); 200 static int dbgp_wait_until_done(unsigned ctrl, int loop) argument 206 writel(ctrl | DBGP_GO, &ehci_debug->control); 275 u32 pids, ctrl; local 301 u32 pids, addr, ctrl; local 332 u32 pids, addr, ctrl; local 433 u32 ctrl, cmd, status; local 500 u32 ctrl, portsc, cmd; local 759 u32 ctrl, portsc, hcs_params; local 919 u32 cmd, ctrl; local 977 u32 ctrl; local [all...] |