Searched refs:frequency (Results 76 - 100 of 321) sorted by relevance

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/drivers/media/tuners/
H A Dmxl5007t.c170 u32 frequency; member in struct:mxl5007t_state
434 /* Convert RF frequency into 16 bits =>
627 u32 freq = c->frequency;
673 state->frequency = freq;
726 static int mxl5007t_get_frequency(struct dvb_frontend *fe, u32 *frequency) argument
729 *frequency = state->frequency;
740 static int mxl5007t_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) argument
744 *frequency = 0;
748 *frequency
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H A Dtea5767.c28 u32 frequency; member in struct:tea5767_priv
192 unsigned int frq = params->frequency;
280 priv->frequency = frq * 125 / 2;
355 div = (87500 * 4 + 700 + 225 + 25) / 50; /* Set frequency to 87.5 MHz */
409 static int tea5767_get_frequency(struct dvb_frontend *fe, u32 *frequency) argument
412 *frequency = priv->frequency;
H A Dfc0012.c82 0x82, /* reg. 0x0b: Output Clock is same as clock frequency,
137 u32 freq = p->frequency / 1000;
164 /* select frequency divider and the frequency of VCO */
231 /* fix for frequency less than 45 MHz */
239 /* From VCO frequency determines the XIN ( fractional part of Delta
319 priv->frequency = p->frequency;
331 static int fc0012_get_frequency(struct dvb_frontend *fe, u32 *frequency) argument
334 *frequency
338 fc0012_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) argument
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H A Dtda827x.c46 u32 frequency; member in struct:tda827x_priv
85 priv->sgIF = 88; /* if frequency is 5.5 MHz */
177 tuner_freq = c->frequency;
221 priv->frequency = c->frequency;
259 unsigned int freq = params->frequency;
329 priv->frequency = params->frequency;
541 tuner_freq = c->frequency;
649 priv->frequency
777 tda827x_get_frequency(struct dvb_frontend *fe, u32 *frequency) argument
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H A Dmt2131.c109 freq = c->frequency / 1000; /* Hz -> kHz */
116 priv->frequency = (f_lo1 - f_lo2 - MT2131_IF2) * 1000;
184 static int mt2131_get_frequency(struct dvb_frontend *fe, u32 *frequency) argument
188 *frequency = priv->frequency;
/drivers/cpufreq/
H A Dp4-clockmod.c129 "voltage scaling in addition to frequency "
150 /* on P-4s, the TSC runs with constant frequency independent whether
157 "voltage scaling in addition of frequency scaling. "
191 /* switch to maximum frequency and measure result */
195 /* get max frequency */
201 for (i = 1; (p4clockmod_table[i].frequency != CPUFREQ_TABLE_END); i++) {
203 p4clockmod_table[i].frequency = CPUFREQ_ENTRY_INVALID;
205 p4clockmod_table[i].frequency = (stock_freq * i)/8;
H A Dspear-cpufreq.c110 newfreq = spear_cpufreq.freq_tbl[index].frequency * 1000;
116 * different clock source for different frequency of cpu clk.
205 freq_tbl[i].frequency = be32_to_cpup(val++);
207 freq_tbl[i].frequency = CPUFREQ_TABLE_END;
H A Delanfreq.c38 int clock; /* frequency in kHz */
74 * Finds out at which frequency the CPU of the Elan SOC runs
120 * Bit 6 enables Hyperspeed Mode (66/100 MHz core frequency)
163 if (pos->frequency > max_freq)
164 pos->frequency = CPUFREQ_ENTRY_INVALID;
179 * to set the maximum CPU frequency to 66 MHz. Note that in
181 * frequency will fall back to _current_ CPU frequency which
H A Dloongson2_cpufreq.c64 /* setting the cpu frequency */
91 (loongson2_clockmod_table[i].frequency != CPUFREQ_TABLE_END);
93 loongson2_clockmod_table[i].frequency = (rate * i) / 8;
167 pr_info("cpufreq: Loongson-2F CPU frequency driver.\n");
H A Dpowernow-k7.c13 * CPU with half frequency multipliers may hang upon wakeup from disconnect.
151 printk("frequency");
170 powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID;
188 powernow_table[j].frequency = (fsb * fid_codes[fid]) / 10;
191 speed = powernow_table[j].frequency;
214 powernow_table[number_scales].frequency = CPUFREQ_TABLE_END;
259 * the cpufreq frequency table in powernow_decode_bios,
270 freqs.new = powernow_table[index].frequency;
372 powernow_table[i].frequency = fsb * fid_codes[fid] / 10;
376 speed = powernow_table[i].frequency;
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H A Ds3c24xx-cpufreq.c73 cfg->pll.frequency = fclk;
83 unsigned long pll = cfg->pll.frequency;
105 pfx, cfg->pll.frequency, cfg->freq.fclk, cfg->freq.armclk,
180 cpu_new.freq.fclk = cpu_new.pll.frequency;
214 s3c_cpufreq_updateclk(_clk_mpll, cpu_new.pll.frequency);
219 /* start the frequency change */
276 * called by the cpufreq core to adjust the frequency that the CPU
307 target_freq, index, ftab[index].frequency);
308 target_freq = ftab[index].frequency;
313 /* find the settings for our new frequency */
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H A Dpowernow-k6.c36 MODULE_PARM_DESC(bus_frequency, "Bus frequency in kHz");
80 * Returns the current setting of the frequency multiplier. Core clock
81 * speed is frequency of the Front-Side Bus multiplied with this value.
111 * frequency, so we must disable cache.
144 printk(KERN_ERR PFX "invalid target frequency\n");
183 printk(KERN_WARNING "powernow-k6: unknown frequency %u, cannot determine current multiplier\n", khz);
208 pos->frequency = CPUFREQ_ENTRY_INVALID;
210 pos->frequency = busfreq * f;
224 for (i = 0; (clock_ratio[i].frequency != CPUFREQ_TABLE_END); i++) {
229 freqs.new = clock_ratio[i].frequency;
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H A De_powersaver.c101 /* Return current frequency */
165 /* Make frequency transition */
280 "frequency then its maximum. Aborting.\n");
334 /* Allocate private data and frequency table for current cpu */
348 /* Fill frequency and MSR value table */
351 f_table[0].frequency = fsb * min_multiplier;
353 f_table[1].frequency = fsb * max_multiplier;
355 f_table[2].frequency = CPUFREQ_TABLE_END;
362 f_table[k].frequency = fsb * i;
366 f_table[k].frequency
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H A Dimx6q-cpufreq.c47 new_freq = freq_table[index].frequency;
67 /* scaling up? scale voltage before frequency */
91 * reprogram PLL for frequency scaling. The procedure of reprogramming
113 /* scaling down? scale voltage after frequency */
236 * Each OPP is a set of tuples consisting of frequency and
248 if (freq_table[j].frequency == freq) {
261 if (freq_table[num - 1].frequency * 1000 == FREQ_1P2_GHZ)
282 * OPP is maintained in order of increasing frequency, and
288 freq_table[0].frequency * 1000, true);
291 freq_table[--num].frequency * 100
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/drivers/media/dvb-frontends/
H A Dcx24113.c97 u32 frequency; member in struct:cx24113_state
310 s32 freq_hz = state->frequency * 1000;
318 if (state->frequency >= 1100000)
323 if (state->frequency >= 1165000)
344 cx_err("strange frequency: N < 6\n");
393 static int cx24113_set_frequency(struct cx24113_state *state, u32 frequency) argument
405 state->frequency = frequency;
407 dprintk("tuning to frequency: %d\n", frequency);
523 cx24113_get_frequency(struct dvb_frontend *fe, u32 *frequency) argument
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H A Dstb0899_drv.h49 IQ_SWAP_ON = -1, /* the derotator frequency register */
137 int (*tuner_set_frequency)(struct dvb_frontend *fe, u32 frequency);
138 int (*tuner_get_frequency)(struct dvb_frontend *fe, u32 *frequency);
/drivers/media/pci/mantis/
H A Dmantis_vp2033.c81 u32 div = (p->frequency + CU1216_IF + TUNER_MUL / 2) / TUNER_MUL;
86 buf[3] = (p->frequency < 150000000 ? 0x01 :
87 p->frequency < 445000000 ? 0x02 : 0x04);
H A Dmantis_vp2040.c63 u32 div = (p->frequency + CU1216_IF + TUNER_MUL / 2) / TUNER_MUL;
68 buf[3] = (p->frequency < 150000000 ? 0x01 :
69 p->frequency < 445000000 ? 0x02 : 0x04);
/drivers/media/dvb-core/
H A Ddvb_frontend.h72 unsigned int frequency; member in struct:analog_parameters
157 u32 frequency; member in struct:tuner_state
217 int (*get_frequency)(struct dvb_frontend *fe, u32 *frequency);
219 int (*get_if_frequency)(struct dvb_frontend *fe, u32 *frequency);
229 int (*set_frequency)(struct dvb_frontend *fe, u32 frequency);
340 u32 frequency; member in struct:dtv_frontend_properties
/drivers/clk/at91/
H A Dclk-slow.c51 unsigned long frequency; member in struct:clk_slow_rc_osc
186 return osc->frequency;
235 unsigned long frequency,
258 osc->frequency = frequency;
273 u32 frequency = 0; local
279 of_property_read_u32(np, "clock-frequency", &frequency);
283 clk = at91_clk_register_slow_rc_osc(sckcr, name, frequency, accuracy,
233 at91_clk_register_slow_rc_osc(void __iomem *sckcr, const char *name, unsigned long frequency, unsigned long accuracy, unsigned long startup) argument
/drivers/media/pci/ttpci/
H A Dbudget.c212 u32 div = (c->frequency + 479500) / 125;
214 if (c->frequency > 2000000)
216 else if (c->frequency > 1800000)
218 else if (c->frequency > 1600000)
220 else if (c->frequency > 1200000)
222 else if (c->frequency >= 1100000)
232 // divisor frequency to 62.5kHz and divide by 125 above
255 div = (c->frequency + 35937500 + 31250) / 62500;
260 data[3] = (c->frequency < 174000000 ? 0x88 : c->frequency < 47000000
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H A Dbudget-patch.c271 u32 div = (p->frequency + 479500) / 125;
273 if (p->frequency > 2000000)
275 else if (p->frequency > 1800000)
277 else if (p->frequency > 1600000)
279 else if (p->frequency > 1200000)
281 else if (p->frequency >= 1100000)
291 // divisor frequency to 62.5kHz and divide by 125 above
314 div = p->frequency / 125;
526 ** It depends on the phase and frequency of VSYNC and
554 ** and that means 3*25=75 Hz of interrupt frequency, a
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/drivers/iio/
H A DMakefile20 obj-y += frequency/
/drivers/media/radio/
H A Dradio-raremono.c133 /* Set frequency. */
257 u32 freq = f->frequency;
263 if (f->frequency >= (FM_FREQ_RANGE_LOW + SW_FREQ_RANGE_HIGH) * 8)
265 else if (f->frequency <= (AM_FREQ_RANGE_HIGH + SW_FREQ_RANGE_LOW) * 8)
270 freq = clamp_t(u32, f->frequency, bands[band].rangelow, bands[band].rangehigh);
282 f->frequency = radio->curfreq * 16;
/drivers/media/usb/tlg2300/
H A Dpd-radio.c19 static int set_frequency(struct poseidon *p, __u32 frequency);
218 argp->frequency = p->radio_data.fm_freq;
222 static int set_frequency(struct poseidon *p, __u32 frequency) argument
232 freq = (frequency * 125) / 2; /* Hz */
266 return set_frequency(p, argp->frequency);

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