Searched refs:pe (Results 26 - 48 of 48) sorted by relevance

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/drivers/misc/cxl/
H A Dirq.c110 pr_devel("CXL interrupt %i for afu pe: %i DSISR: %#llx DAR: %#llx\n", irq, ctx->pe, dsisr, dar);
123 pr_devel("Scheduling segment miss handling for later pe: %i\n", ctx->pe);
144 pr_devel("Scheduling page fault handling for later pe: %i\n", ctx->pe);
165 "undelivered to pe %i: %.llx\n",
166 ctx->pe, irq_info.afu_err);
223 WARN(1, "Recieved AFU IRQ out of range for pe %i (virq %i hwirq %lx)\n",
224 ctx->pe, ir
[all...]
H A Dmain.c47 pr_devel("%s matched mm - card: %i afu: %i pe: %i\n", __func__,
48 ctx->afu->adapter->adapter_num, ctx->afu->slice, ctx->pe);
H A Dcxl.h426 int pe; /* process element handle */ member in struct:cxl_context
/drivers/gpu/drm/nouveau/core/engine/disp/
H A Dpiornv50.c99 nv50_pior_dp_drv_ctl(struct nvkm_output_dp *outp, int ln, int vs, int pe, int pc) argument
103 return port->func->drv_ctl(port, ln, vs, pe);
/drivers/gpu/drm/radeon/
H A Dcik_sdma.c756 * @pe: addr of the page entry
764 uint64_t pe, uint64_t src,
778 ib->ptr[ib->length_dw++] = lower_32_bits(pe);
779 ib->ptr[ib->length_dw++] = upper_32_bits(pe);
781 pe += bytes;
792 * @pe: addr of the page entry
793 * @addr: dst addr to write into pe
802 uint64_t pe,
817 ib->ptr[ib->length_dw++] = pe;
818 ib->ptr[ib->length_dw++] = upper_32_bits(pe);
762 cik_sdma_vm_copy_pages(struct radeon_device *rdev, struct radeon_ib *ib, uint64_t pe, uint64_t src, unsigned count) argument
800 cik_sdma_vm_write_pages(struct radeon_device *rdev, struct radeon_ib *ib, uint64_t pe, uint64_t addr, unsigned count, uint32_t incr, uint32_t flags) argument
850 cik_sdma_vm_set_pages(struct radeon_device *rdev, struct radeon_ib *ib, uint64_t pe, uint64_t addr, unsigned count, uint32_t incr, uint32_t flags) argument
[all...]
H A Dradeon_asic.h613 uint64_t pe, uint64_t src,
617 uint64_t pe,
622 uint64_t pe,
711 uint64_t pe, uint64_t src,
715 uint64_t pe,
720 uint64_t pe,
800 uint64_t pe, uint64_t src,
804 uint64_t pe,
809 uint64_t pe,
H A Dradeon_vm.c350 * @pe: addr of the page entry
351 * @addr: dst addr to write into pe
361 uint64_t pe,
365 trace_radeon_vm_set_page(pe, addr, count, incr, flags);
369 radeon_asic_vm_copy_pages(rdev, ib, pe, src, count);
372 radeon_asic_vm_write_pages(rdev, ib, pe, addr,
376 radeon_asic_vm_set_pages(rdev, ib, pe, addr,
359 radeon_vm_set_pages(struct radeon_device *rdev, struct radeon_ib *ib, uint64_t pe, uint64_t addr, unsigned count, uint32_t incr, uint32_t flags) argument
H A Dradeon.h1830 uint64_t pe, uint64_t src,
1834 uint64_t pe,
1839 uint64_t pe,
2824 #define radeon_asic_vm_copy_pages(rdev, ib, pe, src, count) ((rdev)->asic->vm.copy_pages((rdev), (ib), (pe), (src), (count)))
2825 #define radeon_asic_vm_write_pages(rdev, ib, pe, addr, count, incr, flags) ((rdev)->asic->vm.write_pages((rdev), (ib), (pe), (addr), (count), (incr), (flags)))
2826 #define radeon_asic_vm_set_pages(rdev, ib, pe, addr, count, incr, flags) ((rdev)->asic->vm.set_pages((rdev), (ib), (pe), (addr), (count), (incr), (flags)))
/drivers/atm/
H A Dfirestream.c777 struct FS_BPENTRY *pe; local
793 pe = bus_to_virt (qe->p0);
795 pe->flags, pe->next, pe->bsa, pe->aal_bufsize,
796 pe->skb, pe->fp);
811 skb = pe->skb;
812 pe
[all...]
/drivers/gpu/drm/nouveau/core/include/subdev/
H A Di2c.h52 int (*drv_ctl)(struct nouveau_i2c_port *, int lane, int sw, int pe);
/drivers/staging/lustre/lustre/obdclass/
H A Dacl.c302 posix_acl_xattr_entry pe = {ACL_MASK, 0, ACL_UNDEFINED_ID}; local
306 lustre_posix_acl_cpu_to_le(&pe, &pe);
307 ee = lustre_ext_acl_xattr_search(ext_header, &pe, &pos);
/drivers/parisc/
H A Deisa.c432 char *pe; local
434 val = (int) simple_strtoul(cur, &pe, 0);
/drivers/scsi/aic94xx/
H A Daic94xx_sds.c942 struct asd_ctrla_phy_entry *pe = &ps->phy_ent[i]; local
946 if (*(u64 *)pe->sas_addr == 0) {
951 memcpy(asd_ha->hw_prof.phy_desc[i].sas_addr, pe->sas_addr,
954 (pe->sas_link_rates & 0xF0) >> 4;
956 (pe->sas_link_rates & 0x0F);
958 (pe->sata_link_rates & 0xF0) >> 4;
960 (pe->sata_link_rates & 0x0F);
961 asd_ha->hw_prof.phy_desc[i].flags = pe->flags;
/drivers/scsi/isci/
H A Dregisters.h440 #define SMU_RESET_PROTOCOL_ENGINE(peg, pe) \
441 ((1 << (pe)) << ((peg) * 8))
1819 struct transport_link_layer_pair pe[4]; member in struct:scu_peg_registers
H A Dhost.c2219 &ihost->scu_registers->peg0.pe[i].tl,
2220 &ihost->scu_registers->peg0.pe[i].ll);
/drivers/net/wireless/ath/ath10k/
H A Dwmi.c1689 struct pulse_event pe; local
1731 pe.ts = tsf64;
1732 pe.freq = ar->hw->conf.chandef.chan->center_freq;
1733 pe.width = width;
1734 pe.rssi = rssi;
1738 pe.freq, pe.width, pe.rssi, pe.ts);
1742 if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
[all...]
/drivers/scsi/lpfc/
H A Dlpfc_ct.c1359 PORT_ENTRY *pe; local
1418 memcpy(&rh->rpl.pe, &vport->fc_sparam.portName,
1685 pe = (PORT_ENTRY *) & CtReq->un.PortID;
1686 memcpy((uint8_t *) & pe->PortName,
1695 pe = (PORT_ENTRY *) & CtReq->un.PortID;
1696 memcpy((uint8_t *) & pe->PortName,
H A Dlpfc_hw.h1129 PORT_ENTRY pe; /* Variable-length array */ member in struct:__anon5618
/drivers/media/pci/saa7164/
H A Dsaa7164-core.c1143 struct proc_dir_entry *pe; local
1145 pe = proc_create("saa7164", S_IRUGO, NULL, &saa7164_proc_fops);
1146 if (!pe)
/drivers/scsi/
H A Dncr53c8xx.c673 char *pe; local
684 val = (int) simple_strtoul(pv, &pe, 0);
689 if (pe && *pe == '/') {
691 while (*pe && *pe != ARG_SEP &&
693 driver_setup.tag_ctrl[i++] = *pe++;
/drivers/isdn/hardware/eicon/
H A Ddivacapi.h642 unsigned pe:1; member in struct:async_s
/drivers/ata/
H A Dsata_dwc_460ex.c274 struct ata_probe_ent *pe; /* ptr to probe-ent */ member in struct:sata_dwc_device
/drivers/pinctrl/
H A Dpinctrl-tegra124.c1662 FUNCTION(pe),

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