Searched refs:reg (Results 101 - 125 of 2563) sorted by relevance

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/drivers/gpu/drm/rcar-du/
H A Drcar_du_group.h41 u32 rcar_du_group_read(struct rcar_du_group *rgrp, u32 reg);
42 void rcar_du_group_write(struct rcar_du_group *rgrp, u32 reg, u32 data);
/drivers/misc/
H A Dad525x_dpot-i2c.c20 static int write_r8d8(void *client, u8 reg, u8 val) argument
22 return i2c_smbus_write_byte_data(client, reg, val);
25 static int write_r8d16(void *client, u8 reg, u16 val) argument
27 return i2c_smbus_write_word_data(client, reg, val);
35 static int read_r8d8(void *client, u8 reg) argument
37 return i2c_smbus_read_byte_data(client, reg);
40 static int read_r8d16(void *client, u8 reg) argument
42 return i2c_smbus_read_word_data(client, reg);
/drivers/net/ethernet/intel/i40e/
H A Di40e_osdep.h46 #define wr32(a, reg, value) writel((value), ((a)->hw_addr + (reg)))
47 #define rd32(a, reg) readl((a)->hw_addr + (reg))
49 #define wr64(a, reg, value) writeq((value), ((a)->hw_addr + (reg)))
50 #define rd64(a, reg) readq((a)->hw_addr + (reg))
/drivers/scsi/
H A Dg_NCR5380.h75 #define NCR5380_read(reg) (inb(NCR5380_map_name + (reg)))
76 #define NCR5380_write(reg, value) (outb((value), (NCR5380_map_name + (reg))))
100 #define NCR5380_read(reg) readb(iomem + NCR53C400_mem_base + (reg))
101 #define NCR5380_write(reg, value) writeb(value, iomem + NCR53C400_mem_base + (reg))
/drivers/scsi/qla4xxx/
H A Dql4_inline.h43 &ha->reg->u1.isp4022.intr_mask);
44 readl(&ha->reg->u1.isp4022.intr_mask);
46 writel(set_rmask(CSR_SCSI_INTR_ENABLE), &ha->reg->ctrl_status);
47 readl(&ha->reg->ctrl_status);
57 &ha->reg->u1.isp4022.intr_mask);
58 readl(&ha->reg->u1.isp4022.intr_mask);
60 writel(clr_rmask(CSR_SCSI_INTR_ENABLE), &ha->reg->ctrl_status);
61 readl(&ha->reg->ctrl_status);
/drivers/xen/xen-pciback/
H A Dconf_space_quirks.h23 int xen_pcibk_config_quirks_remove_field(struct pci_dev *dev, int reg);
31 int xen_pcibk_field_is_dup(struct pci_dev *dev, unsigned int reg);
/drivers/media/dvb-frontends/
H A Dstb0899_algo.c177 u8 reg; local
183 reg = stb0899_read_reg(state, STB0899_TLIR);
184 lock = STB0899_GETFIELD(TLIR_TMG_LOCK_IND, reg);
252 u8 reg; local
256 reg = stb0899_read_reg(state, STB0899_CFD);
257 STB0899_SETFIELD_VAL(CFD_ON, reg, 1);
258 stb0899_write_reg(state, STB0899_CFD, reg);
260 reg = stb0899_read_reg(state, STB0899_DSTATUS);
261 dprintk(state->verbose, FE_DEBUG, 1, "--------------------> STB0899_DSTATUS=[0x%02x]", reg);
262 if (STB0899_GETFIELD(CARRIER_FOUND, reg)) {
284 u8 reg; local
339 u8 reg; local
392 u8 reg; local
506 u8 bclc, reg; local
741 u32 uwp1, uwp2, uwp3, reg; local
773 u32 reg; local
853 u32 correction, freq_adj, band_lim, decim_cntrl, reg; local
911 u32 reg; local
966 u32 reg; local
983 u32 range, reg; local
1027 u32 reg; local
1050 u32 reg = 0; local
1099 u32 reg; local
1133 u8 reg; local
1285 u32 bTrNomFreq, srate, decimRate, intval1, intval2, reg; local
1321 u32 reg, csm1; local
[all...]
H A Dstv090x.c695 static int stv090x_read_reg(struct stv090x_state *state, unsigned int reg) argument
700 u8 b0[] = { reg >> 8, reg & 0xff };
713 reg, ret);
719 reg, buf);
724 static int stv090x_write_regs(struct stv090x_state *state, unsigned int reg, u8 *data, u32 count) argument
733 "%s: i2c wr reg=%04x: len=%d is too big!\n",
734 KBUILD_MODNAME, reg, count);
738 buf[0] = reg >> 8;
739 buf[1] = reg
762 stv090x_write_reg(struct stv090x_state *state, unsigned int reg, u8 data) argument
769 u32 reg; local
1215 u32 reg; local
1283 u32 reg; local
1415 u32 reg, freq_abs; local
1603 u32 agc2_min = 0xffff, agc2 = 0, freq_init, freq_step, reg; local
1700 u32 srate_coarse = 0, agc2 = 0, car_step = 1200, reg; local
1862 u32 srate_coarse, freq_coarse, sym, reg; local
1961 u32 reg; local
1994 u32 agc2, reg, srate_coarse; local
2077 u32 reg; local
2147 u32 reg; local
2355 u32 reg; local
2418 u32 reg; local
2519 u32 reg; local
2564 u32 reg, rate; local
2607 u32 reg; local
2858 u32 reg; local
3100 u32 reg; local
3133 u32 reg; local
3157 u32 reg; local
3183 u32 reg; local
3440 u32 reg; local
3503 u32 reg, dstatus; local
3557 u32 reg, h, m, l; local
3642 u32 reg; local
3666 u32 reg_0, reg_1, reg, i; local
3725 u32 reg; local
3764 u32 reg, idle = 0, fifo_full = 1; local
3815 u32 reg, idle = 0, fifo_full = 1; local
3872 u32 reg = 0, i = 0, rx_end = 0; local
3893 u32 reg; local
4029 u32 reg; local
4141 u32 reg = 0; local
4242 u32 div, reg; local
4255 u32 reg, div, clk_sel; local
4284 u32 reg; local
4555 u32 reg; local
4672 u32 reg; local
4754 u32 reg = 0; local
4866 u8 reg = 0; local
[all...]
/drivers/media/i2c/
H A Dadv7183.c84 static inline int adv7183_read(struct v4l2_subdev *sd, unsigned char reg) argument
88 return i2c_smbus_read_byte_data(client, reg);
91 static inline int adv7183_write(struct v4l2_subdev *sd, unsigned char reg, argument
96 return i2c_smbus_write_byte_data(client, reg, value);
102 unsigned char reg, data; local
111 reg = *regs++;
115 adv7183_write(sd, reg, data);
212 int reg; local
214 reg = adv7183_read(sd, ADV7183_IN_CTRL) & 0xF;
216 reg |
242 int reg; local
255 int reg; local
364 int reg; local
412 int reg; local
484 adv7183_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg) argument
491 adv7183_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg) argument
[all...]
H A Dsaa7191.c52 u8 reg[25]; member in struct:saa7191
107 static u8 saa7191_read_reg(struct v4l2_subdev *sd, u8 reg) argument
109 return to_saa7191(sd)->reg[reg];
127 static int saa7191_write_reg(struct v4l2_subdev *sd, u8 reg, u8 value) argument
131 to_saa7191(sd)->reg[reg] = value;
132 return i2c_smbus_write_byte_data(client, reg, value);
145 decoder->reg[data[0] + i] = data[i + 1];
405 u8 reg; local
470 u8 reg; local
[all...]
/drivers/media/platform/s5p-mfc/
H A Ds5p_mfc_opr_v6.c638 unsigned int reg = 0; local
655 reg = 0;
656 reg |= p->gop_size & 0xFFFF;
657 writel(reg, mfc_regs->e_gop_config);
662 reg = 0;
664 reg |= (0x1 << 3);
665 writel(reg, mfc_regs->e_enc_options);
668 reg |= (0x1 << 3);
669 writel(reg, mfc_regs->e_enc_options);
672 reg
804 unsigned int reg = 0; local
1085 unsigned int reg = 0; local
1167 unsigned int reg = 0; local
1237 unsigned int reg = 0; local
1329 unsigned int reg = 0; local
[all...]
/drivers/clocksource/
H A Dmmio.c14 void __iomem *reg; member in struct:clocksource_mmio
25 return (cycle_t)readl_relaxed(to_mmio_clksrc(c)->reg);
30 return ~(cycle_t)readl_relaxed(to_mmio_clksrc(c)->reg) & c->mask;
35 return (cycle_t)readw_relaxed(to_mmio_clksrc(c)->reg);
40 return ~(cycle_t)readw_relaxed(to_mmio_clksrc(c)->reg) & c->mask;
65 cs->reg = base;
/drivers/hwmon/
H A Dsch56xx-common.h24 int sch56xx_read_virtual_reg(u16 addr, u16 reg);
25 int sch56xx_write_virtual_reg(u16 addr, u16 reg, u8 val);
26 int sch56xx_read_virtual_reg16(u16 addr, u16 reg);
/drivers/media/pci/tw68/
H A Dtw68.h42 #include "tw68-reg.h"
193 #define tw_readl(reg) readl(dev->lmmio + ((reg) >> 2))
194 #define tw_readb(reg) readb(dev->bmmio + (reg))
195 #define tw_writel(reg, value) writel((value), dev->lmmio + ((reg) >> 2))
196 #define tw_writeb(reg, value) writeb((value), dev->bmmio + (reg))
198 #define tw_andorl(reg, mas
[all...]
/drivers/mmc/host/
H A Dsdhci-of-hlwd.c36 static void sdhci_hlwd_writel(struct sdhci_host *host, u32 val, int reg) argument
38 sdhci_be32bs_writel(host, val, reg);
42 static void sdhci_hlwd_writew(struct sdhci_host *host, u16 val, int reg) argument
44 sdhci_be32bs_writew(host, val, reg);
48 static void sdhci_hlwd_writeb(struct sdhci_host *host, u8 val, int reg) argument
50 sdhci_be32bs_writeb(host, val, reg);
/drivers/net/ethernet/intel/fm10k/
H A Dfm10k_common.h29 u16 fm10k_read_pci_cfg_word(struct fm10k_hw *hw, u32 reg);
32 u32 fm10k_read_reg(struct fm10k_hw *hw, int reg);
35 #define fm10k_write_reg(hw, reg, val) \
39 writel((val), &hw_addr[(reg)]); \
43 #define fm10k_write_sw_reg(hw, reg, val) \
47 writel((val), &sw_addr[(reg)]); \
/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac-meson.c25 void __iomem *reg; member in struct:meson_dwmac
33 val = readl(dwmac->reg);
44 writel(val, dwmac->reg);
57 dwmac->reg = devm_ioremap_resource(&pdev->dev, res);
58 if (IS_ERR(dwmac->reg))
59 return dwmac->reg;
/drivers/pinctrl/samsung/
H A Dpinctrl-exynos.h50 #define EXYNOS_PIN_BANK_EINTN(pins, reg, id) \
53 .pctl_offset = reg, \
59 #define EXYNOS_PIN_BANK_EINTG(pins, reg, id, offs) \
62 .pctl_offset = reg, \
69 #define EXYNOS_PIN_BANK_EINTW(pins, reg, id, offs) \
72 .pctl_offset = reg, \
/drivers/clk/zynq/
H A Dpll.c110 u32 reg; local
115 reg = clk_readl(clk->pll_ctrl);
119 return !(reg & (PLLCTRL_RESET_MASK | PLLCTRL_PWRDWN_MASK));
130 u32 reg; local
141 reg = clk_readl(clk->pll_ctrl);
142 reg &= ~(PLLCTRL_RESET_MASK | PLLCTRL_PWRDWN_MASK);
143 clk_writel(reg, clk->pll_ctrl);
160 u32 reg; local
171 reg = clk_readl(clk->pll_ctrl);
172 reg |
202 u32 reg; local
[all...]
/drivers/ide/
H A Dcs5535.c78 u32 reg = 0, dummy; local
96 reg = (cs5535_pio_cmd_timings[cmd] << 16) |
98 wrmsr(unit ? ATAC_CH0D1_PIO : ATAC_CH0D0_PIO, reg, 0);
101 rdmsr(unit ? ATAC_CH0D0_PIO : ATAC_CH0D1_PIO, reg, dummy);
103 if (((reg >> 16) & cs5535_pio_cmd_timings[cmd]) !=
105 reg &= 0x0000FFFF;
106 reg |= cs5535_pio_cmd_timings[cmd] << 16;
107 wrmsr(unit ? ATAC_CH0D0_PIO : ATAC_CH0D1_PIO, reg, 0);
111 rdmsr(unit ? ATAC_CH0D1_DMA : ATAC_CH0D0_DMA, reg, dummy);
113 reg |
[all...]
/drivers/net/wireless/rt2x00/
H A Drt2x00usb.h217 __le32 reg; local
220 &reg, sizeof(reg), REGISTER_TIMEOUT);
221 *value = le32_to_cpu(reg);
237 __le32 reg; local
240 &reg, sizeof(reg), REGISTER_TIMEOUT);
241 *value = le32_to_cpu(reg);
277 __le32 reg = cpu_to_le32(value); local
280 &reg, sizeo
296 __le32 reg = cpu_to_le32(value); local
[all...]
/drivers/edac/
H A Dsb_edac.c68 #define SAD_LIMIT(reg) ((GET_BITFIELD(reg, 6, 25) << 26) | 0x3ffffff)
69 #define DRAM_ATTR(reg) GET_BITFIELD(reg, 2, 3)
70 #define INTERLEAVE_MODE(reg) GET_BITFIELD(reg, 1, 1)
71 #define DRAM_RULE_ENABLE(reg) GET_BITFIELD(reg, 0, 0)
72 #define A7MODE(reg) GET_BITFIELD(reg, 2
74 get_dram_attr(u32 reg) argument
127 sad_pkg(const struct interleave_pkg *table, u32 reg, int interleave) argument
601 u32 reg; local
610 u32 reg; local
618 u32 reg; local
627 u32 reg; local
634 rir_limit(u32 reg) argument
641 u32 reg; local
660 u32 reg; local
692 u32 reg; local
699 u32 reg; local
707 u32 reg; local
716 u32 reg; local
726 haswell_rir_limit(u32 reg) argument
799 u32 reg; local
909 u32 reg; local
1088 u32 reg, dram_rule; local
[all...]
/drivers/gpio/
H A Dgpio-lynxpoint.c49 /* LP_CONFIG1 reg bits */
57 /* LP_CONFIG2 reg bits */
86 * LP0_CONFIG1 (gpio 0) config1 reg for gpio 0 (per gpio registers)
87 * LP0_CONFIG2 (gpio 0) config2 reg for gpio 0
88 * LP1_CONFIG1 (gpio 1) config1 reg for gpio 1
89 * LP1_CONFIG2 (gpio 1) config2 reg for gpio 1
98 int reg)
103 if (reg == LP_CONFIG1 || reg == LP_CONFIG2)
110 return lg->reg_base + reg
97 lp_gpio_reg(struct gpio_chip *chip, unsigned offset, int reg) argument
116 unsigned long reg = lp_gpio_reg(chip, offset, LP_CONFIG1); local
156 unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_CONFIG1); local
188 unsigned long reg = lp_gpio_reg(chip, offset, LP_CONFIG1); local
195 unsigned long reg = lp_gpio_reg(chip, offset, LP_CONFIG1); local
203 outl(inl(reg) & ~OUT_LVL_BIT, reg); local
211 unsigned long reg = lp_gpio_reg(chip, offset, LP_CONFIG1); local
225 unsigned long reg = lp_gpio_reg(chip, offset, LP_CONFIG1); local
244 unsigned long reg, ena, pending; local
278 unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE); local
291 unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE); local
311 unsigned long reg; local
414 unsigned long reg; local
[all...]
H A Dgpio-msic.c107 int reg; local
109 reg = msic_gpio_to_oreg(offset);
110 if (reg < 0)
111 return reg;
113 return intel_msic_reg_update(reg, MSIC_GPIO_DIR_IN, MSIC_GPIO_DIR_MASK);
119 int reg; local
125 reg = msic_gpio_to_oreg(offset);
126 if (reg < 0)
127 return reg;
129 return intel_msic_reg_update(reg, valu
136 int reg; local
151 int reg; local
196 int reg; local
[all...]
/drivers/net/wireless/mwifiex/
H A Dpcie.h205 const struct mwifiex_pcie_card_reg *reg; member in struct:mwifiex_pcie_device
213 .reg = &mwifiex_reg_8766,
221 .reg = &mwifiex_reg_8897,
289 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; local
293 if (((card->txbd_wrptr & reg->tx_mask) ==
294 (rdptr & reg->tx_mask)) &&
295 ((card->txbd_wrptr & reg->tx_rollover_ind) !=
296 (rdptr & reg->tx_rollover_ind)))
300 if (((card->txbd_wrptr & reg
314 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; local
[all...]

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