/drivers/staging/media/davinci_vpfe/ |
H A D | dm365_ipipeif.c | 74 static inline void ipipeif_write(u32 val, void *addr, u32 offset) argument 76 writel(val, addr + offset); 81 u32 val = 0; local 84 val = (dpc->en & 1) << IPIPEIF_DPC2_EN_SHIFT; 85 val |= dpc->thr & IPIPEIF_DPC2_THR_MASK; 87 ipipeif_write(val, addr, IPIPEIF_DPC2); 195 unsigned int val; local 210 tmp = val = get_oneshot_mode(ipipeif->input); 215 val = val << ONESHOT_SHIF 511 unsigned char val; local 802 u32 val; local [all...] |
/drivers/gpu/drm/nouveau/core/subdev/clock/ |
H A D | gk20a.c | 130 u32 val; local 132 val = nv_rd32(priv, GPCPLL_COEFF); 133 priv->m = (val >> GPCPLL_COEFF_M_SHIFT) & MASK(GPCPLL_COEFF_M_WIDTH); 134 priv->n = (val >> GPCPLL_COEFF_N_SHIFT) & MASK(GPCPLL_COEFF_N_WIDTH); 135 priv->pl = (val >> GPCPLL_COEFF_P_SHIFT) & MASK(GPCPLL_COEFF_P_WIDTH); 270 u32 val; local 274 val = nv_rd32(priv, GPCPLL_COEFF); 276 if (n == ((val >> GPCPLL_COEFF_N_SHIFT) & MASK(GPCPLL_COEFF_N_WIDTH))) 291 val = nv_rd32(priv, GPCPLL_COEFF); 292 val 341 u32 val, cfg; local 439 u32 val; local [all...] |
/drivers/media/usb/pvrusb2/ |
H A D | pvrusb2-ctrl.c | 28 static int pvr2_ctrl_range_check(struct pvr2_ctrl *cptr,int val) argument 31 if (!cptr->info->check_value(cptr,val)) return -ERANGE; 33 if (val < 0) return -ERANGE; 34 if (val >= cptr->info->def.type_enum.count) return -ERANGE; 41 if (val < lim) return -ERANGE; 46 if (val > lim) return -ERANGE; 53 int pvr2_ctrl_set_value(struct pvr2_ctrl *cptr,int val) argument 55 return pvr2_ctrl_set_mask_value(cptr,~0,val); 60 int pvr2_ctrl_set_mask_value(struct pvr2_ctrl *cptr,int mask,int val) argument 70 ret = pvr2_ctrl_range_check(cptr,val); 197 pvr2_ctrl_get_valname(struct pvr2_ctrl *cptr,int val, char *bptr,unsigned int bmax, unsigned int *blen) argument 283 pvr2_ctrl_custom_value_to_sym(struct pvr2_ctrl *cptr, int mask,int val, char *buf,unsigned int maxlen, unsigned int *len) argument 305 gen_bitmask_string(int msk,int val,int msk_only, const char **names, char *ptr,unsigned int len) argument 436 int mask,val,kv,mode,ret; local 547 pvr2_ctrl_value_to_sym_internal(struct pvr2_ctrl *cptr, int mask,int val, char *buf,unsigned int maxlen, unsigned int *len) argument 587 pvr2_ctrl_value_to_sym(struct pvr2_ctrl *cptr, int mask,int val, char *buf,unsigned int maxlen, unsigned int *len) argument [all...] |
/drivers/media/dvb-frontends/ |
H A D | cx22700.c | 81 printk("%s: writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n", 106 u8 val; local 114 val = cx22700_readreg (state, 0x09); 115 return cx22700_writereg (state, 0x09, val | 0x01); 117 val = cx22700_readreg (state, 0x09); 118 return cx22700_writereg (state, 0x09, val & 0xfe); 129 u8 val; local 167 val = qam_tab[p->modulation - QPSK]; 168 val |= p->hierarchy - HIERARCHY_NONE; 170 cx22700_writereg (state, 0x04, val); 194 u8 val; local [all...] |
H A D | rtl2830_priv.h | 41 u8 val; member in struct:rtl2830_reg_val_mask
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H A D | stv6110x_priv.h | 49 #define STV6110x_SETFIELD(mask, bitf, val) \ 52 (val << STV6110x_OFFST_##bitf)) 54 #define STV6110x_GETFIELD(bitf, val) \ 55 ((val >> STV6110x_OFFST_##bitf) & \
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/drivers/mtd/nand/ |
H A D | omap_elm.c | 95 static void elm_write_reg(struct elm_info *info, int offset, u32 val) argument 97 writel(val, info->elm_base + offset); 175 u32 val; local 187 val = cpu_to_be32(*(u32 *) &ecc[9]); 188 elm_write_reg(info, offset, val); 192 val = cpu_to_be32(*(u32 *) &ecc[5]); 193 elm_write_reg(info, offset, val); 197 val = cpu_to_be32(*(u32 *) &ecc[1]); 198 elm_write_reg(info, offset, val); 202 val [all...] |
/drivers/clk/qcom/ |
H A D | clk-pll.c | 41 u32 mask, val; local 44 ret = regmap_read(pll->clkr.regmap, pll->mode_reg, &val); 49 if ((val & mask) == mask || val & PLL_VOTE_FSM_ENA) 86 u32 val; local 88 regmap_read(pll->clkr.regmap, pll->mode_reg, &val); 90 if (val & PLL_VOTE_FSM_ENA) 197 u32 val; local 204 ret = regmap_read(pll->clkr.regmap, pll->status_reg, &val); 207 if (val 237 u32 val; local 257 u32 val; local [all...] |
/drivers/media/i2c/ |
H A D | ths7303.c | 71 static int ths7303_write(struct v4l2_subdev *sd, u8 reg, u8 val) argument 78 ret = i2c_smbus_write_byte_data(client, reg, val); 92 u8 val, sel = 0; local 116 val = (sel << 6) | (sel << 3); 118 val |= (pdata->ch_1 & 0x27); 119 err = ths7303_write(sd, THS7303_CHANNEL_1, val); 123 val = (sel << 6) | (sel << 3); 125 val |= (pdata->ch_2 & 0x27); 126 err = ths7303_write(sd, THS7303_CHANNEL_2, val); 130 val 270 u8 val = ths7303_read(sd, reg); local [all...] |
/drivers/media/rc/ |
H A D | ir-lirc-codec.c | 184 __u32 val = 0, tmp; local 195 ret = get_user(val, argp); 204 val = LIRC_CAN_SEND_PULSE & LIRC_CAN_SEND_MASK; 208 if (val != (LIRC_MODE_PULSE & LIRC_CAN_SEND_MASK)) 217 return dev->s_tx_mask(dev, val); 223 return dev->s_tx_carrier(dev, val); 229 if (val <= 0 || val >= 100) 232 return dev->s_tx_duty_cycle(dev, val); 239 if (val < [all...] |
/drivers/staging/rtl8723au/include/ |
H A D | rtw_security.h | 47 u64 val; member in union:pn48 219 static inline u32 rotr(u32 val, int bits) argument 221 return (val >> bits) | (val << (32 - bits)); 261 #define WPA_PUT_LE16(a, val) \ 263 (a)[1] = ((u16) (val)) >> 8; \ 264 (a)[0] = ((u16) (val)) & 0xff; \ 267 #define WPA_PUT_BE32(a, val) \ 269 (a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \ 270 (a)[1] = (u8) ((((u32) (val)) >> 1 [all...] |
/drivers/scsi/ |
H A D | sun_esp.c | 177 u8 bursts, val; local 181 val = of_getintprop_default(dma_dp, "burst-sizes", 0xff); 182 if (val != 0xff) 183 bursts &= val; 185 val = of_getintprop_default(dma_dp->parent, "burst-sizes", 0xff); 186 if (val != 0xff) 187 bursts &= val; 205 static void sbus_esp_write8(struct esp *esp, u8 val, unsigned long reg) argument 207 sbus_writeb(val, esp->regs + (reg * 4UL)); 259 u32 val; local 398 u32 val; local 536 u32 val = dma_read32(DMA_CSR); local 592 u32 val; local [all...] |
/drivers/clk/sunxi/ |
H A D | clk-sun6i-apb0.c | 24 { .val = 0, .div = 2, }, 25 { .val = 1, .div = 2, }, 26 { .val = 2, .div = 4, }, 27 { .val = 3, .div = 8, },
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/drivers/media/i2c/smiapp/ |
H A D | smiapp-quirk.h | 57 u32 *val); 65 u8 val; member in struct:smiapp_reg_8 69 u32 limit, u32 val); 74 .val = _val, \
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/drivers/media/tuners/ |
H A D | qt1010_priv.h | 90 u8 oper, reg, val; member in struct:__anon2325
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/drivers/misc/ |
H A D | ti_dac7512.c | 32 unsigned long val; local 35 ret = kstrtoul(buf, 10, &val); 39 tmp[0] = val >> 8; 40 tmp[1] = val & 0xff;
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/drivers/net/dsa/ |
H A D | mv88e6171.c | 174 u16 val; local 181 val = REG_READ(addr, 0x01); 183 REG_WRITE(addr, 0x01, val | 0x003e); 185 REG_WRITE(addr, 0x01, val | 0x0003); 207 val = 0x0433; 210 val |= 0x3300; 212 val |= 0x0100; 215 val |= 0x0100; 217 val |= 0x000c; 218 REG_WRITE(addr, 0x04, val); 336 mv88e6171_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val) argument [all...] |
/drivers/net/ethernet/intel/fm10k/ |
H A D | fm10k_common.h | 35 #define fm10k_write_reg(hw, reg, val) \ 39 writel((val), &hw_addr[(reg)]); \ 43 #define fm10k_write_sw_reg(hw, reg, val) \ 47 writel((val), &sw_addr[(reg)]); \
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H A D | fm10k_tlv.h | 115 #define fm10k_tlv_attr_put_u8(msg, attr_id, val) \ 116 fm10k_tlv_attr_put_value(msg, attr_id, val, 1) 117 #define fm10k_tlv_attr_put_u16(msg, attr_id, val) \ 118 fm10k_tlv_attr_put_value(msg, attr_id, val, 2) 119 #define fm10k_tlv_attr_put_u32(msg, attr_id, val) \ 120 fm10k_tlv_attr_put_value(msg, attr_id, val, 4) 121 #define fm10k_tlv_attr_put_u64(msg, attr_id, val) \ 122 fm10k_tlv_attr_put_value(msg, attr_id, val, 8) 123 #define fm10k_tlv_attr_put_s8(msg, attr_id, val) \ 124 fm10k_tlv_attr_put_value(msg, attr_id, val, [all...] |
/drivers/net/wireless/ath/ath9k/ |
H A D | ar9003_rtt.c | 75 u32 val; local 77 val = SM(data28, AR_PHY_RTT_SW_RTT_TABLE_DATA); 78 REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_1_B(chain), val); 80 val = SM(0, AR_PHY_RTT_SW_RTT_TABLE_ACCESS) | 83 REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val); 86 val |= SM(1, AR_PHY_RTT_SW_RTT_TABLE_ACCESS); 87 REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val); 95 val &= ~SM(1, AR_PHY_RTT_SW_RTT_TABLE_WRITE); 96 REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val); 144 u32 val; local [all...] |
/drivers/net/wireless/cw1200/ |
H A D | hwio.h | 170 u16 addr, u16 *val) 175 *val = le32_to_cpu(tmp) & 0xfffff; 180 u16 addr, u16 val) 182 __le32 tmp = cpu_to_le32((u32)val); 187 u16 addr, u32 *val) 191 *val = le32_to_cpu(tmp); 196 u16 addr, u32 val) 198 __le32 tmp = cpu_to_le32(val); 199 return cw1200_reg_write(priv, addr, &tmp, sizeof(val)); 224 u32 addr, u32 *val) 169 cw1200_reg_read_16(struct cw1200_common *priv, u16 addr, u16 *val) argument 179 cw1200_reg_write_16(struct cw1200_common *priv, u16 addr, u16 val) argument 186 cw1200_reg_read_32(struct cw1200_common *priv, u16 addr, u32 *val) argument 195 cw1200_reg_write_32(struct cw1200_common *priv, u16 addr, u32 val) argument 223 cw1200_apb_read_32(struct cw1200_common *priv, u32 addr, u32 *val) argument 232 cw1200_apb_write_32(struct cw1200_common *priv, u32 addr, u32 val) argument 238 cw1200_ahb_read_32(struct cw1200_common *priv, u32 addr, u32 *val) argument [all...] |
/drivers/oprofile/ |
H A D | cpu_buffer.h | 85 int op_cpu_buffer_add_data(struct op_entry *entry, unsigned long val) argument 89 *entry->data = val; 104 int op_cpu_buffer_get_data(struct op_entry *entry, unsigned long *val) argument 109 *val = *entry->data;
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/drivers/staging/comedi/drivers/ |
H A D | amplc_dio200.h | 49 void amplc_dio200_set_enhance(struct comedi_device *dev, unsigned char val);
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/drivers/staging/iio/Documentation/ |
H A D | generic_buffer.c | 76 int16_t val = input; local 77 val &= (1 << info->bits_used) - 1; 78 val = (int16_t)(val << (16 - info->bits_used)) >> 80 printf("%05f ", ((float)val + info->offset)*info->scale); 82 uint16_t val = input; local 83 val &= (1 << info->bits_used) - 1; 84 printf("%05f ", ((float)val + info->offset)*info->scale); 109 uint32_t val = *(uint32_t *) local 111 printf("%05f ", ((float)val 119 int64_t val = *(int64_t *) local [all...] |
/drivers/tty/serial/ |
H A D | samsung.h | 80 #define wr_regb(port, reg, val) __raw_writeb(val, portaddr(port, reg)) 81 #define wr_regl(port, reg, val) __raw_writel(val, portaddr(port, reg))
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