/drivers/i2c/busses/ |
H A D | i2c-sun6i-p2wi.c | 105 writel(status, p2wi->regs + P2WI_INTS); 132 writel(command, p2wi->regs + P2WI_DADDR0); 137 writel(data->byte, p2wi->regs + P2WI_DATA0); 139 writel(dlen, p2wi->regs + P2WI_DLEN); 148 writel(P2WI_INTS_LOAD_BSY | P2WI_INTS_TRANS_ERR | P2WI_INTS_TRANS_OVER, 151 writel(P2WI_CTRL_START_TRANS | P2WI_CTRL_GLOBAL_INT_ENB, 289 writel(P2WI_CTRL_SOFT_RST, p2wi->regs + P2WI_CTRL); 304 writel(P2WI_CCR_SDA_OUT_DELAY(1) | P2WI_CCR_CLK_DIV(clk_div),
|
H A D | i2c-nomadik.c | 202 writel(readl(reg) | mask, reg); 207 writel(readl(reg) & ~mask, reg); 230 writel((I2C_CR_FTX | I2C_CR_FRX), dev->virtbase + I2C_CR); 256 writel(mask, dev->virtbase + I2C_IMSCR); 267 writel(mask, dev->virtbase + I2C_ICR); 358 writel(0x0, dev->virtbase + I2C_CR); 359 writel(0x0, dev->virtbase + I2C_HSMCR); 360 writel(0x0, dev->virtbase + I2C_TFTR); 361 writel(0x0, dev->virtbase + I2C_RFTR); 362 writel( [all...] |
H A D | i2c-exynos5.c | 251 writel(readl(i2c->regs + HSI2C_INT_STATUS), 340 writel(i2c_timing_s1, i2c->regs + HSI2C_TIMING_HS1); 341 writel(i2c_timing_s2, i2c->regs + HSI2C_TIMING_HS2); 342 writel(i2c_timing_s3, i2c->regs + HSI2C_TIMING_HS3); 344 writel(i2c_timing_s1, i2c->regs + HSI2C_TIMING_FS1); 345 writel(i2c_timing_s2, i2c->regs + HSI2C_TIMING_FS2); 346 writel(i2c_timing_s3, i2c->regs + HSI2C_TIMING_FS3); 348 writel(i2c_timing_sla, i2c->regs + HSI2C_TIMING_SLA); 386 writel(i2c_timeout, i2c->regs + HSI2C_TIMEOUT); 388 writel((HSI2C_FUNC_MODE_I2 [all...] |
/drivers/leds/ |
H A D | leds-versatile.c | 51 writel(reg, led->base); 75 writel(0, base);
|
/drivers/mtd/nand/ |
H A D | atmel_nand_nfc.h | 57 writel((value), (addr) + ATMEL_HSMC_NFC_##reg) 94 writel((addr1234), (cmd) + nfc_base)
|
/drivers/scsi/csiostor/ |
H A D | csio_defs.h | 61 writel(val, addr); 62 writel(val >> 32, addr + 4);
|
/drivers/usb/chipidea/ |
H A D | ci_hdrc_msm.c | 27 writel(0, USB_AHBBURST); 28 writel(0, USB_AHBMODE);
|
H A D | usbmisc_imx.c | 92 writel(val, usbmisc->base); 101 writel(val, usbmisc->base); 125 writel(val | MX25_BM_EXTERNAL_VBUS_DIVIDER, reg); 158 writel(val, usbmisc->base); 179 writel(val, usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET); 202 writel(val, reg); 221 writel(reg | MX6_BM_OVER_CUR_DIS, 243 writel(reg | VF610_OVER_CUR_DIS, usbmisc->base);
|
/drivers/staging/comedi/drivers/ |
H A D | s626.c | 116 writel(val, dev->mmio + reg); 122 writel(cmd << 16 , dev->mmio + reg); 188 writel(S626_DEBI_CMD_RDWORD | addr, dev->mmio + S626_P_DEBICMD); 203 writel(S626_DEBI_CMD_WRWORD | addr, dev->mmio + S626_P_DEBICMD); 204 writel(wdata, dev->mmio + S626_P_DEBIAD); 221 writel(S626_DEBI_CMD_RDWORD | addr, dev->mmio + S626_P_DEBICMD); 224 writel(S626_DEBI_CMD_WRWORD | addr, dev->mmio + S626_P_DEBICMD); 228 writel(val & 0xffff, dev->mmio + S626_P_DEBIAD); 253 writel(val, dev->mmio + S626_P_I2CCTRL); 385 /* writel(va [all...] |
/drivers/usb/dwc2/ |
H A D | gadget.c | 58 writel(readl(ptr) | val, ptr); 63 writel(readl(ptr) & ~val, ptr); 107 writel(new_gsintmsk, hsotg->regs + GINTMSK); 124 writel(new_gsintmsk, hsotg->regs + GINTMSK); 154 writel(daint, hsotg->regs + DAINTMSK); 172 writel(2048, hsotg->regs + GRXFSIZ); 173 writel((2048 << FIFOSIZE_STARTADDR_SHIFT) | 203 writel(val, hsotg->regs + DPTXFSIZN(ep)); 214 writel(val, hsotg->regs + DPTXFSIZN(ep)); 222 writel(GRSTCTL_TXFNU [all...] |
/drivers/ata/ |
H A D | pata_arasan_cf.c | 248 writel(enable, acdev->vbase + GIRQ_STS_EN); 249 writel(enable, acdev->vbase + GIRQ_SGN_EN); 259 writel(mask, acdev->vbase + IRQ_STS); 260 writel(val | mask, acdev->vbase + IRQ_EN); 262 writel(val & ~mask, acdev->vbase + IRQ_EN); 269 writel(val | CARD_RESET, acdev->vbase + OP_MODE); 271 writel(val & ~CARD_RESET, acdev->vbase + OP_MODE); 276 writel(readl(acdev->vbase + OP_MODE) & ~CFHOST_ENB, 278 writel(readl(acdev->vbase + OP_MODE) | CFHOST_ENB, 333 writel(if_cl [all...] |
/drivers/clk/mvebu/ |
H A D | clk-cpu.c | 87 writel(reg, cpuclk->reg_base + SYS_CTRL_CLK_DIVIDER_VALUE_OFFSET); 93 writel(reg, cpuclk->reg_base + SYS_CTRL_CLK_DIVIDER_CTRL_OFFSET); 98 writel(reg, cpuclk->reg_base + SYS_CTRL_CLK_DIVIDER_CTRL_OFFSET); 103 writel(reg, cpuclk->reg_base + SYS_CTRL_CLK_DIVIDER_CTRL_OFFSET); 142 writel(reg, cpuclk->pmu_dfs); 147 writel(reg, cpuclk->reg_base + SYS_CTRL_CLK_DIVIDER_CTRL_OFFSET);
|
/drivers/input/keyboard/ |
H A D | nspire-keypad.c | 94 writel(0x3, keypad->reg_base + KEYPAD_INT); 118 writel(val, keypad->reg_base + KEYPAD_SCAN_MODE); 121 writel(val, keypad->reg_base + KEYPAD_CNTL); 125 writel(keypad->int_mask, keypad->reg_base + KEYPAD_INTMSK); 129 writel(0, keypad->reg_base + KEYPAD_UNKNOWN_INT); 131 writel(~0, keypad->reg_base + KEYPAD_UNKNOWN_INT_STS);
|
H A D | lpc32xx-keys.c | 113 writel(1, LPC32XX_KS_IRQ(kscandat->kscan_base)); 129 writel(1, LPC32XX_KS_IRQ(kscandat->kscan_base)); 138 writel(1, LPC32XX_KS_IRQ(kscandat->kscan_base)); 271 writel(kscandat->deb_clks, LPC32XX_KS_DEB(kscandat->kscan_base)); 272 writel(kscandat->scan_delay, LPC32XX_KS_SCAN_CTL(kscandat->kscan_base)); 273 writel(LPC32XX_KSCAN_FTST_USE32K_CLK, 275 writel(kscandat->matrix_sz, 277 writel(1, LPC32XX_KS_IRQ(kscandat->kscan_base)); 341 writel(1, LPC32XX_KS_IRQ(kscandat->kscan_base)); 362 writel( [all...] |
/drivers/mmc/host/ |
H A D | moxart-mmc.c | 191 writel(*status & mask, host->base + REG_CLEAR); 208 writel(RSP_TIMEOUT | RSP_CRC_OK | 210 writel(cmd->arg, host->base + REG_ARGUMENT); 224 writel(cmdctrl | CMD_EN, host->base + REG_COMMAND); 389 writel(DCR_DATA_FIFO_RESET, host->base + REG_DATA_CONTROL); 390 writel(MASK_DATA | FIFO_URUN | FIFO_ORUN, host->base + REG_CLEAR); 391 writel(host->rate, host->base + REG_DATA_TIMER); 392 writel(host->data_len, host->base + REG_DATA_LENGTH); 393 writel(datactrl, host->base + REG_DATA_CONTROL); 420 writel(CARD_CHANG [all...] |
/drivers/mtd/devices/ |
H A D | spear_smi.c | 231 writel(ctrlreg1 & ~(SW_MODE | WB_MODE), dev->io_base + SMI_CR1); 234 writel((bank << BANK_SHIFT) | RD_STATUS_REG | TFIE, 248 writel(ctrlreg1, dev->io_base + SMI_CR1); 249 writel(0, dev->io_base + SMI_CR2); 307 writel(0, dev->io_base + SMI_SR); 343 writel(0, dev->io_base + SMI_SR); 345 writel(val, dev->io_base + SMI_CR1); 389 writel(ctrlreg1 & ~SW_MODE, dev->io_base + SMI_CR1); 392 writel((bank << BANK_SHIFT) | WE | TFIE, dev->io_base + SMI_CR2); 398 writel(ctrlreg [all...] |
/drivers/phy/ |
H A D | phy-exynos4210-usb2.c | 170 writel(on, drv->reg_phy + EXYNOS_4210_UPHY1CON); 188 writel(clk, drv->reg_phy + EXYNOS_4210_UPHYCLK); 192 writel(pwr, drv->reg_phy + EXYNOS_4210_UPHYPWR); 196 writel(rst, drv->reg_phy + EXYNOS_4210_UPHYRST); 199 writel(rst, drv->reg_phy + EXYNOS_4210_UPHYRST); 206 writel(pwr, drv->reg_phy + EXYNOS_4210_UPHYPWR);
|
/drivers/watchdog/ |
H A D | dw_wdt.c | 114 writel(top_val | top_val << WDOG_TIMEOUT_RANGE_TOPINIT_SHIFT, 124 writel(WDOG_COUNTER_RESTART_KICK_VALUE, dw_wdt.regs + 133 writel(0, dw_wdt.regs + WDOG_TIMEOUT_RANGE_REG_OFFSET); 136 writel(WDOG_COUNTER_RESTART_KICK_VALUE, dw_wdt.regs + 139 writel(WDOG_CONTROL_REG_WDT_EN_MASK, 173 writel(WDOG_CONTROL_REG_WDT_EN_MASK,
|
/drivers/crypto/amcc/ |
H A D | crypto4xx_core.c | 59 writel(PPC4XX_BYTE_ORDER, dev->ce_base + CRYPTO4XX_BYTE_ORDER_CFG); 70 writel(pe_dma_cfg.w, dev->ce_base + CRYPTO4XX_PE_DMA_CFG); 77 writel(pe_dma_cfg.w, dev->ce_base + CRYPTO4XX_PE_DMA_CFG); 78 writel(dev->pdr_pa, dev->ce_base + CRYPTO4XX_PDR_BASE); 79 writel(dev->pdr_pa, dev->ce_base + CRYPTO4XX_RDR_BASE); 80 writel(PPC4XX_PRNG_CTRL_AUTO_EN, dev->ce_base + CRYPTO4XX_PRNG_CTRL); 82 writel(rand_num, dev->ce_base + CRYPTO4XX_PRNG_SEED_L); 84 writel(rand_num, dev->ce_base + CRYPTO4XX_PRNG_SEED_H); 88 writel(ring_size.w, dev->ce_base + CRYPTO4XX_RING_SIZE); 90 writel(ring_ctr [all...] |
/drivers/spi/ |
H A D | spi-s3c64xx.c | 208 writel(0, regs + S3C64XX_SPI_PACKET_CNT); 212 writel(val, regs + S3C64XX_SPI_CH_CFG); 217 writel(val, regs + S3C64XX_SPI_CH_CFG); 243 writel(val, regs + S3C64XX_SPI_CH_CFG); 247 writel(val, regs + S3C64XX_SPI_MODE_CFG); 407 writel(((xfer->len * 8 / sdd->cur_bpw) & 0xffff) 446 writel(((xfer->len * 8 / sdd->cur_bpw) & 0xffff) 453 writel(modecfg, regs + S3C64XX_SPI_MODE_CFG); 454 writel(chcfg, regs + S3C64XX_SPI_CH_CFG); 596 writel(va [all...] |
H A D | spi-orion.c | 80 writel(val, reg_addr); 91 writel(val, reg_addr); 161 writel(reg, spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG)); 180 writel(reg, spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG)); 253 writel(0x0, int_reg); 256 writel(*(*tx_buf)++, tx_reg); 258 writel(0, tx_reg); 284 writel(0x0, int_reg); 287 writel(__cpu_to_le16(get_unaligned((*tx_buf)++)), tx_reg); 289 writel( [all...] |
/drivers/tty/serial/ |
H A D | mpsc.c | 343 writel(v, pi->brg_base + BRG_BCR); 345 writel(readl(pi->brg_base + BRG_BTR) & 0xffff0000, 358 writel(v, pi->brg_base + BRG_BCR); 370 writel(v, pi->brg_base + BRG_BCR); 393 writel(v, pi->brg_base + BRG_BCR); 423 writel((readl(pi->sdma_base + SDMA_SDC) & (0x3 << 12)) | (v << 12), 432 writel((readl(pi->sdma_base + SDMA_SDC) & 0x3ff) | 0x03f, 453 writel(v, pi->shared_regs->sdma_intr_base + SDMA_INTR_MASK); 476 writel(v, pi->shared_regs->sdma_intr_base + SDMA_INTR_MASK); 495 writel((u3 [all...] |
H A D | meson_uart.c | 112 writel(val, port->membase + AML_UART_CONTROL); 121 writel(val, port->membase + AML_UART_CONTROL); 136 writel(val, port->membase + AML_UART_CONTROL); 153 writel(port->x_char, port->membase + AML_UART_WFIFO); 163 writel(ch, port->membase + AML_UART_WFIFO); 193 writel(mode, port->membase + AML_UART_CONTROL); 197 writel(mode, port->membase + AML_UART_CONTROL); 251 writel(val, port->membase + AML_UART_CONTROL); 254 writel(val, port->membase + AML_UART_CONTROL); 257 writel(va [all...] |
/drivers/video/fbdev/ |
H A D | nuc900fb.c | 60 writel(vbaddr1, regs + REG_LCM_VA_BADDR0); 61 writel(vbaddr2, regs + REG_LCM_VA_BADDR1); 63 writel(fbi->regs.lcd_va_fbctrl, regs + REG_LCM_VA_FBCTRL); 64 writel(fbi->regs.lcd_va_scale, regs + REG_LCM_VA_SCALE); 248 writel(fbi->regs.lcd_device_ctrl, regs + REG_LCM_DEV_CTRL); 249 writel(fbi->regs.lcd_crtc_size, regs + REG_LCM_CRTC_SIZE); 250 writel(fbi->regs.lcd_crtc_dend, regs + REG_LCM_CRTC_DEND); 251 writel(fbi->regs.lcd_crtc_hr, regs + REG_LCM_CRTC_HR); 252 writel(fbi->regs.lcd_crtc_hsync, regs + REG_LCM_CRTC_HSYNC); 253 writel(fb [all...] |
/drivers/scsi/ |
H A D | hpsa.h | 343 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 350 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 357 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 359 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 371 writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); 375 writel(SA5_INTR_OFF, 385 writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); 389 writel(SA5_PERF_INTR_OFF, 406 writel(SA5_OUTDB_CLEAR_PERF_BIT, h->vaddr + SA5_OUTDB_CLEAR); 529 writel(( [all...] |