Searched refs:CNS3XXX_PCIE1_HOST_BASE (Results 1 - 3 of 3) sorted by relevance

/arch/arm/mach-cns3xxx/
H A Dcore.c68 .pfn = __phys_to_pfn(CNS3XXX_PCIE1_HOST_BASE),
H A Dpcie.c216 .end = CNS3XXX_PCIE1_HOST_BASE - 1, /* 176 MiB */
H A Dcns3xxx.h185 #define CNS3XXX_PCIE1_HOST_BASE 0xBB000000 /* PCIe Port 1 RC Base */ macro

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