Searched refs:DMA19_IRQ_STATUS (Results 1 - 6 of 6) sorted by relevance

/arch/blackfin/mach-bf538/include/mach/
H A DdefBF538.h601 #define DMA19_IRQ_STATUS 0xFFC01EE8 /* DMA Channel 19 Interrupt/Status Register */ macro
H A DcdefBF538.h1002 #define bfin_read_DMA19_IRQ_STATUS() bfin_read16(DMA19_IRQ_STATUS)
1003 #define bfin_write_DMA19_IRQ_STATUS(val) bfin_write16(DMA19_IRQ_STATUS, val)
/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h818 #define DMA19_IRQ_STATUS 0xffc01de8 /* DMA Channel 19 Interrupt/Status Register */ macro
H A DcdefBF54x_base.h1384 #define bfin_read_DMA19_IRQ_STATUS() bfin_read16(DMA19_IRQ_STATUS)
1385 #define bfin_write_DMA19_IRQ_STATUS(val) bfin_write16(DMA19_IRQ_STATUS, val)
/arch/blackfin/mach-bf609/include/mach/
H A DcdefBF60x_base.h1050 #define bfin_read_DMA19_IRQ_STATUS() bfin_read32(DMA19_IRQ_STATUS)
1051 #define bfin_write_DMA19_IRQ_STATUS(val) bfin_write32(DMA19_IRQ_STATUS, val)
H A DdefBF60x_base.h1929 #define DMA19_IRQ_STATUS 0xFFC07330 /* DMA19 Status Register */ macro

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