Searched refs:RSI_RESPONSE0 (Results 1 - 5 of 5) sorted by relevance

/arch/blackfin/mach-bf518/include/mach/
H A DdefBF514.h20 #define RSI_RESPONSE0 0xFFC03814 /* RSI Response Register */ macro
H A DcdefBF514.h25 #define bfin_read_RSI_RESPONSE0() bfin_read32(RSI_RESPONSE0)
26 #define bfin_write_RSI_RESPONSE0(val) bfin_write32(RSI_RESPONSE0, val)
/arch/blackfin/kernel/
H A Ddebug-mmrs.c1398 D32(RSI_RESPONSE0);
/arch/blackfin/mach-bf609/include/mach/
H A DcdefBF60x_base.h3197 #define bfin_read_RSI_RESPONSE0() bfin_read32(RSI_RESPONSE0)
3198 #define bfin_write_RSI_RESPONSE0(val) bfin_write32(RSI_RESPONSE0, val)
H A DdefBF60x_base.h41 #define RSI_RESPONSE0 0xFFC00614 /* RSI0 Response 0 Register */ macro

Completed in 103 milliseconds